<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Hi Arnold,<div class=""><br class=""></div><div class="">The PowerPC part of the patch does not compile.</div><div class=""><br class=""></div><div class=""><div style="margin: 0px; font-size: 11px; font-family: Menlo;" class=""><b class="">/lib/Target/PowerPC/PPCISelLowering.cpp:4218:5: </b><span style="font-variant-ligatures: no-common-ligatures; color: #c33720" class=""><b class="">error: </b></span><b class="">use of undeclared identifier 'MF'</b></div><div style="margin: 0px; font-size: 11px; font-family: Menlo;" class=""> MF.getFrameInfo()->setHasTailCall();</div><div style="margin: 0px; font-size: 11px; font-family: Menlo; color: rgb(52, 189, 38);" class=""><b class=""> ^</b></div><div style="margin: 0px; font-size: 11px; font-family: Menlo;" class="">1 error generated.</div></div><div class=""><br class=""></div><div class=""><br class=""></div><div class="">Could you fix or revert please?</div><div class=""><br class=""></div><div class="">Cheers,</div><div class="">-Quentin<br class=""><div><blockquote type="cite" class=""><div class="">On May 8, 2015, at 4:52 PM, Arnold Schwaighofer <<a href="mailto:aschwaighofer@apple.com" class="">aschwaighofer@apple.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class="">Author: arnolds<br class="">Date: Fri May 8 18:52:00 2015<br class="">New Revision: 236916<br class=""><br class="">URL: <a href="http://llvm.org/viewvc/llvm-project?rev=236916&view=rev" class="">http://llvm.org/viewvc/llvm-project?rev=236916&view=rev</a><br class="">Log:<br class="">ScheduleDAGInstrs: In functions with tail calls PseudoSourceValues are not non-aliasing distinct objects<br class=""><br class="">The code that builds the dependence graph assumes that two PseudoSourceValues<br class="">don't alias. In a tail calling function two FixedStackObjects might refer to the<br class="">same location. Worse 'immutable' fixed stack objects like function arguments are<br class="">not immutable and will be clobbered.<br class=""><br class="">Change this so that a load from a FixedStackObject is not invariant in a tail<br class="">calling function and don't return a PseudoSourceValue for an instruction in tail<br class="">calling functions when building the dependence graph so that we handle function<br class="">arguments conservatively.<br class=""><br class="">Fix for PR23459.<br class=""><br class=""><a href="rdar://20740035" class="">rdar://20740035</a><br class=""><br class="">Added:<br class=""> llvm/trunk/test/CodeGen/AArch64/tailcall_misched_graph.ll<br class="">Modified:<br class=""> llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h<br class=""> llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp<br class=""> llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp<br class=""> llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp<br class=""> llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp<br class=""> llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp<br class=""> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br class=""> llvm/trunk/test/CodeGen/ARM/debug-frame.ll<br class=""> llvm/trunk/test/CodeGen/ARM/ehabi.ll<br class=""> llvm/trunk/test/CodeGen/X86/tailcallstack64.ll<br class=""><br class="">Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h<br class="">URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=236916&r1=236915&r2=236916&view=diff<br class="">==============================================================================<br class="">--- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original)<br class="">+++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Fri May 8 18:52:00 2015<br class="">@@ -246,6 +246,11 @@ class MachineFrameInfo {<br class=""> /// True if this is a varargs function that contains a musttail call.<br class=""> bool HasMustTailInVarArgFunc;<br class=""><br class="">+ /// True if this function contains a tail call. If so immutable objects like<br class="">+ /// function arguments are no longer so. A tail call *can* override fixed<br class="">+ /// stack objects like arguments so we can't treat them as immutable.<br class="">+ bool HasTailCall;<br class="">+<br class=""> /// Not null, if shrink-wrapping found a better place for the prologue.<br class=""> MachineBasicBlock *Save;<br class=""> /// Not null, if shrink-wrapping found a better place for the epilogue.<br class="">@@ -281,6 +286,7 @@ public:<br class=""> HasMustTailInVarArgFunc = false;<br class=""> Save = nullptr;<br class=""> Restore = nullptr;<br class="">+ HasTailCall = false;<br class=""> }<br class=""><br class=""> /// hasStackObjects - Return true if there are any stack objects in this<br class="">@@ -508,6 +514,10 @@ public:<br class=""> bool hasMustTailInVarArgFunc() const { return HasMustTailInVarArgFunc; }<br class=""> void setHasMustTailInVarArgFunc(bool B) { HasMustTailInVarArgFunc = B; }<br class=""><br class="">+ /// Returns true if the function contains a tail call.<br class="">+ bool hasTailCall() const { return HasTailCall; }<br class="">+ void setHasTailCall() { HasTailCall = true; }<br class="">+<br class=""> /// getMaxCallFrameSize - Return the maximum size of a call frame that must be<br class=""> /// allocated for an outgoing function call. This is only available if<br class=""> /// CallFrameSetup/Destroy pseudo instructions are used by the target, and<br class="">@@ -545,6 +555,9 @@ public:<br class=""> /// isImmutableObjectIndex - Returns true if the specified index corresponds<br class=""> /// to an immutable object.<br class=""> bool isImmutableObjectIndex(int ObjectIdx) const {<br class="">+ // Tail calling functions can clobber their function arguments.<br class="">+ if (HasTailCall)<br class="">+ return false;<br class=""> assert(unsigned(ObjectIdx+NumFixedObjects) < Objects.size() &&<br class=""> "Invalid Object Idx!");<br class=""> return Objects[ObjectIdx+NumFixedObjects].isImmutable;<br class=""><br class="">Modified: llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp<br class="">URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp?rev=236916&r1=236915&r2=236916&view=diff<br class="">==============================================================================<br class="">--- llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp (original)<br class="">+++ llvm/trunk/lib/CodeGen/ScheduleDAGInstrs.cpp Fri May 8 18:52:00 2015<br class="">@@ -20,6 +20,7 @@<br class=""> #include "llvm/Analysis/ValueTracking.h"<br class=""> #include "llvm/CodeGen/LiveIntervalAnalysis.h"<br class=""> #include "llvm/CodeGen/MachineFunctionPass.h"<br class="">+#include "llvm/CodeGen/MachineFrameInfo.h"<br class=""> #include "llvm/CodeGen/MachineInstrBuilder.h"<br class=""> #include "llvm/CodeGen/MachineMemOperand.h"<br class=""> #include "llvm/CodeGen/MachineRegisterInfo.h"<br class="">@@ -143,6 +144,13 @@ static void getUnderlyingObjectsForInstr<br class=""><br class=""> if (const PseudoSourceValue *PSV =<br class=""> (*MI->memoperands_begin())->getPseudoValue()) {<br class="">+ // Function that contain tail calls don't have unique PseudoSourceValue<br class="">+ // objects. Two PseudoSourceValues might refer to the same or overlapping<br class="">+ // locations. The client code calling this function assumes this is not the<br class="">+ // case. So return a conservative answer of no known object.<br class="">+ if (MFI->hasTailCall())<br class="">+ return;<br class="">+<br class=""> // For now, ignore PseudoSourceValues which may alias LLVM IR values<br class=""> // because the code that uses this function has no way to cope with<br class=""> // such aliases.<br class=""><br class="">Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp<br class="">URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=236916&r1=236915&r2=236916&view=diff<br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)<br class="">+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Fri May 8 18:52:00 2015<br class="">@@ -2873,8 +2873,10 @@ AArch64TargetLowering::LowerCall(CallLow<br class=""><br class=""> // If we're doing a tall call, use a TC_RETURN here rather than an<br class=""> // actual call instruction.<br class="">- if (IsTailCall)<br class="">+ if (IsTailCall) {<br class="">+ MF.getFrameInfo()->setHasTailCall();<br class=""> return DAG.getNode(AArch64ISD::TC_RETURN, DL, NodeTys, Ops);<br class="">+ }<br class=""><br class=""> // Returns a chain and a flag for retval copy to use.<br class=""> Chain = DAG.getNode(AArch64ISD::CALL, DL, NodeTys, Ops);<br class=""><br class="">Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp<br class="">URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=236916&r1=236915&r2=236916&view=diff<br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)<br class="">+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Fri May 8 18:52:00 2015<br class="">@@ -1847,8 +1847,10 @@ ARMTargetLowering::LowerCall(TargetLower<br class=""> Ops.push_back(InFlag);<br class=""><br class=""> SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);<br class="">- if (isTailCall)<br class="">+ if (isTailCall) {<br class="">+ MF.getFrameInfo()->setHasTailCall();<br class=""> return DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, Ops);<br class="">+ }<br class=""><br class=""> // Returns a chain and a flag for retval copy to use.<br class=""> Chain = DAG.getNode(CallOpc, dl, NodeTys, Ops);<br class=""><br class="">Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp<br class="">URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp?rev=236916&r1=236915&r2=236916&view=diff<br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp (original)<br class="">+++ llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp Fri May 8 18:52:00 2015<br class="">@@ -637,8 +637,10 @@ HexagonTargetLowering::LowerCall(TargetL<br class=""> if (InFlag.getNode())<br class=""> Ops.push_back(InFlag);<br class=""><br class="">- if (isTailCall)<br class="">+ if (isTailCall) {<br class="">+ MF.getFrameInfo()->setHasTailCall();<br class=""> return DAG.getNode(HexagonISD::TC_RETURN, dl, NodeTys, Ops);<br class="">+ }<br class=""><br class=""> int OpCode = doesNotReturn ? HexagonISD::CALLv3nr : HexagonISD::CALLv3;<br class=""> Chain = DAG.getNode(OpCode, dl, NodeTys, Ops);<br class=""><br class="">Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp<br class="">URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=236916&r1=236915&r2=236916&view=diff<br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)<br class="">+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Fri May 8 18:52:00 2015<br class="">@@ -4215,6 +4215,7 @@ PPCTargetLowering::FinishCall(CallingCon<br class=""> isa<ConstantSDNode>(Callee)) &&<br class=""> "Expecting an global address, external symbol, absolute value or register");<br class=""><br class="">+ MF.getFrameInfo()->setHasTailCall();<br class=""> return DAG.getNode(PPCISD::TC_RETURN, dl, MVT::Other, Ops);<br class=""> }<br class=""><br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br class="">URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=236916&r1=236915&r2=236916&view=diff<br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br class="">+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri May 8 18:52:00 2015<br class="">@@ -3135,6 +3135,7 @@ X86TargetLowering::LowerCall(TargetLower<br class=""> // This isn't right, although it's probably harmless on x86; liveouts<br class=""> // should be computed from returns not tail calls. Consider a void<br class=""> // function making a tail call to a function returning int.<br class="">+ MF.getFrameInfo()->setHasTailCall();<br class=""> return DAG.getNode(X86ISD::TC_RETURN, dl, NodeTys, Ops);<br class=""> }<br class=""><br class=""><br class="">Added: llvm/trunk/test/CodeGen/AArch64/tailcall_misched_graph.ll<br class="">URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/tailcall_misched_graph.ll?rev=236916&view=auto<br class="">==============================================================================<br class="">--- llvm/trunk/test/CodeGen/AArch64/tailcall_misched_graph.ll (added)<br class="">+++ llvm/trunk/test/CodeGen/AArch64/tailcall_misched_graph.ll Fri May 8 18:52:00 2015<br class="">@@ -0,0 +1,42 @@<br class="">+; RUN: llc -mcpu=cyclone -debug-only=misched < %s 2>&1 | FileCheck %s<br class="">+<br class="">+; REQUIRE: asserts<br class="">+<br class="">+target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"<br class="">+target triple = "arm64-apple-ios7.0.0"<br class="">+<br class="">+define void @caller2(i8* %a0, i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9) {<br class="">+entry:<br class="">+ tail call void @callee2(i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a0)<br class="">+ ret void<br class="">+}<br class="">+<br class="">+declare void @callee2(i8*, i8*, i8*, i8*, i8*,<br class="">+ i8*, i8*, i8*, i8*, i8*)<br class="">+<br class="">+; Make sure there is a dependence between the load and store to the same stack<br class="">+; location during a tail call. Tail calls clobber the incoming argument area and<br class="">+; therefore it is not safe to assume argument locations are invariant.<br class="">+; PR23459 has a test case that we where miscompiling because of this at the<br class="">+; time.<br class="">+<br class="">+; CHECK: Frame Objects<br class="">+; CHECK: fi#-4: {{.*}} fixed, at location [SP+8]<br class="">+; CHECK: fi#-3: {{.*}} fixed, at location [SP]<br class="">+; CHECK: fi#-2: {{.*}} fixed, at location [SP+8]<br class="">+; CHECK: fi#-1: {{.*}} fixed, at location [SP]<br class="">+<br class="">+; CHECK: [[VRA:%vreg.*]]<def> = LDRXui <fi#-1><br class="">+; CHECK: [[VRB:%vreg.*]]<def> = LDRXui <fi#-2><br class="">+; CHECK: STRXui %vreg{{.*}}, <fi#-4><br class="">+; CHECK: STRXui [[VRB]], <fi#-3><br class="">+<br class="">+; Make sure that there is an dependence edge between fi#-2 and fi#-4.<br class="">+; Without this edge the scheduler would be free to move the store accross the load.<br class="">+<br class="">+; CHECK: SU({{.*}}): [[VRB]]<def> = LDRXui <fi#-2><br class="">+; CHECK-NOT: SU<br class="">+; CHECK: Successors:<br class="">+; CHECK: ch SU([[DEPSTORE:.*]]): Latency=0<br class="">+<br class="">+; CHECK: SU([[DEPSTORE]]): STRXui %vreg0, <fi#-4><br class=""><br class="">Modified: llvm/trunk/test/CodeGen/ARM/debug-frame.ll<br class="">URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/debug-frame.ll?rev=236916&r1=236915&r2=236916&view=diff<br class="">==============================================================================<br class="">--- llvm/trunk/test/CodeGen/ARM/debug-frame.ll (original)<br class="">+++ llvm/trunk/test/CodeGen/ARM/debug-frame.ll Fri May 8 18:52:00 2015<br class="">@@ -179,7 +179,7 @@ declare void @_ZSt9terminatev()<br class=""> ; CHECK-FP: .cfi_offset r4, -36<br class=""> ; CHECK-FP: add r11, sp, #28<br class=""> ; CHECK-FP: .cfi_def_cfa r11, 8<br class="">-; CHECK-FP: sub sp, sp, #28<br class="">+; CHECK-FP: sub sp, sp, #44<br class=""> ; CHECK-FP: .cfi_endproc<br class=""><br class=""> ; CHECK-FP-ELIM-LABEL: _Z4testiiiiiddddd:<br class="">@@ -195,8 +195,8 @@ declare void @_ZSt9terminatev()<br class=""> ; CHECK-FP-ELIM: .cfi_offset r6, -28<br class=""> ; CHECK-FP-ELIM: .cfi_offset r5, -32<br class=""> ; CHECK-FP-ELIM: .cfi_offset r4, -36<br class="">-; CHECK-FP-ELIM: sub sp, sp, #28<br class="">-; CHECK-FP-ELIM: .cfi_def_cfa_offset 64<br class="">+; CHECK-FP-ELIM: sub sp, sp, #36<br class="">+; CHECK-FP-ELIM: .cfi_def_cfa_offset 72<br class=""> ; CHECK-FP-ELIM: .cfi_endproc<br class=""><br class=""> ; CHECK-V7-FP-LABEL: _Z4testiiiiiddddd:<br class=""><br class="">Modified: llvm/trunk/test/CodeGen/ARM/ehabi.ll<br class="">URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/ehabi.ll?rev=236916&r1=236915&r2=236916&view=diff<br class="">==============================================================================<br class="">--- llvm/trunk/test/CodeGen/ARM/ehabi.ll (original)<br class="">+++ llvm/trunk/test/CodeGen/ARM/ehabi.ll Fri May 8 18:52:00 2015<br class="">@@ -146,8 +146,8 @@ declare void @_ZSt9terminatev()<br class=""> ; CHECK-FP: push {r4, r5, r6, r7, r8, r9, r10, r11, lr}<br class=""> ; CHECK-FP: .setfp r11, sp, #28<br class=""> ; CHECK-FP: add r11, sp, #28<br class="">-; CHECK-FP: .pad #28<br class="">-; CHECK-FP: sub sp, sp, #28<br class="">+; CHECK-FP: .pad #44<br class="">+; CHECK-FP: sub sp, sp, #44<br class=""> ; CHECK-FP: .personality __gxx_personality_v0<br class=""> ; CHECK-FP: .handlerdata<br class=""> ; CHECK-FP: .fnend<br class="">@@ -156,8 +156,8 @@ declare void @_ZSt9terminatev()<br class=""> ; CHECK-FP-ELIM: .fnstart<br class=""> ; CHECK-FP-ELIM: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}<br class=""> ; CHECK-FP-ELIM: push {r4, r5, r6, r7, r8, r9, r10, r11, lr}<br class="">-; CHECK-FP-ELIM: .pad #28<br class="">-; CHECK-FP-ELIM: sub sp, sp, #28<br class="">+; CHECK-FP-ELIM: .pad #36<br class="">+; CHECK-FP-ELIM: sub sp, sp, #36<br class=""> ; CHECK-FP-ELIM: .personality __gxx_personality_v0<br class=""> ; CHECK-FP-ELIM: .handlerdata<br class=""> ; CHECK-FP-ELIM: .fnend<br class="">@@ -205,7 +205,7 @@ declare void @_ZSt9terminatev()<br class=""> ; DWARF-FP: .cfi_offset r4, -36<br class=""> ; DWARF-FP: add r11, sp, #28<br class=""> ; DWARF-FP: .cfi_def_cfa r11, 8<br class="">-; DWARF-FP: sub sp, sp, #28<br class="">+; DWARF-FP: sub sp, sp, #44<br class=""> ; DWARF-FP: sub sp, r11, #28<br class=""> ; DWARF-FP: pop {r4, r5, r6, r7, r8, r9, r10, r11, lr}<br class=""> ; DWARF-FP: mov pc, lr<br class="">@@ -226,9 +226,9 @@ declare void @_ZSt9terminatev()<br class=""> ; DWARF-FP-ELIM: .cfi_offset r6, -28<br class=""> ; DWARF-FP-ELIM: .cfi_offset r5, -32<br class=""> ; DWARF-FP-ELIM: .cfi_offset r4, -36<br class="">-; DWARF-FP-ELIM: sub sp, sp, #28<br class="">-; DWARF-FP-ELIM: .cfi_def_cfa_offset 64<br class="">-; DWARF-FP-ELIM: add sp, sp, #28<br class="">+; DWARF-FP-ELIM: sub sp, sp, #36<br class="">+; DWARF-FP-ELIM: .cfi_def_cfa_offset 72<br class="">+; DWARF-FP-ELIM: add sp, sp, #36<br class=""> ; DWARF-FP-ELIM: pop {r4, r5, r6, r7, r8, r9, r10, r11, lr}<br class=""> ; DWARF-FP-ELIM: mov pc, lr<br class=""> ; DWARF-FP-ELIM: .cfi_endproc<br class=""><br class="">Modified: llvm/trunk/test/CodeGen/X86/tailcallstack64.ll<br class="">URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tailcallstack64.ll?rev=236916&r1=236915&r2=236916&view=diff<br class="">==============================================================================<br class="">--- llvm/trunk/test/CodeGen/X86/tailcallstack64.ll (original)<br class="">+++ llvm/trunk/test/CodeGen/X86/tailcallstack64.ll Fri May 8 18:52:00 2015<br class="">@@ -12,9 +12,9 @@<br class=""> ; Add %in1 %p1 to a different temporary register (%eax).<br class=""> ; CHECK: addl {{%edi|%ecx}}, [[R1]]<br class=""> ; Move param %in2 to stack.<br class="">-; CHECK: movl [[R2]], [[A1]](%rsp)<br class="">+; CHECK-DAG: movl [[R2]], [[A1]](%rsp)<br class=""> ; Move result of addition to stack.<br class="">-; CHECK: movl [[R1]], [[A2]](%rsp)<br class="">+; CHECK-DAG: movl [[R1]], [[A2]](%rsp)<br class=""> ; Eventually, do a TAILCALL<br class=""> ; CHECK: TAILCALL<br class=""><br class=""><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class="">llvm-commits@cs.uiuc.edu<br class="">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits<br class=""></div></blockquote></div><br class=""></div></body></html>