<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">For the record, this is a follow-up of r<span style="font-family: 'Helvetica Neue';" class="">235673 that we discussed offline.</span><div class=""><font face="Helvetica Neue" class=""><br class=""></font></div><div class=""><font face="Helvetica Neue" class="">Thanks Matthias,</font></div><div class=""><font face="Helvetica Neue" class="">Quentin<br class=""></font><div><blockquote type="cite" class=""><div class="">On Apr 23, 2015, at 6:15 PM, Matthias Braun <<a href="mailto:matze@braunis.de" class="">matze@braunis.de</a>> wrote:</div><br class="Apple-interchange-newline"><div class="">Author: matze<br class="">Date: Thu Apr 23 20:15:27 2015<br class="">New Revision: 235679<br class=""><br class="">URL: <a href="http://llvm.org/viewvc/llvm-project?rev=235679&view=rev" class="">http://llvm.org/viewvc/llvm-project?rev=235679&view=rev</a><br class="">Log:<br class="">Improve isTriviallyReMaterializable() documentation.<br class=""><br class="">This should make it clear under which narrow circumstances implicit<br class="">physreg uses are okay when rematerializing and prevent people from<br class="">accidentally allowing too much when overriding<br class="">isReallyTriviallyReMaterializable() even with the weaker assert in the<br class="">RegisterCoalescer.<br class=""><br class="">Modified:<br class=""> llvm/trunk/include/llvm/Target/TargetInstrInfo.h<br class=""><br class="">Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=235679&r1=235678&r2=235679&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=235679&r1=235678&r2=235679&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)<br class="">+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Thu Apr 23 20:15:27 2015<br class="">@@ -67,9 +67,11 @@ public:<br class=""> const TargetRegisterInfo *TRI,<br class=""> const MachineFunction &MF) const;<br class=""><br class="">- /// isTriviallyReMaterializable - Return true if the instruction is trivially<br class="">- /// rematerializable, meaning it has no side effects and requires no operands<br class="">- /// that aren't always available.<br class="">+ /// Return true if the instruction is trivially rematerializable, meaning it<br class="">+ /// has no side effects and requires no operands that aren't always available.<br class="">+ /// This means the only allowed uses are constants and unallocatable physical<br class="">+ /// registers so that the instructions result is independent of the place<br class="">+ /// in the function.<br class=""> bool isTriviallyReMaterializable(const MachineInstr *MI,<br class=""> AliasAnalysis *AA = nullptr) const {<br class=""> return MI->getOpcode() == TargetOpcode::IMPLICIT_DEF ||<br class="">@@ -79,12 +81,13 @@ public:<br class=""> }<br class=""><br class=""> protected:<br class="">- /// isReallyTriviallyReMaterializable - For instructions with opcodes for<br class="">- /// which the M_REMATERIALIZABLE flag is set, this hook lets the target<br class="">- /// specify whether the instruction is actually trivially rematerializable,<br class="">- /// taking into consideration its operands. This predicate must return false<br class="">- /// if the instruction has any side effects other than producing a value, or<br class="">- /// if it requres any address registers that are not always available.<br class="">+ /// For instructions with opcodes for which the M_REMATERIALIZABLE flag is<br class="">+ /// set, this hook lets the target specify whether the instruction is actually<br class="">+ /// trivially rematerializable, taking into consideration its operands. This<br class="">+ /// predicate must return false if the instruction has any side effects other<br class="">+ /// than producing a value, or if it requres any address registers that are<br class="">+ /// not always available.<br class="">+ /// Requirements must be check as stated in isTriviallyReMaterializable() .<br class=""> virtual bool isReallyTriviallyReMaterializable(const MachineInstr *MI,<br class=""> AliasAnalysis *AA) const {<br class=""> return false;<br class=""><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@cs.uiuc.edu" class="">llvm-commits@cs.uiuc.edu</a><br class="">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits<br class=""></div></blockquote></div><br class=""></div></body></html>