<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Thanks Tom.<div class=""><br class=""></div><div class=""><div style="margin: 0px; font-size: 11px; font-family: Menlo;" class="">Committed revision 232118.</div><div><br class=""></div><div>Cheers,</div><div>-Quentin<br class=""><blockquote type="cite" class=""><div class="">On Mar 12, 2015, at 3:12 PM, Tom Stellard <<a href="mailto:tom@stellard.net" class="">tom@stellard.net</a>> wrote:</div><br class="Apple-interchange-newline"><div class="">LGTM. Go ahead and merge this to 3.6.<br class=""><br class="">-Tom<br class=""><br class="">On Thu, Mar 12, 2015 at 02:57:54PM -0700, Hans Wennborg wrote:<br class=""><blockquote type="cite" class="">+Tom Stellard who owns 3.6.1 (3.6 was released a while ago :-)<br class=""><br class="">On Thu, Mar 12, 2015 at 2:50 PM, Quentin Colombet <<a href="mailto:qcolombet@apple.com" class="">qcolombet@apple.com</a>> wrote:<br class=""><blockquote type="cite" class="">Hi Hans,<br class=""><br class="">can we get this into 3.6?<br class=""><br class="">+Nadav for approval.<br class=""><br class="">Thanks,<br class="">-Quentin<br class=""><blockquote type="cite" class="">On Mar 12, 2015, at 12:34 PM, Quentin Colombet <<a href="mailto:qcolombet@apple.com" class="">qcolombet@apple.com</a>> wrote:<br class=""><br class="">Author: qcolombet<br class="">Date: Thu Mar 12 14:34:12 2015<br class="">New Revision: 232085<br class=""><br class="">URL: <a href="http://llvm.org/viewvc/llvm-project?rev=232085&view=rev" class="">http://llvm.org/viewvc/llvm-project?rev=232085&view=rev</a><br class="">Log:<br class="">[X86] Fix a regression introduced by r223641.<br class="">The permps and permd instructions have their operands swapped compared to the<br class="">intrinsic definition. Therefore, they do not fall into the INTR_TYPE_2OP<br class="">category.<br class=""><br class="">I did not create a new category for those two, as they are the only one AFAICT<br class="">in that case.<br class=""><br class=""><<a href="rdar://problem/20108262" class="">rdar://problem/20108262</a>><br class=""><br class="">Modified:<br class=""> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br class=""> llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h<br class=""> llvm/trunk/test/CodeGen/X86/avx2-intrinsics-x86.ll<br class=""> llvm/trunk/test/CodeGen/X86/stack-folding-int-avx2.ll<br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=232085&r1=232084&r2=232085&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=232085&r1=232084&r2=232085&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br class="">+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Mar 12 14:34:12 2015<br class="">@@ -14711,6 +14711,13 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S<br class=""> switch (IntNo) {<br class=""> default: return SDValue(); // Don't custom lower most intrinsics.<br class=""><br class="">+ case Intrinsic::x86_avx2_permd:<br class="">+ case Intrinsic::x86_avx2_permps:<br class="">+ // Operands intentionally swapped. Mask is last operand to intrinsic,<br class="">+ // but second operand for node/instruction.<br class="">+ return DAG.getNode(X86ISD::VPERMV, dl, Op.getValueType(),<br class="">+ Op.getOperand(2), Op.getOperand(1));<br class="">+<br class=""> case Intrinsic::x86_avx512_mask_valign_q_512:<br class=""> case Intrinsic::x86_avx512_mask_valign_d_512:<br class=""> // Vector source operands are swapped.<br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h?rev=232085&r1=232084&r2=232085&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h?rev=232085&r1=232084&r2=232085&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h (original)<br class="">+++ llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h Thu Mar 12 14:34:12 2015<br class="">@@ -175,8 +175,6 @@ static const IntrinsicData IntrinsicsWi<br class=""> X86_INTRINSIC_DATA(avx2_packsswb, INTR_TYPE_2OP, X86ISD::PACKSS, 0),<br class=""> X86_INTRINSIC_DATA(avx2_packusdw, INTR_TYPE_2OP, X86ISD::PACKUS, 0),<br class=""> X86_INTRINSIC_DATA(avx2_packuswb, INTR_TYPE_2OP, X86ISD::PACKUS, 0),<br class="">- X86_INTRINSIC_DATA(avx2_permd, INTR_TYPE_2OP, X86ISD::VPERMV, 0),<br class="">- X86_INTRINSIC_DATA(avx2_permps, INTR_TYPE_2OP, X86ISD::VPERMV, 0),<br class=""> X86_INTRINSIC_DATA(avx2_phadd_d, INTR_TYPE_2OP, X86ISD::HADD, 0),<br class=""> X86_INTRINSIC_DATA(avx2_phadd_w, INTR_TYPE_2OP, X86ISD::HADD, 0),<br class=""> X86_INTRINSIC_DATA(avx2_phsub_d, INTR_TYPE_2OP, X86ISD::HSUB, 0),<br class=""><br class="">Modified: llvm/trunk/test/CodeGen/X86/avx2-intrinsics-x86.ll<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx2-intrinsics-x86.ll?rev=232085&r1=232084&r2=232085&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx2-intrinsics-x86.ll?rev=232085&r1=232084&r2=232085&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/test/CodeGen/X86/avx2-intrinsics-x86.ll (original)<br class="">+++ llvm/trunk/test/CodeGen/X86/avx2-intrinsics-x86.ll Thu Mar 12 14:34:12 2015<br class="">@@ -746,7 +746,10 @@ declare <4 x i64> @llvm.x86.avx2.pbroadc<br class=""><br class=""><br class="">define <8 x i32> @test_x86_avx2_permd(<8 x i32> %a0, <8 x i32> %a1) {<br class="">- ; CHECK: vpermd<br class="">+ ; Check that the arguments are swapped between the intrinsic definition<br class="">+ ; and its lowering. Indeed, the offsets are the first source in<br class="">+ ; the instruction.<br class="">+ ; CHECK: vpermd %ymm0, %ymm1, %ymm0<br class=""> %res = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> %a1) ; <<8 x i32>> [#uses=1]<br class=""> ret <8 x i32> %res<br class="">}<br class="">@@ -754,7 +757,10 @@ declare <8 x i32> @llvm.x86.avx2.permd(<<br class=""><br class=""><br class="">define <8 x float> @test_x86_avx2_permps(<8 x float> %a0, <8 x float> %a1) {<br class="">- ; CHECK: vpermps<br class="">+ ; Check that the arguments are swapped between the intrinsic definition<br class="">+ ; and its lowering. Indeed, the offsets are the first source in<br class="">+ ; the instruction.<br class="">+ ; CHECK: vpermps %ymm0, %ymm1, %ymm0<br class=""> %res = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x float> %a1) ; <<8 x float>> [#uses=1]<br class=""> ret <8 x float> %res<br class="">}<br class=""><br class="">Modified: llvm/trunk/test/CodeGen/X86/stack-folding-int-avx2.ll<br class="">URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-folding-int-avx2.ll?rev=232085&r1=232084&r2=232085&view=diff" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-folding-int-avx2.ll?rev=232085&r1=232084&r2=232085&view=diff</a><br class="">==============================================================================<br class="">--- llvm/trunk/test/CodeGen/X86/stack-folding-int-avx2.ll (original)<br class="">+++ llvm/trunk/test/CodeGen/X86/stack-folding-int-avx2.ll Thu Mar 12 14:34:12 2015<br class="">@@ -442,7 +442,7 @@ define <8 x i32> @stack_fold_permd(<8 x<br class=""> ;CHECK-LABEL: stack_fold_permd<br class=""> ;CHECK: vpermd {{-?[0-9]*}}(%rsp), {{%ymm[0-9][0-9]*}}, {{%ymm[0-9][0-9]*}} {{.*#+}} 32-byte Folded Reload<br class=""> %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()<br class="">- %2 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> %a1)<br class="">+ %2 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a1, <8 x i32> %a0)<br class=""> ret <8 x i32> %2<br class="">}<br class="">declare <8 x i32> @llvm.x86.avx2.permd(<8 x i32>, <8 x i32>) nounwind readonly<br class="">@@ -461,7 +461,7 @@ define <8 x float> @stack_fold_permps(<8<br class=""> ;CHECK-LABEL: stack_fold_permps<br class=""> ;CHECK: vpermps {{-?[0-9]*}}(%rsp), {{%ymm[0-9][0-9]*}}, {{%ymm[0-9][0-9]*}} {{.*#+}} 32-byte Folded Reload<br class=""> %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()<br class="">- %2 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x float> %a1)<br class="">+ %2 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a1, <8 x float> %a0)<br class=""> ret <8 x float> %2<br class="">}<br class="">declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x float>) nounwind readonly<br class=""><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@cs.uiuc.edu" class="">llvm-commits@cs.uiuc.edu</a><br class="">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits<br class=""></blockquote><br class=""></blockquote></blockquote></div></blockquote></div><br class=""></div></body></html>