<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class=""><div class=""></div><br class=""><div><blockquote type="cite" class=""><div class="">On Feb 5, 2015, at 1:00 PM, Alexey Samsonov <<a href="mailto:vonosmas@gmail.com" class="">vonosmas@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class=""><div class="">+Matthias<br class=""></div><div class=""><br class=""></div><div class="">Tom,</div><div class=""><br class=""></div><div class="">this change triggers a memory leak in subregister liveness analysis, and breaks ASan bootstrap of LLVM:</div><div class=""><a href="http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/1319/steps/check-llvm%20asan/logs/stdio" class="">http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/1319/steps/check-llvm%20asan/logs/stdio</a><br class=""></div><div class=""><br class=""></div><div class="">The bug is in include/llvm/CodeGen/LiveInterval.h:</div><div class="">LiveInterval class contains a linked list of SubRange objects, which are allocated with BumpPtrAllocator, and thus never deleted.</div><div class="">Each SubRange object contains a SmallVector<Segment, 4> of liveness segments. Thus, if the number of segments during the analysis will exceed 4,</div><div class="">small vector will reallocate its storage with malloc(), and that storage will never be deleted.</div><div class=""><br class=""></div><div class="">Matthias, you've added this code in r223877, any idea how to fix it? Probably we could allocate SubRange objects with SpecificBumpPtrAllocator<SubRange>,</div><div class="">but that won't work immediately, as the same BumpPtrAllocator is currently re-used for allocating VNInfo.</div><div class=""><br class=""></div><div class=""><br class=""></div></div><div class="gmail_extra"><br class=""><div class="gmail_quote">On Wed, Feb 4, 2015 at 3:14 PM, Tom Stellard <span dir="ltr" class=""><<a href="mailto:thomas.stellard@amd.com" target="_blank" class="">thomas.stellard@amd.com</a>></span> wrote:<br class=""><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: tstellar<br class="">
Date: Wed Feb 4 17:14:18 2015<br class="">
New Revision: 228228<br class="">
<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=228228&view=rev" target="_blank" class="">http://llvm.org/viewvc/llvm-project?rev=228228&view=rev</a><br class="">
Log:<br class="">
R600/SI: Enable subreg liveness by default<br class="">
<br class="">
Modified:<br class="">
llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h<br class="">
llvm/trunk/test/CodeGen/R600/imm.ll<br class="">
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll<br class="">
llvm/trunk/test/CodeGen/R600/setcc-opt.ll<br class="">
llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll<br class="">
<br class="">
Modified: llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h?rev=228228&r1=228227&r2=228228&view=diff" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h?rev=228228&r1=228227&r2=228228&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h (original)<br class="">
+++ llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h Wed Feb 4 17:14:18 2015<br class="">
@@ -243,6 +243,10 @@ public:<br class="">
// FIXME: Not sure what this is for other subtagets.<br class="">
llvm_unreachable("do not know max waves per CU for this subtarget.");<br class="">
}<br class="">
+<br class="">
+ bool enableSubRegLiveness() const override {<br class="">
+ return true;<br class="">
+ }<br class="">
};<br class="">
<br class="">
} // End namespace llvm<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/R600/imm.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/imm.ll?rev=228228&r1=228227&r2=228228&view=diff" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/imm.ll?rev=228228&r1=228227&r2=228228&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/CodeGen/R600/imm.ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/R600/imm.ll Wed Feb 4 17:14:18 2015<br class="">
@@ -24,7 +24,7 @@ entry:<br class="">
<br class="">
; CHECK-LABEL: {{^}}store_inline_imm_0.0_f32<br class="">
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 0{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @store_inline_imm_0.0_f32(float addrspace(1)* %out) {<br class="">
store float 0.0, float addrspace(1)* %out<br class="">
ret void<br class="">
@@ -32,7 +32,7 @@ define void @store_inline_imm_0.0_f32(fl<br class="">
<br class="">
; CHECK-LABEL: {{^}}store_imm_neg_0.0_f32<br class="">
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 0x80000000<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @store_imm_neg_0.0_f32(float addrspace(1)* %out) {<br class="">
store float -0.0, float addrspace(1)* %out<br class="">
ret void<br class="">
@@ -40,7 +40,7 @@ define void @store_imm_neg_0.0_f32(float<br class="">
<br class="">
; CHECK-LABEL: {{^}}store_inline_imm_0.5_f32<br class="">
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 0.5{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @store_inline_imm_0.5_f32(float addrspace(1)* %out) {<br class="">
store float 0.5, float addrspace(1)* %out<br class="">
ret void<br class="">
@@ -48,7 +48,7 @@ define void @store_inline_imm_0.5_f32(fl<br class="">
<br class="">
; CHECK-LABEL: {{^}}store_inline_imm_m_0.5_f32<br class="">
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], -0.5{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @store_inline_imm_m_0.5_f32(float addrspace(1)* %out) {<br class="">
store float -0.5, float addrspace(1)* %out<br class="">
ret void<br class="">
@@ -56,7 +56,7 @@ define void @store_inline_imm_m_0.5_f32(<br class="">
<br class="">
; CHECK-LABEL: {{^}}store_inline_imm_1.0_f32<br class="">
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 1.0{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @store_inline_imm_1.0_f32(float addrspace(1)* %out) {<br class="">
store float 1.0, float addrspace(1)* %out<br class="">
ret void<br class="">
@@ -64,7 +64,7 @@ define void @store_inline_imm_1.0_f32(fl<br class="">
<br class="">
; CHECK-LABEL: {{^}}store_inline_imm_m_1.0_f32<br class="">
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], -1.0{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @store_inline_imm_m_1.0_f32(float addrspace(1)* %out) {<br class="">
store float -1.0, float addrspace(1)* %out<br class="">
ret void<br class="">
@@ -72,7 +72,7 @@ define void @store_inline_imm_m_1.0_f32(<br class="">
<br class="">
; CHECK-LABEL: {{^}}store_inline_imm_2.0_f32<br class="">
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 2.0{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @store_inline_imm_2.0_f32(float addrspace(1)* %out) {<br class="">
store float 2.0, float addrspace(1)* %out<br class="">
ret void<br class="">
@@ -80,7 +80,7 @@ define void @store_inline_imm_2.0_f32(fl<br class="">
<br class="">
; CHECK-LABEL: {{^}}store_inline_imm_m_2.0_f32<br class="">
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], -2.0{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @store_inline_imm_m_2.0_f32(float addrspace(1)* %out) {<br class="">
store float -2.0, float addrspace(1)* %out<br class="">
ret void<br class="">
@@ -88,7 +88,7 @@ define void @store_inline_imm_m_2.0_f32(<br class="">
<br class="">
; CHECK-LABEL: {{^}}store_inline_imm_4.0_f32<br class="">
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 4.0{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @store_inline_imm_4.0_f32(float addrspace(1)* %out) {<br class="">
store float 4.0, float addrspace(1)* %out<br class="">
ret void<br class="">
@@ -96,7 +96,7 @@ define void @store_inline_imm_4.0_f32(fl<br class="">
<br class="">
; CHECK-LABEL: {{^}}store_inline_imm_m_4.0_f32<br class="">
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], -4.0{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @store_inline_imm_m_4.0_f32(float addrspace(1)* %out) {<br class="">
store float -4.0, float addrspace(1)* %out<br class="">
ret void<br class="">
@@ -104,7 +104,7 @@ define void @store_inline_imm_m_4.0_f32(<br class="">
<br class="">
; CHECK-LABEL: {{^}}store_literal_imm_f32:<br class="">
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 0x45800000<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @store_literal_imm_f32(float addrspace(1)* %out) {<br class="">
store float 4096.0, float addrspace(1)* %out<br class="">
ret void<br class="">
@@ -113,7 +113,7 @@ define void @store_literal_imm_f32(float<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_0.0_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 0, [[VAL]]{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_0.0_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 0.0<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -123,7 +123,7 @@ define void @add_inline_imm_0.0_f32(floa<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_0.5_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 0.5, [[VAL]]{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_0.5_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 0.5<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -133,7 +133,7 @@ define void @add_inline_imm_0.5_f32(floa<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_neg_0.5_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -0.5, [[VAL]]{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_neg_0.5_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, -0.5<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -143,7 +143,7 @@ define void @add_inline_imm_neg_0.5_f32(<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_1.0_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 1.0, [[VAL]]{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_1.0_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 1.0<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -153,7 +153,7 @@ define void @add_inline_imm_1.0_f32(floa<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_neg_1.0_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -1.0, [[VAL]]{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_neg_1.0_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, -1.0<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -163,7 +163,7 @@ define void @add_inline_imm_neg_1.0_f32(<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_2.0_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 2.0, [[VAL]]{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_2.0_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 2.0<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -173,7 +173,7 @@ define void @add_inline_imm_2.0_f32(floa<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_neg_2.0_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -2.0, [[VAL]]{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_neg_2.0_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, -2.0<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -183,7 +183,7 @@ define void @add_inline_imm_neg_2.0_f32(<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_4.0_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 4.0, [[VAL]]{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_4.0_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 4.0<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -193,7 +193,7 @@ define void @add_inline_imm_4.0_f32(floa<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_neg_4.0_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -4.0, [[VAL]]{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_neg_4.0_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, -4.0<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -203,7 +203,7 @@ define void @add_inline_imm_neg_4.0_f32(<br class="">
; CHECK-LABEL: @commute_add_inline_imm_0.5_f32<br class="">
; CHECK: buffer_load_dword [[VAL:v[0-9]+]]<br class="">
; CHECK: v_add_f32_e32 [[REG:v[0-9]+]], 0.5, [[VAL]]<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @commute_add_inline_imm_0.5_f32(float addrspace(1)* %out, float addrspace(1)* %in) {<br class="">
%x = load float addrspace(1)* %in<br class="">
%y = fadd float %x, 0.5<br class="">
@@ -214,7 +214,7 @@ define void @commute_add_inline_imm_0.5_<br class="">
; CHECK-LABEL: @commute_add_literal_f32<br class="">
; CHECK: buffer_load_dword [[VAL:v[0-9]+]]<br class="">
; CHECK: v_add_f32_e32 [[REG:v[0-9]+]], 0x44800000, [[VAL]]<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @commute_add_literal_f32(float addrspace(1)* %out, float addrspace(1)* %in) {<br class="">
%x = load float addrspace(1)* %in<br class="">
%y = fadd float %x, 1024.0<br class="">
@@ -225,7 +225,7 @@ define void @commute_add_literal_f32(flo<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_1_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 1, [[VAL]]{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_1_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 0x36a0000000000000<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -235,7 +235,7 @@ define void @add_inline_imm_1_f32(float<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_2_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 2, [[VAL]]{{$}}<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_2_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 0x36b0000000000000<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -245,7 +245,7 @@ define void @add_inline_imm_2_f32(float<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_16_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 16, [[VAL]]<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_16_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 0x36e0000000000000<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -255,7 +255,7 @@ define void @add_inline_imm_16_f32(float<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_neg_1_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -1, [[VAL]]<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_neg_1_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 0xffffffffe0000000<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -265,7 +265,7 @@ define void @add_inline_imm_neg_1_f32(fl<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_neg_2_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -2, [[VAL]]<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_neg_2_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 0xffffffffc0000000<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -275,7 +275,7 @@ define void @add_inline_imm_neg_2_f32(fl<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_neg_16_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -16, [[VAL]]<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_neg_16_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 0xfffffffe00000000<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -285,7 +285,7 @@ define void @add_inline_imm_neg_16_f32(f<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_63_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 63, [[VAL]]<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_63_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 0x36ff800000000000<br class="">
store float %y, float addrspace(1)* %out<br class="">
@@ -295,7 +295,7 @@ define void @add_inline_imm_63_f32(float<br class="">
; CHECK-LABEL: {{^}}add_inline_imm_64_f32<br class="">
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br class="">
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 64, [[VAL]]<br class="">
-; CHECK-NEXT: buffer_store_dword [[REG]]<br class="">
+; CHECK: buffer_store_dword [[REG]]<br class="">
define void @add_inline_imm_64_f32(float addrspace(1)* %out, float %x) {<br class="">
%y = fadd float %x, 0x3700000000000000<br class="">
store float %y, float addrspace(1)* %out<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll?rev=228228&r1=228227&r2=228228&view=diff" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll?rev=228228&r1=228227&r2=228228&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll Wed Feb 4 17:14:18 2015<br class="">
@@ -472,7 +472,7 @@ define void @test_no_fold_or_class_f32_0<br class="">
; SI-LABEL: {{^}}test_class_0_f32:<br class="">
; SI-NOT: v_cmp_class<br class="">
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}<br class="">
-; SI-NEXT: buffer_store_dword [[RESULT]]<br class="">
+; SI: buffer_store_dword [[RESULT]]<br class="">
; SI: s_endpgm<br class="">
define void @test_class_0_f32(i32 addrspace(1)* %out, float %a) #0 {<br class="">
%result = call i1 @llvm.AMDGPU.class.f32(float %a, i32 0) #1<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/R600/setcc-opt.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/setcc-opt.ll?rev=228228&r1=228227&r2=228228&view=diff" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/setcc-opt.ll?rev=228228&r1=228227&r2=228228&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/CodeGen/R600/setcc-opt.ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/R600/setcc-opt.ll Wed Feb 4 17:14:18 2015<br class="">
@@ -199,7 +199,7 @@ define void @cmp_sext_k_neg1_i8_arg(i1 a<br class="">
<br class="">
; FUNC-LABEL: {{^}}cmp_zext_k_neg1:<br class="">
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}<br class="">
-; SI-NEXT: buffer_store_byte [[RESULT]]<br class="">
+; SI: buffer_store_byte [[RESULT]]<br class="">
; SI: s_endpgm<br class="">
define void @cmp_zext_k_neg1(i1 addrspace(1)* %out, i8 %b) nounwind {<br class="">
%b.ext = zext i8 %b to i32<br class="">
@@ -210,7 +210,7 @@ define void @cmp_zext_k_neg1(i1 addrspac<br class="">
<br class="">
; FUNC-LABEL: {{^}}zext_bool_icmp_ne_k:<br class="">
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}<br class="">
-; SI-NEXT: buffer_store_byte [[RESULT]]<br class="">
+; SI: buffer_store_byte [[RESULT]]<br class="">
; SI-NEXT: s_endpgm<br class="">
define void @zext_bool_icmp_ne_k(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {<br class="">
%icmp0 = icmp ne i32 %a, %b<br class="">
@@ -222,7 +222,7 @@ define void @zext_bool_icmp_ne_k(i1 addr<br class="">
<br class="">
; FUNC-LABEL: {{^}}zext_bool_icmp_eq_k:<br class="">
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}<br class="">
-; SI-NEXT: buffer_store_byte [[RESULT]]<br class="">
+; SI: buffer_store_byte [[RESULT]]<br class="">
; SI-NEXT: s_endpgm<br class="">
define void @zext_bool_icmp_eq_k(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {<br class="">
%icmp0 = icmp ne i32 %a, %b<br class="">
<br class="">
Modified: llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll?rev=228228&r1=228227&r2=228228&view=diff" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll?rev=228228&r1=228227&r2=228228&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll (original)<br class="">
+++ llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll Wed Feb 4 17:14:18 2015<br class="">
@@ -34,7 +34,7 @@ define void @zextload_i1_to_i32_trunc_cm<br class="">
<br class="">
; FUNC-LABEL: {{^}}sextload_i1_to_i32_trunc_cmp_eq_1:<br class="">
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}<br class="">
-; SI-NEXT: buffer_store_byte [[RESULT]]<br class="">
+; SI: buffer_store_byte [[RESULT]]<br class="">
define void @sextload_i1_to_i32_trunc_cmp_eq_1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {<br class="">
%load = load i1 addrspace(1)* %in<br class="">
%ext = sext i1 %load to i32<br class="">
@@ -69,7 +69,7 @@ define void @sextload_i1_to_i32_trunc_cm<br class="">
<br class="">
; FUNC-LABEL: {{^}}zextload_i1_to_i32_trunc_cmp_eq_neg1:<br class="">
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}<br class="">
-; SI-NEXT: buffer_store_byte [[RESULT]]<br class="">
+; SI: buffer_store_byte [[RESULT]]<br class="">
define void @zextload_i1_to_i32_trunc_cmp_eq_neg1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {<br class="">
%load = load i1 addrspace(1)* %in<br class="">
%ext = zext i1 %load to i32<br class="">
@@ -105,7 +105,7 @@ define void @zextload_i1_to_i32_trunc_cm<br class="">
<br class="">
; FUNC-LABEL: {{^}}sextload_i1_to_i32_trunc_cmp_ne_1:<br class="">
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}<br class="">
-; SI-NEXT: buffer_store_byte [[RESULT]]<br class="">
+; SI: buffer_store_byte [[RESULT]]<br class="">
define void @sextload_i1_to_i32_trunc_cmp_ne_1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {<br class="">
%load = load i1 addrspace(1)* %in<br class="">
%ext = sext i1 %load to i32<br class="">
@@ -146,7 +146,7 @@ define void @sextload_i1_to_i32_trunc_cm<br class="">
<br class="">
; FUNC-LABEL: {{^}}zextload_i1_to_i32_trunc_cmp_ne_neg1:<br class="">
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}<br class="">
-; SI-NEXT: buffer_store_byte [[RESULT]]<br class="">
+; SI: buffer_store_byte [[RESULT]]<br class="">
define void @zextload_i1_to_i32_trunc_cmp_ne_neg1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {<br class="">
%load = load i1 addrspace(1)* %in<br class="">
%ext = zext i1 %load to i32<br class="">
<br class="">
<br class="">
_______________________________________________<br class="">
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<a href="mailto:llvm-commits@cs.uiuc.edu" class="">llvm-commits@cs.uiuc.edu</a><br class="">
<a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank" class="">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br class="">
</blockquote></div><br class=""><br clear="all" class=""><div class=""><br class=""></div>-- <br class=""><div class="gmail_signature"><div dir="ltr" class="">Alexey Samsonov<br class=""><a href="mailto:vonosmas@gmail.com" target="_blank" class="">vonosmas@gmail.com</a></div></div>
</div>
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