<div dir="ltr">Hi Matthias,<div><br></div><div>Patch looks good to me. You can verify that it fixes the problem by configuring your LLVM build tree with "-DLLVM_USE_SANITIZER=Address" and running "check-llvm" command.</div></div><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Feb 5, 2015 at 1:25 PM, Matthias Braun <span dir="ltr"><<a href="mailto:matze@braunis.de" target="_blank">matze@braunis.de</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div style="word-wrap:break-word"><div>Oh indeed that code leaks. The attached patch should fix it. Can you test it or give me a sequence of commands so I can test it myself?</div><span class="HOEnZb"><font color="#888888"><div><br></div><div>- Matthias</div><div><br></div><div></div></font></span></div><br><div style="word-wrap:break-word"><div></div><br><div><blockquote type="cite"><div>On Feb 5, 2015, at 1:00 PM, Alexey Samsonov <<a href="mailto:vonosmas@gmail.com" target="_blank">vonosmas@gmail.com</a>> wrote:</div><br><div><div dir="ltr"><div>+Matthias<br></div><div><br></div><div>Tom,</div><div><br></div><div>this change triggers a memory leak in subregister liveness analysis, and breaks ASan bootstrap of LLVM:</div><div><a href="http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/1319/steps/check-llvm%20asan/logs/stdio" target="_blank">http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/1319/steps/check-llvm%20asan/logs/stdio</a><br></div><div><br></div><div>The bug is in include/llvm/CodeGen/LiveInterval.h:</div><div>LiveInterval class contains a linked list of SubRange objects, which are allocated with BumpPtrAllocator, and thus never deleted.</div><div>Each SubRange object contains a SmallVector<Segment, 4> of liveness segments. Thus, if the number of segments during the analysis will exceed 4,</div><div>small vector will reallocate its storage with malloc(), and that storage will never be deleted.</div><div><br></div><div>Matthias, you've added this code in r223877, any idea how to fix it? Probably we could allocate SubRange objects with SpecificBumpPtrAllocator<SubRange>,</div><div>but that won't work immediately, as the same BumpPtrAllocator is currently re-used for allocating VNInfo.</div><div><br></div><div><br></div></div><div class="gmail_extra"><br><div class="gmail_quote">On Wed, Feb 4, 2015 at 3:14 PM, Tom Stellard <span dir="ltr"><<a href="mailto:thomas.stellard@amd.com" target="_blank">thomas.stellard@amd.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: tstellar<br>
Date: Wed Feb 4 17:14:18 2015<br>
New Revision: 228228<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=228228&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=228228&view=rev</a><br>
Log:<br>
R600/SI: Enable subreg liveness by default<br>
<br>
Modified:<br>
llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h<br>
llvm/trunk/test/CodeGen/R600/imm.ll<br>
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll<br>
llvm/trunk/test/CodeGen/R600/setcc-opt.ll<br>
llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll<br>
<br>
Modified: llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h?rev=228228&r1=228227&r2=228228&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h?rev=228228&r1=228227&r2=228228&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h (original)<br>
+++ llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h Wed Feb 4 17:14:18 2015<br>
@@ -243,6 +243,10 @@ public:<br>
// FIXME: Not sure what this is for other subtagets.<br>
llvm_unreachable("do not know max waves per CU for this subtarget.");<br>
}<br>
+<br>
+ bool enableSubRegLiveness() const override {<br>
+ return true;<br>
+ }<br>
};<br>
<br>
} // End namespace llvm<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/imm.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/imm.ll?rev=228228&r1=228227&r2=228228&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/imm.ll?rev=228228&r1=228227&r2=228228&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/R600/imm.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/imm.ll Wed Feb 4 17:14:18 2015<br>
@@ -24,7 +24,7 @@ entry:<br>
<br>
; CHECK-LABEL: {{^}}store_inline_imm_0.0_f32<br>
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 0{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @store_inline_imm_0.0_f32(float addrspace(1)* %out) {<br>
store float 0.0, float addrspace(1)* %out<br>
ret void<br>
@@ -32,7 +32,7 @@ define void @store_inline_imm_0.0_f32(fl<br>
<br>
; CHECK-LABEL: {{^}}store_imm_neg_0.0_f32<br>
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 0x80000000<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @store_imm_neg_0.0_f32(float addrspace(1)* %out) {<br>
store float -0.0, float addrspace(1)* %out<br>
ret void<br>
@@ -40,7 +40,7 @@ define void @store_imm_neg_0.0_f32(float<br>
<br>
; CHECK-LABEL: {{^}}store_inline_imm_0.5_f32<br>
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 0.5{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @store_inline_imm_0.5_f32(float addrspace(1)* %out) {<br>
store float 0.5, float addrspace(1)* %out<br>
ret void<br>
@@ -48,7 +48,7 @@ define void @store_inline_imm_0.5_f32(fl<br>
<br>
; CHECK-LABEL: {{^}}store_inline_imm_m_0.5_f32<br>
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], -0.5{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @store_inline_imm_m_0.5_f32(float addrspace(1)* %out) {<br>
store float -0.5, float addrspace(1)* %out<br>
ret void<br>
@@ -56,7 +56,7 @@ define void @store_inline_imm_m_0.5_f32(<br>
<br>
; CHECK-LABEL: {{^}}store_inline_imm_1.0_f32<br>
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 1.0{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @store_inline_imm_1.0_f32(float addrspace(1)* %out) {<br>
store float 1.0, float addrspace(1)* %out<br>
ret void<br>
@@ -64,7 +64,7 @@ define void @store_inline_imm_1.0_f32(fl<br>
<br>
; CHECK-LABEL: {{^}}store_inline_imm_m_1.0_f32<br>
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], -1.0{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @store_inline_imm_m_1.0_f32(float addrspace(1)* %out) {<br>
store float -1.0, float addrspace(1)* %out<br>
ret void<br>
@@ -72,7 +72,7 @@ define void @store_inline_imm_m_1.0_f32(<br>
<br>
; CHECK-LABEL: {{^}}store_inline_imm_2.0_f32<br>
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 2.0{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @store_inline_imm_2.0_f32(float addrspace(1)* %out) {<br>
store float 2.0, float addrspace(1)* %out<br>
ret void<br>
@@ -80,7 +80,7 @@ define void @store_inline_imm_2.0_f32(fl<br>
<br>
; CHECK-LABEL: {{^}}store_inline_imm_m_2.0_f32<br>
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], -2.0{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @store_inline_imm_m_2.0_f32(float addrspace(1)* %out) {<br>
store float -2.0, float addrspace(1)* %out<br>
ret void<br>
@@ -88,7 +88,7 @@ define void @store_inline_imm_m_2.0_f32(<br>
<br>
; CHECK-LABEL: {{^}}store_inline_imm_4.0_f32<br>
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 4.0{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @store_inline_imm_4.0_f32(float addrspace(1)* %out) {<br>
store float 4.0, float addrspace(1)* %out<br>
ret void<br>
@@ -96,7 +96,7 @@ define void @store_inline_imm_4.0_f32(fl<br>
<br>
; CHECK-LABEL: {{^}}store_inline_imm_m_4.0_f32<br>
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], -4.0{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @store_inline_imm_m_4.0_f32(float addrspace(1)* %out) {<br>
store float -4.0, float addrspace(1)* %out<br>
ret void<br>
@@ -104,7 +104,7 @@ define void @store_inline_imm_m_4.0_f32(<br>
<br>
; CHECK-LABEL: {{^}}store_literal_imm_f32:<br>
; CHECK: v_mov_b32_e32 [[REG:v[0-9]+]], 0x45800000<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @store_literal_imm_f32(float addrspace(1)* %out) {<br>
store float 4096.0, float addrspace(1)* %out<br>
ret void<br>
@@ -113,7 +113,7 @@ define void @store_literal_imm_f32(float<br>
; CHECK-LABEL: {{^}}add_inline_imm_0.0_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 0, [[VAL]]{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_0.0_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 0.0<br>
store float %y, float addrspace(1)* %out<br>
@@ -123,7 +123,7 @@ define void @add_inline_imm_0.0_f32(floa<br>
; CHECK-LABEL: {{^}}add_inline_imm_0.5_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 0.5, [[VAL]]{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_0.5_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 0.5<br>
store float %y, float addrspace(1)* %out<br>
@@ -133,7 +133,7 @@ define void @add_inline_imm_0.5_f32(floa<br>
; CHECK-LABEL: {{^}}add_inline_imm_neg_0.5_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -0.5, [[VAL]]{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_neg_0.5_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, -0.5<br>
store float %y, float addrspace(1)* %out<br>
@@ -143,7 +143,7 @@ define void @add_inline_imm_neg_0.5_f32(<br>
; CHECK-LABEL: {{^}}add_inline_imm_1.0_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 1.0, [[VAL]]{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_1.0_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 1.0<br>
store float %y, float addrspace(1)* %out<br>
@@ -153,7 +153,7 @@ define void @add_inline_imm_1.0_f32(floa<br>
; CHECK-LABEL: {{^}}add_inline_imm_neg_1.0_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -1.0, [[VAL]]{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_neg_1.0_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, -1.0<br>
store float %y, float addrspace(1)* %out<br>
@@ -163,7 +163,7 @@ define void @add_inline_imm_neg_1.0_f32(<br>
; CHECK-LABEL: {{^}}add_inline_imm_2.0_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 2.0, [[VAL]]{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_2.0_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 2.0<br>
store float %y, float addrspace(1)* %out<br>
@@ -173,7 +173,7 @@ define void @add_inline_imm_2.0_f32(floa<br>
; CHECK-LABEL: {{^}}add_inline_imm_neg_2.0_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -2.0, [[VAL]]{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_neg_2.0_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, -2.0<br>
store float %y, float addrspace(1)* %out<br>
@@ -183,7 +183,7 @@ define void @add_inline_imm_neg_2.0_f32(<br>
; CHECK-LABEL: {{^}}add_inline_imm_4.0_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 4.0, [[VAL]]{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_4.0_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 4.0<br>
store float %y, float addrspace(1)* %out<br>
@@ -193,7 +193,7 @@ define void @add_inline_imm_4.0_f32(floa<br>
; CHECK-LABEL: {{^}}add_inline_imm_neg_4.0_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -4.0, [[VAL]]{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_neg_4.0_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, -4.0<br>
store float %y, float addrspace(1)* %out<br>
@@ -203,7 +203,7 @@ define void @add_inline_imm_neg_4.0_f32(<br>
; CHECK-LABEL: @commute_add_inline_imm_0.5_f32<br>
; CHECK: buffer_load_dword [[VAL:v[0-9]+]]<br>
; CHECK: v_add_f32_e32 [[REG:v[0-9]+]], 0.5, [[VAL]]<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @commute_add_inline_imm_0.5_f32(float addrspace(1)* %out, float addrspace(1)* %in) {<br>
%x = load float addrspace(1)* %in<br>
%y = fadd float %x, 0.5<br>
@@ -214,7 +214,7 @@ define void @commute_add_inline_imm_0.5_<br>
; CHECK-LABEL: @commute_add_literal_f32<br>
; CHECK: buffer_load_dword [[VAL:v[0-9]+]]<br>
; CHECK: v_add_f32_e32 [[REG:v[0-9]+]], 0x44800000, [[VAL]]<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @commute_add_literal_f32(float addrspace(1)* %out, float addrspace(1)* %in) {<br>
%x = load float addrspace(1)* %in<br>
%y = fadd float %x, 1024.0<br>
@@ -225,7 +225,7 @@ define void @commute_add_literal_f32(flo<br>
; CHECK-LABEL: {{^}}add_inline_imm_1_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 1, [[VAL]]{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_1_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 0x36a0000000000000<br>
store float %y, float addrspace(1)* %out<br>
@@ -235,7 +235,7 @@ define void @add_inline_imm_1_f32(float<br>
; CHECK-LABEL: {{^}}add_inline_imm_2_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 2, [[VAL]]{{$}}<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_2_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 0x36b0000000000000<br>
store float %y, float addrspace(1)* %out<br>
@@ -245,7 +245,7 @@ define void @add_inline_imm_2_f32(float<br>
; CHECK-LABEL: {{^}}add_inline_imm_16_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 16, [[VAL]]<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_16_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 0x36e0000000000000<br>
store float %y, float addrspace(1)* %out<br>
@@ -255,7 +255,7 @@ define void @add_inline_imm_16_f32(float<br>
; CHECK-LABEL: {{^}}add_inline_imm_neg_1_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -1, [[VAL]]<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_neg_1_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 0xffffffffe0000000<br>
store float %y, float addrspace(1)* %out<br>
@@ -265,7 +265,7 @@ define void @add_inline_imm_neg_1_f32(fl<br>
; CHECK-LABEL: {{^}}add_inline_imm_neg_2_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -2, [[VAL]]<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_neg_2_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 0xffffffffc0000000<br>
store float %y, float addrspace(1)* %out<br>
@@ -275,7 +275,7 @@ define void @add_inline_imm_neg_2_f32(fl<br>
; CHECK-LABEL: {{^}}add_inline_imm_neg_16_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], -16, [[VAL]]<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_neg_16_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 0xfffffffe00000000<br>
store float %y, float addrspace(1)* %out<br>
@@ -285,7 +285,7 @@ define void @add_inline_imm_neg_16_f32(f<br>
; CHECK-LABEL: {{^}}add_inline_imm_63_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 63, [[VAL]]<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_63_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 0x36ff800000000000<br>
store float %y, float addrspace(1)* %out<br>
@@ -295,7 +295,7 @@ define void @add_inline_imm_63_f32(float<br>
; CHECK-LABEL: {{^}}add_inline_imm_64_f32<br>
; CHECK: s_load_dword [[VAL:s[0-9]+]]<br>
; CHECK: v_add_f32_e64 [[REG:v[0-9]+]], 64, [[VAL]]<br>
-; CHECK-NEXT: buffer_store_dword [[REG]]<br>
+; CHECK: buffer_store_dword [[REG]]<br>
define void @add_inline_imm_64_f32(float addrspace(1)* %out, float %x) {<br>
%y = fadd float %x, 0x3700000000000000<br>
store float %y, float addrspace(1)* %out<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll?rev=228228&r1=228227&r2=228228&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll?rev=228228&r1=228227&r2=228228&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.class.ll Wed Feb 4 17:14:18 2015<br>
@@ -472,7 +472,7 @@ define void @test_no_fold_or_class_f32_0<br>
; SI-LABEL: {{^}}test_class_0_f32:<br>
; SI-NOT: v_cmp_class<br>
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}<br>
-; SI-NEXT: buffer_store_dword [[RESULT]]<br>
+; SI: buffer_store_dword [[RESULT]]<br>
; SI: s_endpgm<br>
define void @test_class_0_f32(i32 addrspace(1)* %out, float %a) #0 {<br>
%result = call i1 @llvm.AMDGPU.class.f32(float %a, i32 0) #1<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/setcc-opt.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/setcc-opt.ll?rev=228228&r1=228227&r2=228228&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/setcc-opt.ll?rev=228228&r1=228227&r2=228228&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/R600/setcc-opt.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/setcc-opt.ll Wed Feb 4 17:14:18 2015<br>
@@ -199,7 +199,7 @@ define void @cmp_sext_k_neg1_i8_arg(i1 a<br>
<br>
; FUNC-LABEL: {{^}}cmp_zext_k_neg1:<br>
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}<br>
-; SI-NEXT: buffer_store_byte [[RESULT]]<br>
+; SI: buffer_store_byte [[RESULT]]<br>
; SI: s_endpgm<br>
define void @cmp_zext_k_neg1(i1 addrspace(1)* %out, i8 %b) nounwind {<br>
%b.ext = zext i8 %b to i32<br>
@@ -210,7 +210,7 @@ define void @cmp_zext_k_neg1(i1 addrspac<br>
<br>
; FUNC-LABEL: {{^}}zext_bool_icmp_ne_k:<br>
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}<br>
-; SI-NEXT: buffer_store_byte [[RESULT]]<br>
+; SI: buffer_store_byte [[RESULT]]<br>
; SI-NEXT: s_endpgm<br>
define void @zext_bool_icmp_ne_k(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {<br>
%icmp0 = icmp ne i32 %a, %b<br>
@@ -222,7 +222,7 @@ define void @zext_bool_icmp_ne_k(i1 addr<br>
<br>
; FUNC-LABEL: {{^}}zext_bool_icmp_eq_k:<br>
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}<br>
-; SI-NEXT: buffer_store_byte [[RESULT]]<br>
+; SI: buffer_store_byte [[RESULT]]<br>
; SI-NEXT: s_endpgm<br>
define void @zext_bool_icmp_eq_k(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind {<br>
%icmp0 = icmp ne i32 %a, %b<br>
<br>
Modified: llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll?rev=228228&r1=228227&r2=228228&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll?rev=228228&r1=228227&r2=228228&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll (original)<br>
+++ llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll Wed Feb 4 17:14:18 2015<br>
@@ -34,7 +34,7 @@ define void @zextload_i1_to_i32_trunc_cm<br>
<br>
; FUNC-LABEL: {{^}}sextload_i1_to_i32_trunc_cmp_eq_1:<br>
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}<br>
-; SI-NEXT: buffer_store_byte [[RESULT]]<br>
+; SI: buffer_store_byte [[RESULT]]<br>
define void @sextload_i1_to_i32_trunc_cmp_eq_1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {<br>
%load = load i1 addrspace(1)* %in<br>
%ext = sext i1 %load to i32<br>
@@ -69,7 +69,7 @@ define void @sextload_i1_to_i32_trunc_cm<br>
<br>
; FUNC-LABEL: {{^}}zextload_i1_to_i32_trunc_cmp_eq_neg1:<br>
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}<br>
-; SI-NEXT: buffer_store_byte [[RESULT]]<br>
+; SI: buffer_store_byte [[RESULT]]<br>
define void @zextload_i1_to_i32_trunc_cmp_eq_neg1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {<br>
%load = load i1 addrspace(1)* %in<br>
%ext = zext i1 %load to i32<br>
@@ -105,7 +105,7 @@ define void @zextload_i1_to_i32_trunc_cm<br>
<br>
; FUNC-LABEL: {{^}}sextload_i1_to_i32_trunc_cmp_ne_1:<br>
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}<br>
-; SI-NEXT: buffer_store_byte [[RESULT]]<br>
+; SI: buffer_store_byte [[RESULT]]<br>
define void @sextload_i1_to_i32_trunc_cmp_ne_1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {<br>
%load = load i1 addrspace(1)* %in<br>
%ext = sext i1 %load to i32<br>
@@ -146,7 +146,7 @@ define void @sextload_i1_to_i32_trunc_cm<br>
<br>
; FUNC-LABEL: {{^}}zextload_i1_to_i32_trunc_cmp_ne_neg1:<br>
; SI: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}<br>
-; SI-NEXT: buffer_store_byte [[RESULT]]<br>
+; SI: buffer_store_byte [[RESULT]]<br>
define void @zextload_i1_to_i32_trunc_cmp_ne_neg1(i1 addrspace(1)* %out, i1 addrspace(1)* %in) nounwind {<br>
%load = load i1 addrspace(1)* %in<br>
%ext = zext i1 %load to i32<br>
<br>
<br>
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</blockquote></div><br><br clear="all"><div><br></div>-- <br><div><div dir="ltr">Alexey Samsonov<br><a href="mailto:vonosmas@gmail.com" target="_blank">vonosmas@gmail.com</a></div></div>
</div>
_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank">llvm-commits@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br></div></blockquote></div><br></div><br></blockquote></div><br><br clear="all"><div><br></div>-- <br><div class="gmail_signature"><div dir="ltr">Alexey Samsonov<br><a href="mailto:vonosmas@gmail.com" target="_blank">vonosmas@gmail.com</a></div></div>
</div>