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<div class="moz-cite-prefix">On 1/6/2015 11:30 PM, Tom Stellard
wrote:<br>
</div>
<blockquote class=" cite"
id="mid_20150106180000_9407A2A6C02B_llvm_org"
cite="mid:20150106180000.9407A2A6C02B@llvm.org" type="cite">
<pre wrap="">Author: tstellar
Date: Tue Jan 6 12:00:00 2015
New Revision: 225276
URL: <a class="moz-txt-link-freetext" href="http://llvm.org/viewvc/llvm-project?rev=225276&view=rev">http://llvm.org/viewvc/llvm-project?rev=225276&view=rev</a>
Log:
Triple: Add amdgcn triple
This will be used for AMD GPUs with the Graphics Core Next architecture,
which are currently using by the r600 triple.
Modified:
llvm/trunk/include/llvm/ADT/Triple.h
llvm/trunk/lib/Support/Triple.cpp
Modified: llvm/trunk/include/llvm/ADT/Triple.h
URL: <a class="moz-txt-link-freetext" href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=225276&r1=225275&r2=225276&view=diff">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/ADT/Triple.h?rev=225276&r1=225275&r2=225276&view=diff</a>
==============================================================================
--- llvm/trunk/include/llvm/ADT/Triple.h (original)
+++ llvm/trunk/include/llvm/ADT/Triple.h Tue Jan 6 12:00:00 2015
@@ -60,6 +60,7 @@ public:
ppc64, // PPC64: powerpc64, ppu
ppc64le, // PPC64LE: powerpc64le
r600, // R600: AMD GPUs HD2XXX - HD6XXX
+ amdgcn, // AMDGCN: AMD GCN GPUs
sparc, // Sparc: sparc
sparcv9, // Sparcv9: Sparcv9
systemz, // SystemZ: s390x</pre>
</blockquote>
<br>
The surrounding lines look like the members are alphabetically
sorted. But those beyond "xcore" are not. Does that mean that there
is no prevalent policy on where to place a new member?<br>
<br>
Sameer.<br>
<br>
<blockquote class=" cite"
id="mid_20150106180000_9407A2A6C02B_llvm_org"
cite="mid:20150106180000.9407A2A6C02B@llvm.org" type="cite">
<pre wrap="">
Modified: llvm/trunk/lib/Support/Triple.cpp
URL: <a class="moz-txt-link-freetext" href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=225276&r1=225275&r2=225276&view=diff">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Triple.cpp?rev=225276&r1=225275&r2=225276&view=diff</a>
==============================================================================
--- llvm/trunk/lib/Support/Triple.cpp (original)
+++ llvm/trunk/lib/Support/Triple.cpp Tue Jan 6 12:00:00 2015
@@ -33,6 +33,7 @@ const char *Triple::getArchTypeName(Arch
case ppc64le: return "powerpc64le";
case ppc: return "powerpc";
case r600: return "r600";
+ case amdgcn: return "amdgcn";
case sparc: return "sparc";
case sparcv9: return "sparcv9";
case systemz: return "s390x";
@@ -82,7 +83,8 @@ const char *Triple::getArchTypePrefix(Ar
case hexagon: return "hexagon";
- case r600: return "r600";
+ case amdgcn:
+ case r600: return "amdgpu";
case sparcv9:
case sparc: return "sparc";
@@ -199,6 +201,7 @@ Triple::ArchType Triple::getArchTypeForL
.Case("ppc", ppc)
.Case("ppc64le", ppc64le)
.Case("r600", r600)
+ .Case("amdgcn", amdgcn)
.Case("hexagon", hexagon)
.Case("sparc", sparc)
.Case("sparcv9", sparcv9)
@@ -286,6 +289,7 @@ static Triple::ArchType parseArch(String
.Cases("mips64", "mips64eb", Triple::mips64)
.Case("mips64el", Triple::mips64el)
.Case("r600", Triple::r600)
+ .Case("amdgcn", Triple::amdgcn)
.Case("hexagon", Triple::hexagon)
.Case("s390x", Triple::systemz)
.Case("sparc", Triple::sparc)
@@ -864,6 +868,7 @@ static unsigned getArchPointerBitWidth(l
case llvm::Triple::aarch64:
case llvm::Triple::aarch64_be:
+ case llvm::Triple::amdgcn:
case llvm::Triple::le64:
case llvm::Triple::mips64:
case llvm::Triple::mips64el:
@@ -899,6 +904,7 @@ Triple Triple::get32BitArchVariant() con
case Triple::UnknownArch:
case Triple::aarch64:
case Triple::aarch64_be:
+ case Triple::amdgcn:
case Triple::msp430:
case Triple::systemz:
case Triple::ppc64le:
@@ -962,6 +968,7 @@ Triple Triple::get64BitArchVariant() con
case Triple::aarch64_be:
case Triple::le64:
case Triple::amdil64:
+ case Triple::amdgcn:
case Triple::hsail64:
case Triple::spir64:
case Triple::mips64:
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</pre>
</blockquote>
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