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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">>
</span>Well, VSELECT can be translated to an instruction, so I think that’s different. If the VSELECT and the op get separated we generate less efficient code so that’s always OK.<o:p></o:p></p>
<p class="MsoNormal">It may cause FP exception.<o:p></o:p></p>
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</span>In this case I am not convinced that we can’t generate the wrong result.<o:p></o:p></p>
<p class="MsoNormal">If ROUNDMODE and instruction will be separated somehow, the compilation will fail.
<o:p></o:p></p>
<p class="MsoNormal">I say “somehow” because we are talking about intrinsic that mapped directly to instruction - everything is legal inside.<o:p></o:p></p>
<p class="MsoNormal">Can you give an example?<o:p></o:p></p>
<p class="MsoNormal">The alternative is to invent one more node per instruction that needs rounding mode.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">> It’s an important enough design decision for the AVX512 SDAG IR to warrant some scrutiny.<o:p></o:p></p>
<p class="MsoNormal">> I suggest to properly comment this node and provide explanation in the review itself and CC a few more people (Nadav, Chandler, Hal, Jim, etc.)<o:p></o:p></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">I see this as a small patch which resolves FP intrinsics rounding mode, but no problem, we can widen the list of reviewers.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<![if !supportLists]><span style="font-family:"Calibri","sans-serif";color:#31849B"><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span dir="LTR"></span><b><i><span style="color:#31849B"> Elena<o:p></o:p></span></i></b></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Adam Nemet [mailto:anemet@apple.com]
<br>
<b>Sent:</b> Wednesday, January 07, 2015 20:09<br>
<b>To:</b> Demikhovsky, Elena<br>
<b>Cc:</b> reviews+D6835+public+db07cccdafa4527c@reviews.llvm.org; Badouh, Asaf; llvm-commits@cs.uiuc.edu<br>
<b>Subject:</b> Re: [PATCH] [AVX-512] - Add FMA instruction with Rounding mode<o:p></o:p></span></p>
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<p class="MsoNormal">On Jan 6, 2015, at 11:12 PM, Demikhovsky, Elena <<a href="mailto:elena.demikhovsky@intel.com">elena.demikhovsky@intel.com</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal"><span style="font-size:9.0pt;font-family:"Helvetica","sans-serif""><br>
<br>
- Elena<br>
<br>
-----Original Message-----<br>
From: Adam Nemet [</span><a href="mailto:anemet@apple.com"><span style="font-size:9.0pt;font-family:"Helvetica","sans-serif"">mailto:anemet@apple.com</span></a><span style="font-size:9.0pt;font-family:"Helvetica","sans-serif"">]<span class="apple-converted-space"> </span><br>
Sent: Wednesday, January 07, 2015 03:04<br>
To: Badouh, Asaf; Demikhovsky, Elena;<span class="apple-converted-space"> </span></span><a href="mailto:anemet@apple.com"><span style="font-size:9.0pt;font-family:"Helvetica","sans-serif"">anemet@apple.com</span></a><span style="font-size:9.0pt;font-family:"Helvetica","sans-serif""><br>
Cc:<span class="apple-converted-space"> </span></span><a href="mailto:cameron.mcinally@nyu.edu"><span style="font-size:9.0pt;font-family:"Helvetica","sans-serif"">cameron.mcinally@nyu.edu</span></a><span style="font-size:9.0pt;font-family:"Helvetica","sans-serif"">;<span class="apple-converted-space"> </span></span><a href="mailto:llvm-commits@cs.uiuc.edu"><span style="font-size:9.0pt;font-family:"Helvetica","sans-serif"">llvm-commits@cs.uiuc.edu</span></a><span style="font-size:9.0pt;font-family:"Helvetica","sans-serif""><br>
Subject: Re: [PATCH] [AVX-512] - Add FMA instruction with Rounding mode<br>
<br>
REPOSITORY<br>
rL LLVM<br>
<br>
================<br>
Comment at: lib/Target/X86/X86ISelLowering.h:374<br>
@@ -373,1 +373,3 @@<br>
<br>
+ ROUNDMODE,<br>
+<br>
----------------<br>
Hmm, has this been completely thought through? I may have missed the discussion...<span class="apple-converted-space"> </span><br>
<br>
Looks like you're introducing a new node that if it surrounds an FMA op it changes its rounding mode?<br>
<br>
What happens if the two nodes get separated by some transformation?<br>
[Demikhovsky, Elena] We surround with VSELECT to set mask for intrinsic. The idea here is the same, even less risky. The stage is late, all transformations are behind.<br>
We plan to use this node for all FP arithmetic and conversion intrinsics.</span><o:p></o:p></p>
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<p class="MsoNormal">Well, VSELECT can be translated to an instruction, so I think that’s different. If the VSELECT and the op get separated we generate less efficient code so that’s always OK. In this case I am not convinced that we can’t generate the wrong
result.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">My main point is that unless this was discussed somewhere else, it shouldn’t be hidden in a patch like this. It’s an important enough design decision for the AVX512 SDAG IR to warrant some scrutiny.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">I suggest to properly comment this node and provide explanation in the review itself and CC a few more people (Nadav, Chandler, Hal, Jim, etc.)<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Thanks,<o:p></o:p></p>
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<p class="MsoNormal">Adam<o:p></o:p></p>
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<p class="MsoNormal"><br>
<br>
<o:p></o:p></p>
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<p class="MsoNormal"><span style="font-size:9.0pt;font-family:"Helvetica","sans-serif""><br>
================<br>
Comment at: lib/Target/X86/X86InstrAVX512.td:3541-3542<br>
@@ +3540,4 @@<br>
+ X86VectorVTInfo VTI, SDPatternOperator<span class="apple-converted-space"> </span><br>
+ OpNode> { defm v213r : avx512_fma3_round_rrb<opc213, !strconcat(OpcodeStr, "213", VTI.Suffix),<br>
+ VTI, OpNode>, EVEX_CD8<VTI.EltSize,<span class="apple-converted-space"> </span><br>
+ CD8VF>;<br>
+<br>
----------------<br>
I think that the EVEX_CD8 thing can be written as VTI.CD8TupleForm.<br>
<br>
Same later.<br>
<br>
<a href="http://reviews.llvm.org/D6835">http://reviews.llvm.org/D6835</a><br>
<br>
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