<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Thanks, I reverted the commit temporarily in <span style="font-family: Menlo; font-size: 14px;" class="">r225288</span>.<div class=""><br class=""></div><div class="">-- adrian</div><div class=""><br class=""><div><blockquote type="cite" class=""><div class="">On Jan 6, 2015, at 11:46 AM, Alexey Samsonov <<a href="mailto:vonosmas@gmail.com" class="">vonosmas@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class="">Hi Adrian,<div class=""><br class=""></div><div class="">I think this caused <a href="http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/15128/steps/run%20sanitizer%20tests%20in%20gcc%20build/logs/stdio" class="">http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/15128/steps/run%20sanitizer%20tests%20in%20gcc%20build/logs/stdio</a></div></div><div class="gmail_extra"><br class=""><div class="gmail_quote">On Tue, Jan 6, 2015 at 9:14 AM, Adrian Prantl <span dir="ltr" class=""><<a href="mailto:aprantl@apple.com" target="_blank" class="">aprantl@apple.com</a>></span> wrote:<br class=""><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: adrian<br class="">
Date: Tue Jan 6 11:14:10 2015<br class="">
New Revision: 225272<br class="">
<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=225272&view=rev" target="_blank" class="">http://llvm.org/viewvc/llvm-project?rev=225272&view=rev</a><br class="">
Log:<br class="">
Reapply: Teach SROA how to update debug info for fragmented variables.<br class="">
This also rolls in the changes discussed in <a href="http://reviews.llvm.org/D6766" target="_blank" class="">http://reviews.llvm.org/D6766</a>.<br class="">
Defers migrating the debug info for new allocas until after all partitions<br class="">
are created.<br class="">
<br class="">
Thanks to Chandler for reviewing!<br class="">
<br class="">
Added:<br class="">
llvm/trunk/test/DebugInfo/X86/sroasplit-1.ll<br class="">
llvm/trunk/test/DebugInfo/X86/sroasplit-2.ll<br class="">
llvm/trunk/test/DebugInfo/X86/sroasplit-3.ll<br class="">
Modified:<br class="">
llvm/trunk/lib/Transforms/Scalar/SROA.cpp<br class="">
llvm/trunk/test/DebugInfo/X86/array2.ll<br class="">
<br class="">
Modified: llvm/trunk/lib/Transforms/Scalar/SROA.cpp<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SROA.cpp?rev=225272&r1=225271&r2=225272&view=diff" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SROA.cpp?rev=225272&r1=225271&r2=225272&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/lib/Transforms/Scalar/SROA.cpp (original)<br class="">
+++ llvm/trunk/lib/Transforms/Scalar/SROA.cpp Tue Jan 6 11:14:10 2015<br class="">
@@ -1240,6 +1240,10 @@ class SROA : public FunctionPass {<br class="">
/// currently in the promotable queue.<br class="">
SetVector<SelectInst *, SmallVector<SelectInst *, 2>> SpeculatableSelects;<br class="">
<br class="">
+ /// Debug intrinsics do not show up as regular uses in the<br class="">
+ /// IR. This side-table holds the missing use edges.<br class="">
+ DenseMap<AllocaInst *, DbgDeclareInst *> DbgDeclares;<br class="">
+<br class="">
public:<br class="">
SROA(bool RequiresDomTree = true)<br class="">
: FunctionPass(ID), RequiresDomTree(RequiresDomTree), C(nullptr),<br class="">
@@ -1257,8 +1261,8 @@ private:<br class="">
friend class AllocaSliceRewriter;<br class="">
<br class="">
bool presplitLoadsAndStores(AllocaInst &AI, AllocaSlices &AS);<br class="">
- bool rewritePartition(AllocaInst &AI, AllocaSlices &AS,<br class="">
- AllocaSlices::Partition &P);<br class="">
+ AllocaInst *rewritePartition(AllocaInst &AI, AllocaSlices &AS,<br class="">
+ AllocaSlices::Partition &P);<br class="">
bool splitAlloca(AllocaInst &AI, AllocaSlices &AS);<br class="">
bool runOnAlloca(AllocaInst &AI);<br class="">
void clobberUse(Use &U);<br class="">
@@ -3964,8 +3968,8 @@ bool SROA::presplitLoadsAndStores(Alloca<br class="">
/// appropriate new offsets. It also evaluates how successful the rewrite was<br class="">
/// at enabling promotion and if it was successful queues the alloca to be<br class="">
/// promoted.<br class="">
-bool SROA::rewritePartition(AllocaInst &AI, AllocaSlices &AS,<br class="">
- AllocaSlices::Partition &P) {<br class="">
+AllocaInst *SROA::rewritePartition(AllocaInst &AI, AllocaSlices &AS,<br class="">
+ AllocaSlices::Partition &P) {<br class="">
// Try to compute a friendly type for this partition of the alloca. This<br class="">
// won't always succeed, in which case we fall back to a legal integer type<br class="">
// or an i8 array of an appropriate size.<br class="">
@@ -4003,6 +4007,7 @@ bool SROA::rewritePartition(AllocaInst &<br class="">
NewAI = &AI;<br class="">
// FIXME: We should be able to bail at this point with "nothing changed".<br class="">
// FIXME: We might want to defer PHI speculation until after here.<br class="">
+ // FIXME: return nullptr;<br class="">
} else {<br class="">
unsigned Alignment = AI.getAlignment();<br class="">
if (!Alignment) {<br class="">
@@ -4098,7 +4103,7 @@ bool SROA::rewritePartition(AllocaInst &<br class="">
PostPromotionWorklist.pop_back();<br class="">
}<br class="">
<br class="">
- return true;<br class="">
+ return NewAI;<br class="">
}<br class="">
<br class="">
/// \brief Walks the slices of an alloca and form partitions based on them,<br class="">
@@ -4137,9 +4142,24 @@ bool SROA::splitAlloca(AllocaInst &AI, A<br class="">
if (!IsSorted)<br class="">
std::sort(AS.begin(), AS.end());<br class="">
<br class="">
+ /// \brief Describes the allocas introduced by rewritePartition<br class="">
+ /// in order to migrate the debug info.<br class="">
+ struct Piece {<br class="">
+ AllocaInst *Alloca;<br class="">
+ uint64_t Offset;<br class="">
+ uint64_t Size;<br class="">
+ Piece(AllocaInst *AI, uint64_t O, uint64_t S)<br class="">
+ : Alloca(AI), Offset(O), Size(S) {}<br class="">
+ };<br class="">
+ SmallVector<Piece, 4> Pieces;<br class="">
+<br class="">
// Rewrite each partition.<br class="">
for (auto &P : AS.partitions()) {<br class="">
- Changed |= rewritePartition(AI, AS, P);<br class="">
+ if (AllocaInst *NewAI = rewritePartition(AI, AS, P)) {<br class="">
+ Changed = true;<br class="">
+ if (NewAI != &AI)<br class="">
+ Pieces.push_back(Piece(NewAI, P.beginOffset(), P.size()));<br class="">
+ }<br class="">
++NumPartitions;<br class="">
}<br class="">
<br class="">
@@ -4147,6 +4167,28 @@ bool SROA::splitAlloca(AllocaInst &AI, A<br class="">
MaxPartitionsPerAlloca =<br class="">
std::max<unsigned>(NumPartitions, MaxPartitionsPerAlloca);<br class="">
<br class="">
+ // Migrate debug information from the old alloca to the new alloca(s)<br class="">
+ // and the individial partitions.<br class="">
+ if (DbgDeclareInst *DbgDecl = DbgDeclares.lookup(&AI)) {<br class="">
+ DIVariable Var(DbgDecl->getVariable());<br class="">
+ DIExpression Expr(DbgDecl->getExpression());<br class="">
+ DIBuilder DIB(*AI.getParent()->getParent()->getParent(),<br class="">
+ /*AllowUnresolved*/ false);<br class="">
+ bool IsSplit = Pieces.size() > 1;<br class="">
+ for (auto Piece : Pieces) {<br class="">
+ // Create a piece expression describing the new partition or reuse AI's<br class="">
+ // expression if there is only one partition.<br class="">
+ if (IsSplit)<br class="">
+ Expr = DIB.createPieceExpression(Piece.Offset, Piece.Size);<br class="">
+ Instruction *NewDDI = DIB.insertDeclare(Piece.Alloca, Var, Expr, &AI);<br class="">
+ NewDDI->setDebugLoc(DbgDecl->getDebugLoc());<br class="">
+ assert((!DbgDeclares.count(Piece.Alloca) ||<br class="">
+ DbgDeclares[Piece.Alloca] == cast<DbgDeclareInst>(NewDDI)<br class="">
+ ) && "alloca already described");<br class="">
+ DbgDeclares.insert(std::make_pair(Piece.Alloca,<br class="">
+ cast<DbgDeclareInst>(NewDDI)));<br class="">
+ }<br class="">
+ }<br class="">
return Changed;<br class="">
}<br class="">
<br class="">
@@ -4258,8 +4300,13 @@ void SROA::deleteDeadInstructions(<br class="">
DeadInsts.insert(U);<br class="">
}<br class="">
<br class="">
- if (AllocaInst *AI = dyn_cast<AllocaInst>(I))<br class="">
+ if (AllocaInst *AI = dyn_cast<AllocaInst>(I)) {<br class="">
DeletedAllocas.insert(AI);<br class="">
+ if (DbgDeclareInst *DbgDecl = DbgDeclares.lookup(AI)) {<br class="">
+ DbgDecl->eraseFromParent();<br class="">
+ DbgDeclares.erase(AI);<br class="">
+ }<br class="">
+ }<br class="">
<br class="">
++NumDeleted;<br class="">
I->eraseFromParent();<br class="">
@@ -4374,11 +4421,16 @@ bool SROA::runOnFunction(Function &F) {<br class="">
DT = DTWP ? &DTWP->getDomTree() : nullptr;<br class="">
AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);<br class="">
<br class="">
+ DbgDeclares.clear();<br class="">
BasicBlock &EntryBB = F.getEntryBlock();<br class="">
for (BasicBlock::iterator I = EntryBB.begin(), E = std::prev(EntryBB.end());<br class="">
- I != E; ++I)<br class="">
+ I != E; ++I) {<br class="">
if (AllocaInst *AI = dyn_cast<AllocaInst>(I))<br class="">
Worklist.insert(AI);<br class="">
+ else if (DbgDeclareInst *DDI = dyn_cast<DbgDeclareInst>(I))<br class="">
+ if (auto AI = dyn_cast_or_null<AllocaInst>(DDI->getAddress()))<br class="">
+ DbgDeclares.insert(std::make_pair(AI, DDI));<br class="">
+ }<br class="">
<br class="">
bool Changed = false;<br class="">
// A set of deleted alloca instruction pointers which should be removed from<br class="">
<br class="">
Modified: llvm/trunk/test/DebugInfo/X86/array2.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/array2.ll?rev=225272&r1=225271&r2=225272&view=diff" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/array2.ll?rev=225272&r1=225271&r2=225272&view=diff</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/DebugInfo/X86/array2.ll (original)<br class="">
+++ llvm/trunk/test/DebugInfo/X86/array2.ll Tue Jan 6 11:14:10 2015<br class="">
@@ -13,12 +13,12 @@<br class="">
; }<br class="">
;<br class="">
; RUN: opt %s -O2 -S -o - | FileCheck %s<br class="">
-; Test that we do not lower dbg.declares for arrays.<br class="">
+; Test that we correctly lower dbg.declares for arrays.<br class="">
;<br class="">
; CHECK: define i32 @main<br class="">
-; CHECK: call void @llvm.dbg.value<br class="">
-; CHECK: call void @llvm.dbg.value<br class="">
-; CHECK: call void @llvm.dbg.declare<br class="">
+; CHECK: call void @llvm.dbg.value(metadata i32 42, i64 0, metadata ![[ARRAY:[0-9]+]], metadata ![[EXPR:[0-9]+]])<br class="">
+; CHECK: ![[ARRAY]] = {{.*}}; [ DW_TAG_auto_variable ] [array] [line 6]<br class="">
+; CHECK: ![[EXPR]] = {{.*}}; [ DW_TAG_expression ] [DW_OP_piece offset=0, size=4]<br class="">
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"<br class="">
target triple = "x86_64-apple-macosx10.9.0"<br class="">
<br class="">
<br class="">
Added: llvm/trunk/test/DebugInfo/X86/sroasplit-1.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/sroasplit-1.ll?rev=225272&view=auto" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/sroasplit-1.ll?rev=225272&view=auto</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/DebugInfo/X86/sroasplit-1.ll (added)<br class="">
+++ llvm/trunk/test/DebugInfo/X86/sroasplit-1.ll Tue Jan 6 11:14:10 2015<br class="">
@@ -0,0 +1,97 @@<br class="">
+; RUN: opt %s -sroa -verify -S -o - | FileCheck %s<br class="">
+;<br class="">
+; Test that we can partial emit debug info for aggregates repeatedly<br class="">
+; split up by SROA.<br class="">
+;<br class="">
+; // Compile with -O1<br class="">
+; typedef struct {<br class="">
+; int a;<br class="">
+; long int b;<br class="">
+; } Inner;<br class="">
+;<br class="">
+; typedef struct {<br class="">
+; Inner inner[2];<br class="">
+; } Outer;<br class="">
+;<br class="">
+; int foo(Outer outer) {<br class="">
+; Inner i1 = outer.inner[1];<br class="">
+; return i1.a;<br class="">
+; }<br class="">
+;<br class="">
+<br class="">
+; Verify that SROA creates a variable piece when splitting i1.<br class="">
+; CHECK: %[[I1:.*]] = alloca [12 x i8], align 4<br class="">
+; CHECK: call void @llvm.dbg.declare(metadata [12 x i8]* %[[I1]], metadata ![[VAR:[0-9]+]], metadata ![[PIECE1:[0-9]+]])<br class="">
+; CHECK: call void @llvm.dbg.value(metadata i32 %[[A:.*]], i64 0, metadata ![[VAR]], metadata ![[PIECE2:[0-9]+]])<br class="">
+; CHECK: ret i32 %[[A]]<br class="">
+; Read Var and Piece:<br class="">
+; CHECK: ![[VAR]] = {{.*}} ; [ DW_TAG_auto_variable ] [i1] [line 11]<br class="">
+; CHECK: ![[PIECE1]] = {{.*}} ; [ DW_TAG_expression ] [DW_OP_piece offset=4, size=12]<br class="">
+; CHECK: ![[PIECE2]] = {{.*}} ; [ DW_TAG_expression ] [DW_OP_piece offset=0, size=4]<br class="">
+<br class="">
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"<br class="">
+target triple = "x86_64-apple-macosx10.9.0"<br class="">
+<br class="">
+%struct.Outer = type { [2 x %struct.Inner] }<br class="">
+%struct.Inner = type { i32, i64 }<br class="">
+<br class="">
+; Function Attrs: nounwind ssp uwtable<br class="">
+define i32 @foo(%struct.Outer* byval align 8 %outer) #0 {<br class="">
+entry:<br class="">
+ %i1 = alloca %struct.Inner, align 8<br class="">
+ call void @llvm.dbg.declare(metadata %struct.Outer* %outer, metadata !25, metadata !2), !dbg !26<br class="">
+ call void @llvm.dbg.declare(metadata %struct.Inner* %i1, metadata !27, metadata !2), !dbg !28<br class="">
+ %inner = getelementptr inbounds %struct.Outer* %outer, i32 0, i32 0, !dbg !28<br class="">
+ %arrayidx = getelementptr inbounds [2 x %struct.Inner]* %inner, i32 0, i64 1, !dbg !28<br class="">
+ %0 = bitcast %struct.Inner* %i1 to i8*, !dbg !28<br class="">
+ %1 = bitcast %struct.Inner* %arrayidx to i8*, !dbg !28<br class="">
+ call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 16, i32 8, i1 false), !dbg !28<br class="">
+ %a = getelementptr inbounds %struct.Inner* %i1, i32 0, i32 0, !dbg !29<br class="">
+ %2 = load i32* %a, align 4, !dbg !29<br class="">
+ ret i32 %2, !dbg !29<br class="">
+}<br class="">
+<br class="">
+; Function Attrs: nounwind readnone<br class="">
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1<br class="">
+<br class="">
+; Function Attrs: nounwind<br class="">
+declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #2<br class="">
+<br class="">
+attributes #0 = { nounwind ssp uwtable }<br class="">
+attributes #1 = { nounwind readnone }<br class="">
+attributes #2 = { nounwind }<br class="">
+<br class="">
+!<a href="http://llvm.dbg.cu/" target="_blank" class="">llvm.dbg.cu</a> = !{!0}<br class="">
+!llvm.module.flags = !{!22, !23}<br class="">
+!llvm.ident = !{!24}<br class="">
+<br class="">
+!0 = !{!"0x11\0012\00clang version 3.5.0 \000\00\000\00\001", !1, !2, !2, !3, !2, !2} ; [ DW_TAG_compile_unit ] [ DW_TAG_compile_unit ] [sroasplit-1.c] [DW_LANG_C99]<br class="">
+!1 = !{!"sroasplit-1.c", !""}<br class="">
+!2 = !{}<br class="">
+!3 = !{!4}<br class="">
+!4 = !{!"0x2e\00foo\00foo\00\0010\000\001\000\006\00256\000\0010", !1, !5, !6, null, i32 (%struct.Outer*)* @foo, null, null, !2} ; [ DW_TAG_subprogram ] [ DW_TAG_subprogram ] [line 10] [def] [foo]<br class="">
+!5 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [ DW_TAG_file_type ] [sroasplit-1.c]<br class="">
+!6 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !7, null, null, null} ; [ DW_TAG_subroutine_type ] [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]<br class="">
+!7 = !{!8, !9}<br class="">
+!8 = !{!"0x24\00int\000\0032\0032\000\000\005", null, null} ; [ DW_TAG_base_type ] [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]<br class="">
+!9 = !{!"0x16\00Outer\008\000\000\000\000", !1, null, !10} ; [ DW_TAG_typedef ] [ DW_TAG_typedef ] [Outer] [line 8, size 0, align 0, offset 0] [from ]<br class="">
+!10 = !{!"0x13\00\006\00256\0064\000\000\000", !1, null, null, !11, null, null, null} ; [ DW_TAG_structure_type ] [line 6, size 256, align 64, offset 0] [def] [from ]<br class="">
+!11 = !{!12}<br class="">
+!12 = !{!"0xd\00inner\007\00256\0064\000\000", !1, !10, !13} ; [ DW_TAG_member ] [inner] [line 7, size 256, align 64, offset 0] [from ]<br class="">
+!13 = !{!"0x1\00\000\00256\0064\000\000", null, null, !14, !20, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 256, align 64, offset 0] [from Inner]<br class="">
+!14 = !{!"0x16\00Inner\004\000\000\000\000", !1, null, !15} ; [ DW_TAG_typedef ] [ DW_TAG_typedef ] [Inner] [line 4, size 0, align 0, offset 0] [from ]<br class="">
+!15 = !{!"0x13\00\001\00128\0064\000\000\000", !1, null, null, !16, null, null, null} ; [ DW_TAG_structure_type ] [line 1, size 128, align 64, offset 0] [def] [from ]<br class="">
+!16 = !{!17, !18}<br class="">
+!17 = !{!"0xd\00a\002\0032\0032\000\000", !1, !15, !8} ; [ DW_TAG_member ] [a] [line 2, size 32, align 32, offset 0] [from int]<br class="">
+!18 = !{!"0xd\00b\003\0064\0064\0064\000", !1, !15, !19} ; [ DW_TAG_member ] [b] [line 3, size 64, align 64, offset 64] [from long int]<br class="">
+!19 = !{!"0x24\00long int\000\0064\0064\000\000\005", null, null} ; [ DW_TAG_base_type ] [ DW_TAG_base_type ] [long int] [line 0, size 64, align 64, offset 0, enc DW_ATE_signed]<br class="">
+!20 = !{!21}<br class="">
+!21 = !{!"0x21\000\002"} ; [ DW_TAG_subrange_type ] [0, 1]<br class="">
+!22 = !{i32 2, !"Dwarf Version", i32 2}<br class="">
+!23 = !{i32 1, !"Debug Info Version", i32 2}<br class="">
+!24 = !{!"clang version 3.5.0 "}<br class="">
+!25 = !{!"0x101\00outer\0016777226\000", !4, !5, !9} ; [ DW_TAG_arg_variable ] [ DW_TAG_arg_variable ] [outer] [line 10]<br class="">
+!26 = !{i32 10, i32 0, !4, null}<br class="">
+!27 = !{!"0x100\00i1\0011\000", !4, !5, !14} ; [ DW_TAG_auto_variable ] [ DW_TAG_auto_variable ] [i1] [line 11]<br class="">
+!28 = !{i32 11, i32 0, !4, null}<br class="">
+!29 = !{i32 12, i32 0, !4, null}<br class="">
<br class="">
Added: llvm/trunk/test/DebugInfo/X86/sroasplit-2.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/sroasplit-2.ll?rev=225272&view=auto" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/sroasplit-2.ll?rev=225272&view=auto</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/DebugInfo/X86/sroasplit-2.ll (added)<br class="">
+++ llvm/trunk/test/DebugInfo/X86/sroasplit-2.ll Tue Jan 6 11:14:10 2015<br class="">
@@ -0,0 +1,102 @@<br class="">
+; RUN: opt %s -sroa -verify -S -o - | FileCheck %s<br class="">
+;<br class="">
+; Test that we can partial emit debug info for aggregates repeatedly<br class="">
+; split up by SROA.<br class="">
+;<br class="">
+; // Compile with -O1<br class="">
+; typedef struct {<br class="">
+; int a;<br class="">
+; int b;<br class="">
+; } Inner;<br class="">
+;<br class="">
+; typedef struct {<br class="">
+; Inner inner[2];<br class="">
+; } Outer;<br class="">
+;<br class="">
+; int foo(Outer outer) {<br class="">
+; Inner i1 = outer.inner[1];<br class="">
+; return i1.a;<br class="">
+; }<br class="">
+;<br class="">
+<br class="">
+; Verify that SROA creates a variable piece when splitting i1.<br class="">
+; CHECK: call void @llvm.dbg.value(metadata i64 %outer.coerce0, i64 0, metadata ![[O:[0-9]+]], metadata ![[PIECE1:[0-9]+]]),<br class="">
+; CHECK: call void @llvm.dbg.value(metadata i64 %outer.coerce1, i64 0, metadata ![[O]], metadata ![[PIECE2:[0-9]+]]),<br class="">
+; CHECK: call void @llvm.dbg.value({{.*}}, i64 0, metadata ![[I1:[0-9]+]], metadata ![[PIECE3:[0-9]+]]),<br class="">
+; CHECK-DAG: ![[O]] = {{.*}} [ DW_TAG_arg_variable ] [outer] [line 10]<br class="">
+; CHECK-DAG: ![[PIECE1]] = {{.*}} [ DW_TAG_expression ] [DW_OP_piece offset=0, size=8]<br class="">
+; CHECK-DAG: ![[PIECE2]] = {{.*}} [ DW_TAG_expression ] [DW_OP_piece offset=8, size=8]<br class="">
+; CHECK-DAG: ![[I1]] = {{.*}} [ DW_TAG_auto_variable ] [i1] [line 11]<br class="">
+; CHECK-DAG: ![[PIECE3]] = {{.*}} [ DW_TAG_expression ] [DW_OP_piece offset=0, size=4]<br class="">
+<br class="">
+; ModuleID = 'sroasplit-2.c'<br class="">
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"<br class="">
+target triple = "x86_64-apple-macosx10.9.0"<br class="">
+<br class="">
+%struct.Outer = type { [2 x %struct.Inner] }<br class="">
+%struct.Inner = type { i32, i32 }<br class="">
+<br class="">
+; Function Attrs: nounwind ssp uwtable<br class="">
+define i32 @foo(i64 %outer.coerce0, i64 %outer.coerce1) #0 {<br class="">
+ %outer = alloca %struct.Outer, align 8<br class="">
+ %i1 = alloca %struct.Inner, align 4<br class="">
+ %1 = bitcast %struct.Outer* %outer to { i64, i64 }*<br class="">
+ %2 = getelementptr { i64, i64 }* %1, i32 0, i32 0<br class="">
+ store i64 %outer.coerce0, i64* %2<br class="">
+ %3 = getelementptr { i64, i64 }* %1, i32 0, i32 1<br class="">
+ store i64 %outer.coerce1, i64* %3<br class="">
+ call void @llvm.dbg.declare(metadata %struct.Outer* %outer, metadata !24, metadata !2), !dbg !25<br class="">
+ call void @llvm.dbg.declare(metadata %struct.Inner* %i1, metadata !26, metadata !2), !dbg !27<br class="">
+ %4 = getelementptr inbounds %struct.Outer* %outer, i32 0, i32 0, !dbg !27<br class="">
+ %5 = getelementptr inbounds [2 x %struct.Inner]* %4, i32 0, i64 1, !dbg !27<br class="">
+ %6 = bitcast %struct.Inner* %i1 to i8*, !dbg !27<br class="">
+ %7 = bitcast %struct.Inner* %5 to i8*, !dbg !27<br class="">
+ call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* %7, i64 8, i32 4, i1 false), !dbg !27<br class="">
+ %8 = getelementptr inbounds %struct.Inner* %i1, i32 0, i32 0, !dbg !28<br class="">
+ %9 = load i32* %8, align 4, !dbg !28<br class="">
+ ret i32 %9, !dbg !28<br class="">
+}<br class="">
+<br class="">
+; Function Attrs: nounwind readnone<br class="">
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1<br class="">
+<br class="">
+; Function Attrs: nounwind<br class="">
+declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #2<br class="">
+<br class="">
+attributes #0 = { nounwind ssp uwtable "no-frame-pointer-elim"="true" }<br class="">
+attributes #1 = { nounwind readnone }<br class="">
+attributes #2 = { nounwind }<br class="">
+<br class="">
+!<a href="http://llvm.dbg.cu/" target="_blank" class="">llvm.dbg.cu</a> = !{!0}<br class="">
+!llvm.module.flags = !{!21, !22}<br class="">
+!llvm.ident = !{!23}<br class="">
+<br class="">
+!0 = !{!"0x11\0012\00clang version 3.5.0 \000\00\000\00\001", !1, !2, !2, !3, !2, !2} ; [ DW_TAG_compile_unit ] [ DW_TAG_compile_unit ] [sroasplit-2.c] [DW_LANG_C99]<br class="">
+!1 = !{!"sroasplit-2.c", !""}<br class="">
+!2 = !{}<br class="">
+!3 = !{!4}<br class="">
+!4 = !{!"0x2e\00foo\00foo\00\0010\000\001\000\006\00256\000\0010", !1, !5, !6, null, i32 (i64, i64)* @foo, null, null, !2} ; [ DW_TAG_subprogram ] [ DW_TAG_subprogram ] [line 10] [def] [foo]<br class="">
+!5 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [ DW_TAG_file_type ] [sroasplit-2.c]<br class="">
+!6 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !7, null, null, null} ; [ DW_TAG_subroutine_type ] [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]<br class="">
+!7 = !{!8, !9}<br class="">
+!8 = !{!"0x24\00int\000\0032\0032\000\000\005", null, null} ; [ DW_TAG_base_type ] [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]<br class="">
+!9 = !{!"0x16\00Outer\008\000\000\000\000", !1, null, !10} ; [ DW_TAG_typedef ] [ DW_TAG_typedef ] [Outer] [line 8, size 0, align 0, offset 0] [from ]<br class="">
+!10 = !{!"0x13\00\006\00128\0032\000\000\000", !1, null, null, !11, null, null, null} ; [ DW_TAG_structure_type ] [line 6, size 128, align 32, offset 0] [def] [from ]<br class="">
+!11 = !{!12}<br class="">
+!12 = !{!"0xd\00inner\007\00128\0032\000\000", !1, !10, !13} ; [ DW_TAG_member ] [inner] [line 7, size 128, align 32, offset 0] [from ]<br class="">
+!13 = !{!"0x1\00\000\00128\0032\000\000", null, null, !14, !19, i32 0, null, null, null} ; [ DW_TAG_array_type ] [line 0, size 128, align 32, offset 0] [from Inner]<br class="">
+!14 = !{!"0x16\00Inner\004\000\000\000\000", !1, null, !15} ; [ DW_TAG_typedef ] [ DW_TAG_typedef ] [Inner] [line 4, size 0, align 0, offset 0] [from ]<br class="">
+!15 = !{!"0x13\00\001\0064\0032\000\000\000", !1, null, null, !16, null, null, null} ; [ DW_TAG_structure_type ] [line 1, size 64, align 32, offset 0] [def] [from ]<br class="">
+!16 = !{!17, !18}<br class="">
+!17 = !{!"0xd\00a\002\0032\0032\000\000", !1, !15, !8} ; [ DW_TAG_member ] [a] [line 2, size 32, align 32, offset 0] [from int]<br class="">
+!18 = !{!"0xd\00b\003\0032\0032\0032\000", !1, !15, !8} ; [ DW_TAG_member ] [b] [line 3, size 32, align 32, offset 32] [from int]<br class="">
+!19 = !{!20}<br class="">
+!20 = !{!"0x21\000\002"} ; [ DW_TAG_subrange_type ] [0, 1]<br class="">
+!21 = !{i32 2, !"Dwarf Version", i32 2}<br class="">
+!22 = !{i32 1, !"Debug Info Version", i32 2}<br class="">
+!23 = !{!"clang version 3.5.0 "}<br class="">
+!24 = !{!"0x101\00outer\0016777226\000", !4, !5, !9} ; [ DW_TAG_arg_variable ] [ DW_TAG_arg_variable ] [outer] [line 10]<br class="">
+!25 = !{i32 10, i32 0, !4, null}<br class="">
+!26 = !{!"0x100\00i1\0011\000", !4, !5, !14} ; [ DW_TAG_auto_variable ] [ DW_TAG_auto_variable ] [i1] [line 11]<br class="">
+!27 = !{i32 11, i32 0, !4, null}<br class="">
+!28 = !{i32 12, i32 0, !4, null}<br class="">
<br class="">
Added: llvm/trunk/test/DebugInfo/X86/sroasplit-3.ll<br class="">
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/sroasplit-3.ll?rev=225272&view=auto" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/sroasplit-3.ll?rev=225272&view=auto</a><br class="">
==============================================================================<br class="">
--- llvm/trunk/test/DebugInfo/X86/sroasplit-3.ll (added)<br class="">
+++ llvm/trunk/test/DebugInfo/X86/sroasplit-3.ll Tue Jan 6 11:14:10 2015<br class="">
@@ -0,0 +1,63 @@<br class="">
+; RUN: opt %s -sroa -verify -S -o - | FileCheck %s<br class="">
+; ModuleID = 'test.c'<br class="">
+; Test that SROA updates the debug info correctly if an alloca was rewritten but<br class="">
+; not partitioned into multiple allocas.<br class="">
+;<br class="">
+; CHECK: call void @llvm.dbg.value(metadata float %s.coerce, i64 0, metadata ![[VAR:[0-9]+]], metadata ![[EXPR:[0-9]+]])<br class="">
+; CHECK: ![[VAR]] = {{.*}} [ DW_TAG_arg_variable ] [s] [line 3]<br class="">
+; CHECK: ![[EXPR]] = {{.*}} [ DW_TAG_expression ]<br class="">
+; CHECK-NOT: DW_OP_piece<br class="">
+<br class="">
+;<br class="">
+; struct S { float f; };<br class="">
+;<br class="">
+; float foo(struct S s) {<br class="">
+; return s.f;<br class="">
+; }<br class="">
+target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"<br class="">
+target triple = "x86_64-apple-macosx10.10.0"<br class="">
+<br class="">
+%struct.S = type { float }<br class="">
+<br class="">
+; Function Attrs: nounwind ssp uwtable<br class="">
+define float @foo(float %s.coerce) #0 {<br class="">
+entry:<br class="">
+ %s = alloca %struct.S, align 4<br class="">
+ %coerce.dive = getelementptr %struct.S* %s, i32 0, i32 0<br class="">
+ store float %s.coerce, float* %coerce.dive, align 1<br class="">
+ call void @llvm.dbg.declare(metadata %struct.S* %s, metadata !16, metadata !17), !dbg !18<br class="">
+ %f = getelementptr inbounds %struct.S* %s, i32 0, i32 0, !dbg !19<br class="">
+ %0 = load float* %f, align 4, !dbg !19<br class="">
+ ret float %0, !dbg !19<br class="">
+}<br class="">
+<br class="">
+; Function Attrs: nounwind readnone<br class="">
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1<br class="">
+<br class="">
+attributes #0 = { nounwind ssp uwtable }<br class="">
+attributes #1 = { nounwind readnone }<br class="">
+<br class="">
+!<a href="http://llvm.dbg.cu/" target="_blank" class="">llvm.dbg.cu</a> = !{!0}<br class="">
+!llvm.module.flags = !{!12, !13, !14}<br class="">
+!llvm.ident = !{!15}<br class="">
+<br class="">
+!0 = !{!"0x11\0012\00clang version 3.6.0 \000\00\000\00\001", !1, !2, !2, !3, !2, !2} ; [ DW_TAG_compile_unit ] [/Volumes/Data/llvm/_build.ninja.debug/test.c] [DW_LANG_C99]<br class="">
+!1 = !{!"test.c", !"/Volumes/Data/llvm/_build.ninja.debug"}<br class="">
+!2 = !{}<br class="">
+!3 = !{!4}<br class="">
+!4 = !{!"0x2e\00foo\00foo\00\003\000\001\000\000\00256\000\003", !1, !5, !6, null, float (float)* @foo, null, null, !2} ; [ DW_TAG_subprogram ] [line 3] [def] [foo]<br class="">
+!5 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [/Volumes/Data/llvm/_build.ninja.debug/test.c]<br class="">
+!6 = !{!"0x15\00\000\000\000\000\000\000", null, null, null, !7, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]<br class="">
+!7 = !{!8, !9}<br class="">
+!8 = !{!"0x24\00float\000\0032\0032\000\000\004", null, null} ; [ DW_TAG_base_type ] [float] [line 0, size 32, align 32, offset 0, enc DW_ATE_float]<br class="">
+!9 = !{!"0x13\00S\001\0032\0032\000\000\000", !1, null, null, !10, null, null, null} ; [ DW_TAG_structure_type ] [S] [line 1, size 32, align 32, offset 0] [def] [from ]<br class="">
+!10 = !{!11}<br class="">
+!11 = !{!"0xd\00f\001\0032\0032\000\000", !1, !9, !8} ; [ DW_TAG_member ] [f] [line 1, size 32, align 32, offset 0] [from float]<br class="">
+!12 = !{i32 2, !"Dwarf Version", i32 2}<br class="">
+!13 = !{i32 2, !"Debug Info Version", i32 2}<br class="">
+!14 = !{i32 1, !"PIC Level", i32 2}<br class="">
+!15 = !{!"clang version 3.6.0 "}<br class="">
+!16 = !{!"0x101\00s\0016777219\000", !4, !5, !9} ; [ DW_TAG_arg_variable ] [s] [line 3]<br class="">
+!17 = !{!"0x102"} ; [ DW_TAG_expression ]<br class="">
+!18 = !{i32 3, i32 20, !4, null}<br class="">
+!19 = !{i32 4, i32 2, !4, null}<br class="">
<br class="">
<br class="">
_______________________________________________<br class="">
llvm-commits mailing list<br class="">
<a href="mailto:llvm-commits@cs.uiuc.edu" class="">llvm-commits@cs.uiuc.edu</a><br class="">
<a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank" class="">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br class="">
</blockquote></div><br class=""><br clear="all" class=""><div class=""><br class=""></div>-- <br class=""><div class="gmail_signature"><div dir="ltr" class="">Alexey Samsonov<br class=""><a href="mailto:vonosmas@gmail.com" target="_blank" class="">vonosmas@gmail.com</a></div></div>
</div>
</div></blockquote></div><br class=""></div></body></html>