<div dir="ltr"><div class="gmail_extra"><div class="gmail_quote">On Fri, Dec 19, 2014 at 3:27 PM, Steven Wu <span dir="ltr"><<a href="mailto:stevenwu@apple.com" target="_blank">stevenwu@apple.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi Chandler<br>
<br>
The testcases you committed is breaking our internal bots running with gmalloc. When gmalloc is enable, it will print version numbers and etc. to stderr.<br>
Here is an example:<br>
GuardMalloc[llc-23060]: Allocations will be placed on 16 byte boundaries.<br>
GuardMalloc[llc-23060]: - Some buffer overruns may not be noticed.<br>
GuardMalloc[llc-23060]: - Applications using vector instructions (e.g., SSE) should work.<br>
GuardMalloc[llc-23060]: version 104<br>
<br>
Can you modify the testcase so that it won’t be triggered by gmalloc (like grep for error?)<br></blockquote><div><br></div><div>I would much rather not.</div><div><br></div><div>I don't know why it is reasonable to support arbitrary output to stderr in test cases. Lots of our test cases examine stderr for specific output... Why do those work?</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
Thanks<br>
<span class="HOEnZb"><font color="#888888"><br>
Steven<br>
</font></span><div class="HOEnZb"><div class="h5"><br>
> On Dec 9, 2014, at 6:25 AM, Chandler Carruth <<a href="mailto:chandlerc@gmail.com">chandlerc@gmail.com</a>> wrote:<br>
><br>
> Author: chandlerc<br>
> Date: Tue Dec 9 08:25:55 2014<br>
> New Revision: 223774<br>
><br>
> URL: <a href="http://llvm.org/viewvc/llvm-project?rev=223774&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=223774&view=rev</a><br>
> Log:<br>
> [x86] Fix the test to actually test things for the CPU names, add the<br>
> missing barcelona CPU which that test uncovered, and remove the 32-bit<br>
> x86 CPUs which I really wasn't prepared to audit and test thoroughly.<br>
><br>
> If anyone wants to clean up the 32-bit only x86 CPUs, go for it.<br>
><br>
> Also, if anyone else wants to try to de-duplicate the AMD CPUs, that'd<br>
> be cool, but from the looks of it wouldn't save as much as it did for<br>
> the Intel CPUs.<br>
><br>
> Modified:<br>
> llvm/trunk/lib/Target/X86/X86.td<br>
> llvm/trunk/test/CodeGen/X86/cpus.ll<br>
><br>
> Modified: llvm/trunk/lib/Target/X86/X86.td<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=223774&r1=223773&r2=223774&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=223774&r1=223773&r2=223774&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Target/X86/X86.td (original)<br>
> +++ llvm/trunk/lib/Target/X86/X86.td Tue Dec 9 08:25:55 2014<br>
> @@ -433,6 +433,10 @@ def : Proc<"amdfam10", [FeatureSS<br>
> Feature3DNowA, FeatureCMPXCHG16B, FeatureLZCNT,<br>
> FeaturePOPCNT, FeatureSlowBTMem,<br>
> FeatureSlowSHLD]>;<br>
> +def : Proc<"barcelona", [FeatureSSE4A,<br>
> + Feature3DNowA, FeatureCMPXCHG16B, FeatureLZCNT,<br>
> + FeaturePOPCNT, FeatureSlowBTMem,<br>
> + FeatureSlowSHLD]>;<br>
> // Bobcat<br>
> def : Proc<"btver1", [FeatureSSSE3, FeatureSSE4A, FeatureCMPXCHG16B,<br>
> FeaturePRFCHW, FeatureLZCNT, FeaturePOPCNT,<br>
><br>
> Modified: llvm/trunk/test/CodeGen/X86/cpus.ll<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cpus.ll?rev=223774&r1=223773&r2=223774&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cpus.ll?rev=223774&r1=223773&r2=223774&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/test/CodeGen/X86/cpus.ll (original)<br>
> +++ llvm/trunk/test/CodeGen/X86/cpus.ll Tue Dec 9 08:25:55 2014<br>
> @@ -1,32 +1,28 @@<br>
> -; RUN: llc < %s -o /dev/null -mcpu=prescott<br>
> -; RUN: llc < %s -o /dev/null -mcpu=nocona<br>
> -; RUN: llc < %s -o /dev/null -mcpu=core2<br>
> -; RUN: llc < %s -o /dev/null -mcpu=penryn<br>
> -; RUN: llc < %s -o /dev/null -mcpu=nehalem<br>
> -; RUN: llc < %s -o /dev/null -mcpu=westmere<br>
> -; RUN: llc < %s -o /dev/null -mcpu=sandybridge<br>
> -; RUN: llc < %s -o /dev/null -mcpu=ivybridge<br>
> -; RUN: llc < %s -o /dev/null -mcpu=haswell<br>
> -; RUN: llc < %s -o /dev/null -mcpu=broadwell<br>
> -; RUN: llc < %s -o /dev/null -mcpu=bonnell<br>
> -; RUN: llc < %s -o /dev/null -mcpu=silvermont<br>
> -; RUN: llc < %s -o /dev/null -mcpu=k8<br>
> -; RUN: llc < %s -o /dev/null -mcpu=opteron<br>
> -; RUN: llc < %s -o /dev/null -mcpu=athlon64<br>
> -; RUN: llc < %s -o /dev/null -mcpu=athlon-fx<br>
> -; RUN: llc < %s -o /dev/null -mcpu=k8-sse3<br>
> -; RUN: llc < %s -o /dev/null -mcpu=opteron-sse3<br>
> -; RUN: llc < %s -o /dev/null -mcpu=athlon64-sse3<br>
> -; RUN: llc < %s -o /dev/null -mcpu=amdfam10<br>
> -; RUN: llc < %s -o /dev/null -mcpu=barcelona<br>
> -; RUN: llc < %s -o /dev/null -mcpu=bdver1<br>
> -; RUN: llc < %s -o /dev/null -mcpu=bdver2<br>
> -; RUN: llc < %s -o /dev/null -mcpu=bdver3<br>
> -; RUN: llc < %s -o /dev/null -mcpu=bdver4<br>
> -; RUN: llc < %s -o /dev/null -mcpu=btver1<br>
> -; RUN: llc < %s -o /dev/null -mcpu=btver2<br>
> -; RUN: llc < %s -o /dev/null -mcpu=winchip-c6<br>
> -; RUN: llc < %s -o /dev/null -mcpu=winchip2<br>
> -; RUN: llc < %s -o /dev/null -mcpu=c3<br>
> -; RUN: llc < %s -o /dev/null -mcpu=c3-2<br>
> -; RUN: llc < %s -o /dev/null -mcpu=geode<br>
> +; Test that the CPU names work.<br>
> +;<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nocona 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core2 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=penryn 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nehalem 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=westmere 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=sandybridge 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=ivybridge 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=haswell 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=broadwell 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bonnell 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=silvermont 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-fx 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8-sse3 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron-sse3 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64-sse3 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=amdfam10 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=barcelona 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver1 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver2 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver3 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver4 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver1 2>&1 | count 0<br>
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver2 2>&1 | count 0<br>
><br>
><br>
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</div></div></blockquote></div><br></div></div>