<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class=""><br class=""><div><blockquote type="cite" class=""><div class="">On Dec 19, 2014, at 4:35 PM, Chandler Carruth <<a href="mailto:chandlerc@gmail.com" class="">chandlerc@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div dir="ltr" class=""><div class="gmail_extra"><div class="gmail_quote">On Fri, Dec 19, 2014 at 3:27 PM, Steven Wu <span dir="ltr" class=""><<a href="mailto:stevenwu@apple.com" target="_blank" class="">stevenwu@apple.com</a>></span> wrote:<br class=""><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi Chandler<br class="">
<br class="">
The testcases you committed is breaking our internal bots running with gmalloc. When gmalloc is enable, it will print version numbers and etc. to stderr.<br class="">
Here is an example:<br class="">
GuardMalloc[llc-23060]: Allocations will be placed on 16 byte boundaries.<br class="">
GuardMalloc[llc-23060]: - Some buffer overruns may not be noticed.<br class="">
GuardMalloc[llc-23060]: - Applications using vector instructions (e.g., SSE) should work.<br class="">
GuardMalloc[llc-23060]: version 104<br class="">
<br class="">
Can you modify the testcase so that it won’t be triggered by gmalloc (like grep for error?)<br class=""></blockquote><div class=""><br class=""></div><div class="">I would much rather not.</div><div class=""><br class=""></div><div class="">I don't know why it is reasonable to support arbitrary output to stderr in test cases. Lots of our test cases examine stderr for specific output... Why do those work?</div></div></div></div></div></blockquote><div><br class=""></div><div>It is not arbitrary output to stderr. Gmalloc only prints the 4 lines above (in the very beginning of stderr) when it is happy.</div><div>All our existing tests don’t care about 4 extra lines in the beginning of stderr and all the other count commands in the tests are following a grep command.</div><div>Gmalloc has found few problems in the past so I don’t want to kill the gmalloc if your testcase can be written in other way.</div><div><br class=""></div><div>Thanks</div><div><br class=""></div><div>Steven</div><div><br class=""></div><blockquote type="cite" class=""><div class=""><div dir="ltr" class=""><div class="gmail_extra"><div class="gmail_quote"><div class=""> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br class="">
Thanks<br class="">
<span class="HOEnZb"><font color="#888888" class=""><br class="">
Steven<br class="">
</font></span><div class="HOEnZb"><div class="h5"><br class="">
> On Dec 9, 2014, at 6:25 AM, Chandler Carruth <<a href="mailto:chandlerc@gmail.com" class="">chandlerc@gmail.com</a>> wrote:<br class="">
><br class="">
> Author: chandlerc<br class="">
> Date: Tue Dec 9 08:25:55 2014<br class="">
> New Revision: 223774<br class="">
><br class="">
> URL: <a href="http://llvm.org/viewvc/llvm-project?rev=223774&view=rev" target="_blank" class="">http://llvm.org/viewvc/llvm-project?rev=223774&view=rev</a><br class="">
> Log:<br class="">
> [x86] Fix the test to actually test things for the CPU names, add the<br class="">
> missing barcelona CPU which that test uncovered, and remove the 32-bit<br class="">
> x86 CPUs which I really wasn't prepared to audit and test thoroughly.<br class="">
><br class="">
> If anyone wants to clean up the 32-bit only x86 CPUs, go for it.<br class="">
><br class="">
> Also, if anyone else wants to try to de-duplicate the AMD CPUs, that'd<br class="">
> be cool, but from the looks of it wouldn't save as much as it did for<br class="">
> the Intel CPUs.<br class="">
><br class="">
> Modified:<br class="">
> llvm/trunk/lib/Target/X86/X86.td<br class="">
> llvm/trunk/test/CodeGen/X86/cpus.ll<br class="">
><br class="">
> Modified: llvm/trunk/lib/Target/X86/X86.td<br class="">
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=223774&r1=223773&r2=223774&view=diff" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=223774&r1=223773&r2=223774&view=diff</a><br class="">
> ==============================================================================<br class="">
> --- llvm/trunk/lib/Target/X86/X86.td (original)<br class="">
> +++ llvm/trunk/lib/Target/X86/X86.td Tue Dec 9 08:25:55 2014<br class="">
> @@ -433,6 +433,10 @@ def : Proc<"amdfam10", [FeatureSS<br class="">
> Feature3DNowA, FeatureCMPXCHG16B, FeatureLZCNT,<br class="">
> FeaturePOPCNT, FeatureSlowBTMem,<br class="">
> FeatureSlowSHLD]>;<br class="">
> +def : Proc<"barcelona", [FeatureSSE4A,<br class="">
> + Feature3DNowA, FeatureCMPXCHG16B, FeatureLZCNT,<br class="">
> + FeaturePOPCNT, FeatureSlowBTMem,<br class="">
> + FeatureSlowSHLD]>;<br class="">
> // Bobcat<br class="">
> def : Proc<"btver1", [FeatureSSSE3, FeatureSSE4A, FeatureCMPXCHG16B,<br class="">
> FeaturePRFCHW, FeatureLZCNT, FeaturePOPCNT,<br class="">
><br class="">
> Modified: llvm/trunk/test/CodeGen/X86/cpus.ll<br class="">
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cpus.ll?rev=223774&r1=223773&r2=223774&view=diff" target="_blank" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cpus.ll?rev=223774&r1=223773&r2=223774&view=diff</a><br class="">
> ==============================================================================<br class="">
> --- llvm/trunk/test/CodeGen/X86/cpus.ll (original)<br class="">
> +++ llvm/trunk/test/CodeGen/X86/cpus.ll Tue Dec 9 08:25:55 2014<br class="">
> @@ -1,32 +1,28 @@<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=prescott<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=nocona<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=core2<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=penryn<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=nehalem<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=westmere<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=sandybridge<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=ivybridge<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=haswell<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=broadwell<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=bonnell<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=silvermont<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=k8<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=opteron<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=athlon64<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=athlon-fx<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=k8-sse3<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=opteron-sse3<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=athlon64-sse3<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=amdfam10<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=barcelona<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=bdver1<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=bdver2<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=bdver3<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=bdver4<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=btver1<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=btver2<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=winchip-c6<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=winchip2<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=c3<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=c3-2<br class="">
> -; RUN: llc < %s -o /dev/null -mcpu=geode<br class="">
> +; Test that the CPU names work.<br class="">
> +;<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nocona 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core2 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=penryn 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nehalem 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=westmere 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=sandybridge 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=ivybridge 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=haswell 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=broadwell 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bonnell 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=silvermont 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-fx 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8-sse3 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron-sse3 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64-sse3 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=amdfam10 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=barcelona 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver1 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver2 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver3 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver4 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver1 2>&1 | count 0<br class="">
> +; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver2 2>&1 | count 0<br class="">
><br class="">
><br class="">
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