Hi Bradley,<br><br>This one LGTM. Perhaps Hao or Kevin could take a look too, as they're quite familiar with this area?<div><br></div><div>Cheers,</div><div><br></div><div>James</div><br><div class="gmail_quote">On Mon Dec 15 2014 at 3:22:27 PM Bradley Smith <<a href="mailto:bradley.smith@arm.com">bradley.smith@arm.com</a>> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">This patch addresses the crash raised in PR21572. The problem occurs when PerformVCVTCombine tries to combine vmul and vcvt with 8 lane vectors. This results in use of v8i32 types which the intrinsic used does not support. This patch prevents this crash by bailing out when >4 lanes are used.<br>
<br>
Regards,<br>
Bradley Smith<br>
<br>
REPOSITORY<br>
rL LLVM<br>
<br>
<a href="http://reviews.llvm.org/D6657" target="_blank">http://reviews.llvm.org/D6657</a><br>
<br>
Files:<br>
lib/Target/ARM/<u></u>ARMISelLowering.cpp<br>
test/CodeGen/ARM/isel-v8i32-<u></u>crash.ll<br>
<br>
Index: lib/Target/ARM/<u></u>ARMISelLowering.cpp<br>
==============================<u></u>==============================<u></u>=======<br>
--- lib/Target/ARM/<u></u>ARMISelLowering.cpp<br>
+++ lib/Target/ARM/<u></u>ARMISelLowering.cpp<br>
@@ -9353,16 +9353,18 @@<br>
<br>
MVT FloatTy = Op.getSimpleValueType().<u></u>getVectorElementType();<br>
MVT IntTy = N->getSimpleValueType(0).<u></u>getVectorElementType();<br>
- if (FloatTy.getSizeInBits() != 32 || IntTy.getSizeInBits() > 32) {<br>
+ unsigned NumLanes = Op.getValueType().<u></u>getVectorNumElements();<br>
+ if (FloatTy.getSizeInBits() != 32 || IntTy.getSizeInBits() > 32 ||<br>
+ NumLanes > 4) {<br>
// These instructions only exist converting from f32 to i32. We can handle<br>
// smaller integers by generating an extra truncate, but larger ones would<br>
- // be lossy.<br>
+ // be lossy. We also can't handle more then 4 lanes, since these intructions<br>
+ // only support v2i32/v4i32 types.<br>
return SDValue();<br>
}<br>
<br>
unsigned IntrinsicOpcode = isSigned ? Intrinsic::arm_neon_vcvtfp2fxs :<br>
Intrinsic::arm_neon_<u></u>vcvtfp2fxu;<br>
- unsigned NumLanes = Op.getValueType().<u></u>getVectorNumElements();<br>
SDValue FixConv = DAG.getNode(ISD::INTRINSIC_WO_<u></u>CHAIN, SDLoc(N),<br>
NumLanes == 2 ? MVT::v2i32 : MVT::v4i32,<br>
DAG.getConstant(<u></u>IntrinsicOpcode, MVT::i32), N0,<br>
Index: test/CodeGen/ARM/isel-v8i32-<u></u>crash.ll<br>
==============================<u></u>==============================<u></u>=======<br>
--- /dev/null<br>
+++ test/CodeGen/ARM/isel-v8i32-<u></u>crash.ll<br>
@@ -0,0 +1,26 @@<br>
+; RUN: llc < %s -mtriple=armv7-linux-gnu | FileCheck %s<br>
+<br>
+; Check we don't crash when trying to combine:<br>
+; (d1 = <float 8.000000e+00, float 8.000000e+00, ...>) (power of 2)<br>
+; vmul.f32 d0, d1, d0<br>
+; vcvt.s32.f32 d0, d0<br>
+; into:<br>
+; vcvt.s32.f32 d0, d0, #3<br>
+; when we have a vector length of 8, due to use of v8i32 types.<br>
+<br>
+target datalayout = "e-m:e-p:32:32-i64:64-v128:64:<u></u>128-a:0:32-n32-S64"<br>
+<br>
+; CHECK: func:<br>
+; CHECK: vcvt.s32.f32 q[[R:[0-9]]], q[[R]], #3<br>
+define void @func(i16* nocapture %pb, float* nocapture readonly %pf) #0 {<br>
+entry:<br>
+ %0 = bitcast float* %pf to <8 x float>*<br>
+ %1 = load <8 x float>* %0, align 4<br>
+ %2 = fmul <8 x float> %1, <float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00, float 8.000000e+00><br>
+ %3 = fptosi <8 x float> %2 to <8 x i16><br>
+ %4 = bitcast i16* %pb to <8 x i16>*<br>
+ store <8 x i16> %3, <8 x i16>* %4, align 2<br>
+ ret void<br>
+}<br>
+<br>
+attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="<u></u>false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"=<u></u>"8" "unsafe-fp-math"="false" "use-soft-float"="false" }<br>
<br>
EMAIL PREFERENCES<br>
<a href="http://reviews.llvm.org/settings/panel/emailpreferences/" target="_blank">http://reviews.llvm.org/<u></u>settings/panel/<u></u>emailpreferences/</a><br>
______________________________<u></u>_________________<br>
llvm-commits mailing list<br>
<a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank">llvm-commits@cs.uiuc.edu</a><br>
<a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank">http://lists.cs.uiuc.edu/<u></u>mailman/listinfo/llvm-commits</a><br>
</blockquote></div>