<div dir="ltr">This change broke the clang-cl self-host. I have a fix for it soon, but it requires adding explicit out of line dtors to all of these classes.</div><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Nov 13, 2014 at 1:26 AM, Aditya Nandakumar <span dir="ltr"><<a href="mailto:aditya_nandakumar@apple.com" target="_blank">aditya_nandakumar@apple.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: aditya_nandakumar<br>
Date: Thu Nov 13 03:26:31 2014<br>
New Revision: 221878<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=221878&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=221878&view=rev</a><br>
Log:<br>
This patch changes the ownership of TLOF from TargetLoweringBase to TargetMachine so that different subtargets could share the TLOF effectively<br>
<br>
Modified:<br>
llvm/trunk/include/llvm/Target/TargetLowering.h<br>
llvm/trunk/include/llvm/Target/TargetMachine.h<br>
llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp<br>
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp<br>
llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp<br>
llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h<br>
llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp<br>
llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp<br>
llvm/trunk/lib/Target/ARM/ARMTargetMachine.h<br>
llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp<br>
llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp<br>
llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h<br>
llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp<br>
llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp<br>
llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h<br>
llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp<br>
llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp<br>
llvm/trunk/lib/Target/Mips/MipsTargetMachine.h<br>
llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp<br>
llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp<br>
llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h<br>
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp<br>
llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp<br>
llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h<br>
llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp<br>
llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp<br>
llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h<br>
llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp<br>
llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp<br>
llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h<br>
llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp<br>
llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp<br>
llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h<br>
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
llvm/trunk/lib/Target/X86/X86TargetMachine.cpp<br>
llvm/trunk/lib/Target/X86/X86TargetMachine.h<br>
llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp<br>
llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp<br>
llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h<br>
<br>
Modified: llvm/trunk/include/llvm/Target/TargetLowering.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)<br>
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Thu Nov 13 03:26:31 2014<br>
@@ -137,10 +137,10 @@ public:<br>
llvm_unreachable("Invalid content kind");<br>
}<br>
<br>
- /// NOTE: The constructor takes ownership of TLOF.<br>
+ /// NOTE: The TargetMachine owns TLOF.<br>
explicit TargetLoweringBase(const TargetMachine &TM,<br>
const TargetLoweringObjectFile *TLOF);<br>
- virtual ~TargetLoweringBase();<br>
+ virtual ~TargetLoweringBase() {}<br>
<br>
protected:<br>
/// \brief Initialize all of the actions to default values.<br>
<br>
Modified: llvm/trunk/include/llvm/Target/TargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/Target/TargetMachine.h (original)<br>
+++ llvm/trunk/include/llvm/Target/TargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -44,6 +44,7 @@ class ScalarTargetTransformInfo;<br>
class VectorTargetTransformInfo;<br>
class formatted_raw_ostream;<br>
class raw_ostream;<br>
+class TargetLoweringObjectFile;<br>
<br>
// The old pass manager infrastructure is hidden in a legacy namespace now.<br>
namespace legacy {<br>
@@ -102,6 +103,9 @@ public:<br>
virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const {<br>
return getSubtargetImpl();<br>
}<br>
+ virtual TargetLoweringObjectFile *getObjFileLowering() const {<br>
+ return nullptr;<br>
+ }<br>
<br>
/// getSubtarget - This method returns a pointer to the specified type of<br>
/// TargetSubtargetInfo. In debug builds, it verifies that the object being<br>
<br>
Modified: llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp Thu Nov 13 03:26:31 2014<br>
@@ -737,10 +737,6 @@ TargetLoweringBase::TargetLoweringBase(c<br>
InitLibcallCallingConvs(LibcallCallingConvs);<br>
}<br>
<br>
-TargetLoweringBase::~TargetLoweringBase() {<br>
- delete &TLOF;<br>
-}<br>
-<br>
void TargetLoweringBase::initActions() {<br>
// All operations default to being supported.<br>
memset(OpActions, 0, sizeof(OpActions));<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Thu Nov 13 03:26:31 2014<br>
@@ -66,18 +66,9 @@ EnableAArch64SlrGeneration("aarch64-shif<br>
cl::desc("Allow AArch64 SLI/SRI formation"),<br>
cl::init(false));<br>
<br>
-//===----------------------------------------------------------------------===//<br>
-// AArch64 Lowering public interface.<br>
-//===----------------------------------------------------------------------===//<br>
-static TargetLoweringObjectFile *createTLOF(const Triple &TT) {<br>
- if (TT.isOSBinFormatMachO())<br>
- return new AArch64_MachoTargetObjectFile();<br>
-<br>
- return new AArch64_ELFTargetObjectFile();<br>
-}<br>
<br>
AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM)<br>
- : TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))) {<br>
+ : TargetLowering(TM, TM.getObjFileLowering()) {<br>
Subtarget = &TM.getSubtarget<AArch64Subtarget>();<br>
<br>
// AArch64 doesn't have comparisons which set GPRs or setcc instructions, so<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp Thu Nov 13 03:26:31 2014<br>
@@ -12,6 +12,7 @@<br>
<br>
#include "AArch64.h"<br>
#include "AArch64TargetMachine.h"<br>
+#include "AArch64TargetObjectFile.h"<br>
#include "llvm/CodeGen/Passes.h"<br>
#include "llvm/CodeGen/RegAllocRegistry.h"<br>
#include "llvm/IR/Function.h"<br>
@@ -87,6 +88,16 @@ extern "C" void LLVMInitializeAArch64Tar<br>
RegisterTargetMachine<AArch64leTargetMachine> Z(TheARM64Target);<br>
}<br>
<br>
+//===----------------------------------------------------------------------===//<br>
+// AArch64 Lowering public interface.<br>
+//===----------------------------------------------------------------------===//<br>
+static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {<br>
+ if (TT.isOSBinFormatMachO())<br>
+ return make_unique<AArch64_MachoTargetObjectFile>();<br>
+<br>
+ return make_unique<AArch64_ELFTargetObjectFile>();<br>
+}<br>
+<br>
/// TargetMachine ctor - Create an AArch64 architecture model.<br>
///<br>
AArch64TargetMachine::AArch64TargetMachine(const Target &T, StringRef TT,<br>
@@ -96,6 +107,7 @@ AArch64TargetMachine::AArch64TargetMachi<br>
CodeGenOpt::Level OL,<br>
bool LittleEndian)<br>
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),<br>
+ TLOF(createTLOF(Triple(getTargetTriple()))),<br>
Subtarget(TT, CPU, FS, *this, LittleEndian), isLittle(LittleEndian) {<br>
initAsmInfo();<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -23,6 +23,7 @@ namespace llvm {<br>
<br>
class AArch64TargetMachine : public LLVMTargetMachine {<br>
protected:<br>
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;<br>
AArch64Subtarget Subtarget;<br>
mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap;<br>
<br>
@@ -43,6 +44,10 @@ public:<br>
/// \brief Register AArch64 analysis passes with a pass manager.<br>
void addAnalysisPasses(PassManagerBase &PM) override;<br>
<br>
+ TargetLoweringObjectFile* getObjFileLowering() const override {<br>
+ return TLOF.get();<br>
+ }<br>
+<br>
private:<br>
bool isLittle;<br>
};<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Thu Nov 13 03:26:31 2014<br>
@@ -156,16 +156,8 @@ void ARMTargetLowering::addQRTypeForNEON<br>
addTypeForNEON(VT, MVT::v2f64, MVT::v4i32);<br>
}<br>
<br>
-static TargetLoweringObjectFile *createTLOF(const Triple &TT) {<br>
- if (TT.isOSBinFormatMachO())<br>
- return new TargetLoweringObjectFileMachO();<br>
- if (TT.isOSWindows())<br>
- return new TargetLoweringObjectFileCOFF();<br>
- return new ARMElfTargetObjectFile();<br>
-}<br>
-<br>
ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM)<br>
- : TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))) {<br>
+ : TargetLowering(TM, TM.getObjFileLowering()) {<br>
Subtarget = &TM.getSubtarget<ARMSubtarget>();<br>
RegInfo = TM.getSubtargetImpl()->getRegisterInfo();<br>
Itins = TM.getSubtargetImpl()->getInstrItineraryData();<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Thu Nov 13 03:26:31 2014<br>
@@ -13,6 +13,7 @@<br>
#include "ARM.h"<br>
#include "ARMTargetMachine.h"<br>
#include "ARMFrameLowering.h"<br>
+#include "ARMTargetObjectFile.h"<br>
#include "llvm/CodeGen/Passes.h"<br>
#include "llvm/IR/Function.h"<br>
#include "llvm/MC/MCAsmInfo.h"<br>
@@ -43,6 +44,14 @@ extern "C" void LLVMInitializeARMTarget(<br>
RegisterTargetMachine<ThumbBETargetMachine> B(TheThumbBETarget);<br>
}<br>
<br>
+static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {<br>
+ if (TT.isOSBinFormatMachO())<br>
+ return make_unique<TargetLoweringObjectFileMachO>();<br>
+ if (TT.isOSWindows())<br>
+ return make_unique<TargetLoweringObjectFileCOFF>();<br>
+ return make_unique<ARMElfTargetObjectFile>();<br>
+}<br>
+<br>
/// TargetMachine ctor - Create an ARM architecture model.<br>
///<br>
ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, StringRef TT,<br>
@@ -51,6 +60,7 @@ ARMBaseTargetMachine::ARMBaseTargetMachi<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL, bool isLittle)<br>
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),<br>
+ TLOF(createTLOF(Triple(getTargetTriple()))),<br>
Subtarget(TT, CPU, FS, *this, isLittle), isLittle(isLittle) {<br>
<br>
// Default to triple-appropriate float ABI<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -23,6 +23,7 @@ namespace llvm {<br>
<br>
class ARMBaseTargetMachine : public LLVMTargetMachine {<br>
protected:<br>
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;<br>
ARMSubtarget Subtarget;<br>
bool isLittle;<br>
mutable StringMap<std::unique_ptr<ARMSubtarget>> SubtargetMap;<br>
@@ -43,6 +44,10 @@ public:<br>
<br>
// Pass Pipeline Configuration<br>
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;<br>
+<br>
+ TargetLoweringObjectFile *getObjFileLowering() const override {<br>
+ return TLOF.get();<br>
+ }<br>
};<br>
<br>
/// ARMTargetMachine - ARM target machine.<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/HexagonISelLowering.cpp Thu Nov 13 03:26:31 2014<br>
@@ -1043,7 +1043,7 @@ HexagonTargetLowering::LowerBlockAddress<br>
//===----------------------------------------------------------------------===//<br>
<br>
HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &targetmachine)<br>
- : TargetLowering(targetmachine, new HexagonTargetObjectFile()),<br>
+ : TargetLowering(targetmachine, targetmachine.getObjFileLowering()),<br>
TM(targetmachine) {<br>
<br>
const HexagonSubtarget &Subtarget = TM.getSubtarget<HexagonSubtarget>();<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.cpp Thu Nov 13 03:26:31 2014<br>
@@ -70,6 +70,7 @@ HexagonTargetMachine::HexagonTargetMachi<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL)<br>
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),<br>
+ TLOF(make_unique<HexagonTargetObjectFile>()),<br>
Subtarget(TT, CPU, FS, *this) {<br>
initAsmInfo();<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -23,6 +23,7 @@ namespace llvm {<br>
class Module;<br>
<br>
class HexagonTargetMachine : public LLVMTargetMachine {<br>
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;<br>
HexagonSubtarget Subtarget;<br>
<br>
public:<br>
@@ -37,6 +38,10 @@ public:<br>
static unsigned getModuleMatchQuality(const Module &M);<br>
<br>
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;<br>
+<br>
+ TargetLoweringObjectFile *getObjFileLowering() const override {<br>
+ return TLOF.get();<br>
+ }<br>
};<br>
<br>
extern bool flag_aligned_memcpy;<br>
<br>
Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp Thu Nov 13 03:26:31 2014<br>
@@ -58,7 +58,7 @@ HWMultMode("msp430-hwmult-mode", cl::Hid<br>
clEnumValEnd));<br>
<br>
MSP430TargetLowering::MSP430TargetLowering(const TargetMachine &TM)<br>
- : TargetLowering(TM, new TargetLoweringObjectFileELF()) {<br>
+ : TargetLowering(TM, TM.getObjFileLowering()) {<br>
<br>
// Set up the register classes.<br>
addRegisterClass(MVT::i8, &MSP430::GR8RegClass);<br>
<br>
Modified: llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.cpp Thu Nov 13 03:26:31 2014<br>
@@ -12,6 +12,7 @@<br>
//===----------------------------------------------------------------------===//<br>
<br>
#include "MSP430TargetMachine.h"<br>
+#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"<br>
#include "MSP430.h"<br>
#include "llvm/CodeGen/Passes.h"<br>
#include "llvm/MC/MCAsmInfo.h"<br>
@@ -30,6 +31,7 @@ MSP430TargetMachine::MSP430TargetMachine<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL)<br>
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),<br>
+ TLOF(make_unique<TargetLoweringObjectFileELF>()),<br>
Subtarget(TT, CPU, FS, *this) {<br>
initAsmInfo();<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -24,6 +24,7 @@ namespace llvm {<br>
/// MSP430TargetMachine<br>
///<br>
class MSP430TargetMachine : public LLVMTargetMachine {<br>
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;<br>
MSP430Subtarget Subtarget;<br>
<br>
public:<br>
@@ -36,6 +37,10 @@ public:<br>
return &Subtarget;<br>
}<br>
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;<br>
+<br>
+ TargetLoweringObjectFile *getObjFileLowering() const override {<br>
+ return TLOF.get();<br>
+ }<br>
}; // MSP430TargetMachine.<br>
<br>
} // end namespace llvm<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/Mips/MipsISelLowering.cpp Thu Nov 13 03:26:31 2014<br>
@@ -203,7 +203,7 @@ const char *MipsTargetLowering::getTarge<br>
<br>
MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,<br>
const MipsSubtarget &STI)<br>
- : TargetLowering(TM, new MipsTargetObjectFile()), Subtarget(STI) {<br>
+ : TargetLowering(TM, TM.getObjFileLowering()), Subtarget(STI) {<br>
// Mips does not have i1 type, so use i32 for<br>
// setcc operations results (slt, sgt, ...).<br>
setBooleanContents(ZeroOrOneBooleanContent);<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Thu Nov 13 03:26:31 2014<br>
@@ -26,6 +26,7 @@<br>
#include "MipsSEISelDAGToDAG.h"<br>
#include "MipsSEISelLowering.h"<br>
#include "MipsSEInstrInfo.h"<br>
+#include "MipsTargetObjectFile.h"<br>
#include "llvm/Analysis/TargetTransformInfo.h"<br>
#include "llvm/CodeGen/Passes.h"<br>
#include "llvm/PassManager.h"<br>
@@ -56,7 +57,9 @@ MipsTargetMachine::MipsTargetMachine(con<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL, bool isLittle)<br>
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),<br>
- isLittle(isLittle), Subtarget(nullptr),<br>
+ isLittle(isLittle),<br>
+ TLOF(make_unique<MipsTargetObjectFile>()),<br>
+ Subtarget(nullptr),<br>
DefaultSubtarget(TT, CPU, FS, isLittle, this),<br>
NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16",<br>
isLittle, this),<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -26,6 +26,7 @@ class MipsRegisterInfo;<br>
<br>
class MipsTargetMachine : public LLVMTargetMachine {<br>
bool isLittle;<br>
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;<br>
MipsSubtarget *Subtarget;<br>
MipsSubtarget DefaultSubtarget;<br>
MipsSubtarget NoMips16Subtarget;<br>
@@ -38,8 +39,6 @@ public:<br>
const TargetOptions &Options, Reloc::Model RM,<br>
CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);<br>
<br>
- virtual ~MipsTargetMachine() {}<br>
-<br>
void addAnalysisPasses(PassManagerBase &PM) override;<br>
<br>
const MipsSubtarget *getSubtargetImpl() const override {<br>
@@ -55,6 +54,10 @@ public:<br>
<br>
// Pass Pipeline Configuration<br>
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;<br>
+<br>
+ TargetLoweringObjectFile *getObjFileLowering() const override {<br>
+ return TLOF.get();<br>
+ }<br>
};<br>
<br>
/// MipsebTargetMachine - Mips32/64 big endian target machine.<br>
<br>
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/NVPTX/NVPTXISelLowering.cpp Thu Nov 13 03:26:31 2014<br>
@@ -107,7 +107,7 @@ static void ComputePTXValueVTs(const Tar<br>
<br>
// NVPTXTargetLowering Constructor.<br>
NVPTXTargetLowering::NVPTXTargetLowering(const NVPTXTargetMachine &TM)<br>
- : TargetLowering(TM, new NVPTXTargetObjectFile()), nvTM(&TM),<br>
+ : TargetLowering(TM, TM.getObjFileLowering()), nvTM(&TM),<br>
nvptxSubtarget(TM.getSubtarget<NVPTXSubtarget>()) {<br>
<br>
// always lower memset, memcpy, and memmove intrinsics to load/store<br>
<br>
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp Thu Nov 13 03:26:31 2014<br>
@@ -16,6 +16,7 @@<br>
#include "NVPTX.h"<br>
#include "NVPTXAllocaHoisting.h"<br>
#include "NVPTXLowerAggrCopies.h"<br>
+#include "NVPTXTargetObjectFile.h"<br>
#include "llvm/Analysis/Passes.h"<br>
#include "llvm/CodeGen/AsmPrinter.h"<br>
#include "llvm/CodeGen/MachineFunctionAnalysis.h"<br>
@@ -74,6 +75,7 @@ NVPTXTargetMachine::NVPTXTargetMachine(c<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL, bool is64bit)<br>
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),<br>
+ TLOF(make_unique<NVPTXTargetObjectFile>()),<br>
Subtarget(TT, CPU, FS, *this, is64bit) {<br>
initAsmInfo();<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -25,6 +25,7 @@ namespace llvm {<br>
/// NVPTXTargetMachine<br>
///<br>
class NVPTXTargetMachine : public LLVMTargetMachine {<br>
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;<br>
NVPTXSubtarget Subtarget;<br>
<br>
// Hold Strings that can be free'd all together with NVPTXTargetMachine<br>
@@ -48,6 +49,9 @@ public:<br>
bool = true) override {<br>
return true;<br>
}<br>
+ TargetLoweringObjectFile *getObjFileLowering() const override {<br>
+ return TLOF.get();<br>
+ }<br>
<br>
/// \brief Register NVPTX analysis passes with a pass manager.<br>
void addAnalysisPasses(PassManagerBase &PM) override;<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Thu Nov 13 03:26:31 2014<br>
@@ -55,17 +55,8 @@ cl::desc("disable unaligned load/store g<br>
// FIXME: Remove this once the bug has been fixed!<br>
extern cl::opt<bool> ANDIGlueBug;<br>
<br>
-static TargetLoweringObjectFile *createTLOF(const Triple &TT) {<br>
- // If it isn't a Mach-O file then it's going to be a linux ELF<br>
- // object file.<br>
- if (TT.isOSDarwin())<br>
- return new TargetLoweringObjectFileMachO();<br>
-<br>
- return new PPC64LinuxTargetObjectFile();<br>
-}<br>
-<br>
PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM)<br>
- : TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))),<br>
+ : TargetLowering(TM, TM.getObjFileLowering()),<br>
Subtarget(*TM.getSubtargetImpl()) {<br>
setPow2SDivIsCheap();<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Thu Nov 13 03:26:31 2014<br>
@@ -12,6 +12,7 @@<br>
//===----------------------------------------------------------------------===//<br>
<br>
#include "PPCTargetMachine.h"<br>
+#include "PPCTargetObjectFile.h"<br>
#include "PPC.h"<br>
#include "llvm/CodeGen/Passes.h"<br>
#include "llvm/IR/Function.h"<br>
@@ -60,6 +61,15 @@ static std::string computeFSAdditions(St<br>
return FullFS;<br>
}<br>
<br>
+static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {<br>
+ // If it isn't a Mach-O file then it's going to be a linux ELF<br>
+ // object file.<br>
+ if (TT.isOSDarwin())<br>
+ return make_unique<TargetLoweringObjectFileMachO>();<br>
+<br>
+ return make_unique<PPC64LinuxTargetObjectFile>();<br>
+}<br>
+<br>
// The FeatureString here is a little subtle. We are modifying the feature string<br>
// with what are (currently) non-function specific overrides as it goes into the<br>
// LLVMTargetMachine constructor and then using the stored value in the<br>
@@ -70,6 +80,7 @@ PPCTargetMachine::PPCTargetMachine(const<br>
CodeGenOpt::Level OL)<br>
: LLVMTargetMachine(T, TT, CPU, computeFSAdditions(FS, OL, TT), Options, RM,<br>
CM, OL),<br>
+ TLOF(createTLOF(Triple(getTargetTriple()))),<br>
Subtarget(TT, CPU, TargetFS, *this) {<br>
initAsmInfo();<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -24,6 +24,7 @@ namespace llvm {<br>
/// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.<br>
///<br>
class PPCTargetMachine : public LLVMTargetMachine {<br>
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;<br>
PPCSubtarget Subtarget;<br>
<br>
mutable StringMap<std::unique_ptr<PPCSubtarget>> SubtargetMap;<br>
@@ -42,6 +43,9 @@ public:<br>
<br>
/// \brief Register PPC analysis passes with a pass manager.<br>
void addAnalysisPasses(PassManagerBase &PM) override;<br>
+ TargetLoweringObjectFile *getObjFileLowering() const override {<br>
+ return TLOF.get();<br>
+ }<br>
};<br>
<br>
/// PPC32TargetMachine - PowerPC 32-bit target machine.<br>
<br>
Modified: llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp Thu Nov 13 03:26:31 2014<br>
@@ -103,7 +103,7 @@ EVT AMDGPUTargetLowering::getEquivalentL<br>
}<br>
<br>
AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :<br>
- TargetLowering(TM, new TargetLoweringObjectFileELF()) {<br>
+ TargetLowering(TM, TM.getObjFileLowering()) {<br>
<br>
Subtarget = &TM.getSubtarget<AMDGPUSubtarget>();<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp Thu Nov 13 03:26:31 2014<br>
@@ -22,6 +22,7 @@<br>
#include "SIInstrInfo.h"<br>
#include "llvm/Analysis/Passes.h"<br>
#include "llvm/CodeGen/MachineFunctionAnalysis.h"<br>
+#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"<br>
#include "llvm/CodeGen/MachineModuleInfo.h"<br>
#include "llvm/CodeGen/Passes.h"<br>
#include "llvm/IR/Verifier.h"<br>
@@ -54,12 +55,14 @@ AMDGPUTargetMachine::AMDGPUTargetMachine<br>
CodeModel::Model CM,<br>
CodeGenOpt::Level OptLevel)<br>
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel),<br>
+ TLOF(new TargetLoweringObjectFileELF()),<br>
Subtarget(TT, CPU, FS, *this), IntrinsicInfo() {<br>
setRequiresStructuredCFG(true);<br>
initAsmInfo();<br>
}<br>
<br>
AMDGPUTargetMachine::~AMDGPUTargetMachine() {<br>
+ delete TLOF;<br>
}<br>
<br>
namespace {<br>
<br>
Modified: llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -25,6 +25,7 @@<br>
namespace llvm {<br>
<br>
class AMDGPUTargetMachine : public LLVMTargetMachine {<br>
+ TargetLoweringObjectFile *TLOF;<br>
AMDGPUSubtarget Subtarget;<br>
AMDGPUIntrinsicInfo IntrinsicInfo;<br>
<br>
@@ -43,6 +44,9 @@ public:<br>
<br>
/// \brief Register R600 analysis passes with a pass manager.<br>
void addAnalysisPasses(PassManagerBase &PM) override;<br>
+ TargetLoweringObjectFile *getObjFileLowering() const override {<br>
+ return TLOF;<br>
+ }<br>
};<br>
<br>
} // End namespace llvm<br>
<br>
Modified: llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/Sparc/SparcISelLowering.cpp Thu Nov 13 03:26:31 2014<br>
@@ -1366,7 +1366,7 @@ static SPCC::CondCodes FPCondCCodeToFCC(<br>
}<br>
<br>
SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)<br>
- : TargetLowering(TM, new SparcELFTargetObjectFile()) {<br>
+ : TargetLowering(TM, TM.getObjFileLowering()) {<br>
Subtarget = &TM.getSubtarget<SparcSubtarget>();<br>
<br>
// Set up the register classes.<br>
<br>
Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp Thu Nov 13 03:26:31 2014<br>
@@ -11,6 +11,7 @@<br>
//===----------------------------------------------------------------------===//<br>
<br>
#include "SparcTargetMachine.h"<br>
+#include "SparcTargetObjectFile.h"<br>
#include "Sparc.h"<br>
#include "llvm/CodeGen/Passes.h"<br>
#include "llvm/PassManager.h"<br>
@@ -32,6 +33,7 @@ SparcTargetMachine::SparcTargetMachine(c<br>
CodeGenOpt::Level OL,<br>
bool is64bit)<br>
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),<br>
+ TLOF(make_unique<SparcELFTargetObjectFile>()),<br>
Subtarget(TT, CPU, FS, *this, is64bit) {<br>
initAsmInfo();<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -21,6 +21,7 @@<br>
namespace llvm {<br>
<br>
class SparcTargetMachine : public LLVMTargetMachine {<br>
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;<br>
SparcSubtarget Subtarget;<br>
public:<br>
SparcTargetMachine(const Target &T, StringRef TT,<br>
@@ -32,6 +33,9 @@ public:<br>
<br>
// Pass Pipeline Configuration<br>
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;<br>
+ TargetLoweringObjectFile *getObjFileLowering() const override {<br>
+ return TLOF.get();<br>
+ }<br>
};<br>
<br>
/// SparcV8TargetMachine - Sparc 32-bit target machine<br>
<br>
Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.cpp Thu Nov 13 03:26:31 2014<br>
@@ -81,7 +81,7 @@ static MachineOperand earlyUseOperand(Ma<br>
}<br>
<br>
SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &tm)<br>
- : TargetLowering(tm, new TargetLoweringObjectFileELF()),<br>
+ : TargetLowering(tm, tm.getObjFileLowering()),<br>
Subtarget(tm.getSubtarget<SystemZSubtarget>()) {<br>
MVT PtrVT = getPointerTy();<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp Thu Nov 13 03:26:31 2014<br>
@@ -11,6 +11,7 @@<br>
#include "llvm/CodeGen/Passes.h"<br>
#include "llvm/Support/TargetRegistry.h"<br>
#include "llvm/Transforms/Scalar.h"<br>
+#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"<br>
<br>
using namespace llvm;<br>
<br>
@@ -25,6 +26,7 @@ SystemZTargetMachine::SystemZTargetMachi<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL)<br>
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),<br>
+ TLOF(make_unique<TargetLoweringObjectFileELF>()),<br>
Subtarget(TT, CPU, FS, *this) {<br>
initAsmInfo();<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -23,6 +23,7 @@ namespace llvm {<br>
class TargetFrameLowering;<br>
<br>
class SystemZTargetMachine : public LLVMTargetMachine {<br>
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;<br>
SystemZSubtarget Subtarget;<br>
<br>
public:<br>
@@ -37,6 +38,9 @@ public:<br>
}<br>
// Override LLVMTargetMachine<br>
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;<br>
+ TargetLoweringObjectFile *getObjFileLowering() const override {<br>
+ return TLOF.get();<br>
+ }<br>
};<br>
<br>
} // end namespace llvm<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Nov 13 03:26:31 2014<br>
@@ -199,28 +199,10 @@ static SDValue Concat256BitVectors(SDVal<br>
return Insert256BitVector(V, V2, NumElems/2, DAG, dl);<br>
}<br>
<br>
-static TargetLoweringObjectFile *createTLOF(const Triple &TT) {<br>
- if (TT.isOSBinFormatMachO()) {<br>
- if (TT.getArch() == Triple::x86_64)<br>
- return new X86_64MachoTargetObjectFile();<br>
- return new TargetLoweringObjectFileMachO();<br>
- }<br>
-<br>
- if (TT.isOSLinux())<br>
- return new X86LinuxTargetObjectFile();<br>
- if (TT.isOSBinFormatELF())<br>
- return new TargetLoweringObjectFileELF();<br>
- if (TT.isKnownWindowsMSVCEnvironment())<br>
- return new X86WindowsTargetObjectFile();<br>
- if (TT.isOSBinFormatCOFF())<br>
- return new TargetLoweringObjectFileCOFF();<br>
- llvm_unreachable("unknown subtarget type");<br>
-}<br>
-<br>
// FIXME: This should stop caching the target machine as soon as<br>
// we can remove resetOperationActions et al.<br>
X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM)<br>
- : TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))) {<br>
+ : TargetLowering(TM, TM.getObjFileLowering()) {<br>
Subtarget = &TM.getSubtarget<X86Subtarget>();<br>
X86ScalarSSEf64 = Subtarget->hasSSE2();<br>
X86ScalarSSEf32 = Subtarget->hasSSE1();<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Thu Nov 13 03:26:31 2014<br>
@@ -13,6 +13,7 @@<br>
<br>
#include "X86TargetMachine.h"<br>
#include "X86.h"<br>
+#include "X86TargetObjectFile.h"<br>
#include "llvm/CodeGen/Passes.h"<br>
#include "llvm/IR/Function.h"<br>
#include "llvm/PassManager.h"<br>
@@ -30,6 +31,24 @@ extern "C" void LLVMInitializeX86Target(<br>
<br>
void X86TargetMachine::anchor() { }<br>
<br>
+static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {<br>
+ if (TT.isOSBinFormatMachO()) {<br>
+ if (TT.getArch() == Triple::x86_64)<br>
+ return make_unique<X86_64MachoTargetObjectFile>();<br>
+ return make_unique<TargetLoweringObjectFileMachO>();<br>
+ }<br>
+<br>
+ if (TT.isOSLinux())<br>
+ return make_unique<X86LinuxTargetObjectFile>();<br>
+ if (TT.isOSBinFormatELF())<br>
+ return make_unique<TargetLoweringObjectFileELF>();<br>
+ if (TT.isKnownWindowsMSVCEnvironment())<br>
+ return make_unique<X86WindowsTargetObjectFile>();<br>
+ if (TT.isOSBinFormatCOFF())<br>
+ return make_unique<TargetLoweringObjectFileCOFF>();<br>
+ llvm_unreachable("unknown subtarget type");<br>
+}<br>
+<br>
/// X86TargetMachine ctor - Create an X86 target.<br>
///<br>
X86TargetMachine::X86TargetMachine(const Target &T, StringRef TT, StringRef CPU,<br>
@@ -37,6 +56,7 @@ X86TargetMachine::X86TargetMachine(const<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL)<br>
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),<br>
+ TLOF(createTLOF(Triple(getTargetTriple()))),<br>
Subtarget(TT, CPU, FS, *this, Options.StackAlignmentOverride) {<br>
// default to hard float ABI<br>
if (Options.FloatABIType == FloatABI::Default)<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -24,6 +24,7 @@ class StringRef;<br>
<br>
class X86TargetMachine final : public LLVMTargetMachine {<br>
virtual void anchor();<br>
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;<br>
X86Subtarget Subtarget;<br>
<br>
mutable StringMap<std::unique_ptr<X86Subtarget>> SubtargetMap;<br>
@@ -41,6 +42,9 @@ public:<br>
<br>
// Set up the pass pipeline.<br>
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;<br>
+ TargetLoweringObjectFile *getObjFileLowering() const override {<br>
+ return TLOF.get();<br>
+ }<br>
};<br>
<br>
} // End llvm namespace<br>
<br>
Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp Thu Nov 13 03:26:31 2014<br>
@@ -69,7 +69,7 @@ getTargetNodeName(unsigned Opcode) const<br>
}<br>
<br>
XCoreTargetLowering::XCoreTargetLowering(const TargetMachine &TM)<br>
- : TargetLowering(TM, new XCoreTargetObjectFile()), TM(TM),<br>
+ : TargetLowering(TM, TM.getObjFileLowering()), TM(TM),<br>
Subtarget(TM.getSubtarget<XCoreSubtarget>()) {<br>
<br>
// Set up the register classes.<br>
<br>
Modified: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp (original)<br>
+++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.cpp Thu Nov 13 03:26:31 2014<br>
@@ -11,6 +11,7 @@<br>
//===----------------------------------------------------------------------===//<br>
<br>
#include "XCoreTargetMachine.h"<br>
+#include "XCoreTargetObjectFile.h"<br>
#include "XCore.h"<br>
#include "llvm/CodeGen/Passes.h"<br>
#include "llvm/IR/Module.h"<br>
@@ -26,6 +27,7 @@ XCoreTargetMachine::XCoreTargetMachine(c<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL)<br>
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),<br>
+ TLOF(make_unique<XCoreTargetObjectFile>()),<br>
Subtarget(TT, CPU, FS, *this) {<br>
initAsmInfo();<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h?rev=221878&r1=221877&r2=221878&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h Thu Nov 13 03:26:31 2014<br>
@@ -20,6 +20,7 @@<br>
namespace llvm {<br>
<br>
class XCoreTargetMachine : public LLVMTargetMachine {<br>
+ std::unique_ptr<TargetLoweringObjectFile> TLOF;<br>
XCoreSubtarget Subtarget;<br>
public:<br>
XCoreTargetMachine(const Target &T, StringRef TT,<br>
@@ -33,6 +34,9 @@ public:<br>
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;<br>
<br>
void addAnalysisPasses(PassManagerBase &PM) override;<br>
+ TargetLoweringObjectFile *getObjFileLowering() const override {<br>
+ return TLOF.get();<br>
+ }<br>
};<br>
<br>
} // end namespace llvm<br>
<br>
<br>
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</blockquote></div><br></div>