<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Fri, Oct 31, 2014 at 12:02 PM, Chad Rosier <span dir="ltr"><<a href="mailto:mcrosier@codeaurora.org" target="_blank">mcrosier@codeaurora.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: mcrosier<br>
Date: Fri Oct 31 14:02:38 2014<br>
New Revision: 220987<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=220987&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=220987&view=rev</a><br>
Log:<br>
[AArch64] Check Dest Register Liveness in CondOpt pass.<br>
<br>
Our internal test reveals such case should not be transformed:<br>
<br>
cmp x17, #3<br>
<a href="http://b.lt" target="_blank">b.lt</a> .LBB10_15<br>
...<br>
subs x12, x12, #1<br>
<a href="http://b.gt" target="_blank">b.gt</a> .LBB10_1<br>
<br>
where x12 is a liveout, becomes:<br>
<br>
cmp x17, #2<br>
b.le .LBB10_15<br>
...<br>
subs x12, x12, #2<br>
<a href="http://b.ge" target="_blank">b.ge</a> .LBB10_1<br>
<br></blockquote><div><br></div><div>?</div><div><br></div><div>Is <= and >= somehow better than < and > ?</div><div><br></div><div>-- Sean Silva</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Unable to provide test case as it's difficult to reproduce on community branch.<br>
<br>
<a href="http://reviews.llvm.org/D6048" target="_blank">http://reviews.llvm.org/D6048</a><br>
Patch by Zhaoshi Zheng <<a href="mailto:zhaoshiz@codeaurora.org">zhaoshiz@codeaurora.org</a>>!<br>
<br>
Modified:<br>
llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp?rev=220987&r1=220986&r2=220987&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp?rev=220987&r1=220986&r2=220987&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/AArch64ConditionOptimizer.cpp Fri Oct 31 14:02:38 2014<br>
@@ -62,6 +62,7 @@<br>
#include "llvm/ADT/DepthFirstIterator.h"<br>
#include "llvm/ADT/SmallVector.h"<br>
#include "llvm/ADT/Statistic.h"<br>
+#include "llvm/CodeGen/LiveIntervalAnalysis.h"<br>
#include "llvm/CodeGen/MachineDominators.h"<br>
#include "llvm/CodeGen/MachineFunction.h"<br>
#include "llvm/CodeGen/MachineFunctionPass.h"<br>
@@ -115,6 +116,7 @@ void initializeAArch64ConditionOptimizer<br>
INITIALIZE_PASS_BEGIN(AArch64ConditionOptimizer, "aarch64-condopt",<br>
"AArch64 CondOpt Pass", false, false)<br>
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)<br>
+INITIALIZE_PASS_DEPENDENCY(LiveIntervals)<br>
INITIALIZE_PASS_END(AArch64ConditionOptimizer, "aarch64-condopt",<br>
"AArch64 CondOpt Pass", false, false)<br>
<br>
@@ -125,6 +127,8 @@ FunctionPass *llvm::createAArch64Conditi<br>
void AArch64ConditionOptimizer::getAnalysisUsage(AnalysisUsage &AU) const {<br>
AU.addRequired<MachineDominatorTree>();<br>
AU.addPreserved<MachineDominatorTree>();<br>
+ AU.addRequired<LiveIntervals>();<br>
+ AU.addPreserved<LiveIntervals>();<br>
MachineFunctionPass::getAnalysisUsage(AU);<br>
}<br>
<br>
@@ -134,13 +138,11 @@ void AArch64ConditionOptimizer::getAnaly<br>
MachineInstr *AArch64ConditionOptimizer::findSuitableCompare(<br>
MachineBasicBlock *MBB) {<br>
MachineBasicBlock::iterator I = MBB->getFirstTerminator();<br>
- if (I == MBB->end()) {<br>
+ if (I == MBB->end())<br>
return nullptr;<br>
- }<br>
<br>
- if (I->getOpcode() != AArch64::Bcc) {<br>
- return nullptr;<br>
- }<br>
+ if (I->getOpcode() != AArch64::Bcc)<br>
+ return nullptr;<br>
<br>
// Now find the instruction controlling the terminator.<br>
for (MachineBasicBlock::iterator B = MBB->begin(); I != B;) {<br>
@@ -153,7 +155,11 @@ MachineInstr *AArch64ConditionOptimizer:<br>
// cmn is an alias for adds with a dead destination register.<br>
case AArch64::ADDSWri:<br>
case AArch64::ADDSXri:<br>
- return I;<br>
+ if (I->getOperand(0).isDead())<br>
+ return I;<br>
+<br>
+ DEBUG(dbgs() << "Destination of cmp is not dead, " << *I << '\n');<br>
+ return nullptr;<br>
<br>
// Prevent false positive case like:<br>
// cmp w19, #0<br>
<br>
<br>
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</blockquote></div><br></div></div>