<html><head><meta http-equiv="Content-Type" content="text/html charset=windows-1252"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;"><br><div><div>On Oct 1, 2014, at 9:30 AM, Robert Khasanov <<a href="mailto:rob.khasanov@gmail.com">rob.khasanov@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div dir="ltr">Hi Adam,<div><br></div><div>About maskings in <span style="font-family:arial,sans-serif;font-size:13px">vextract*x4 instructions. I think we can include VK4 register class and v4i1 type for AVX512F subset as it is needed by instruction semantics. Elena, do you agree? It would be better keep all intrinsics lowering in one place.</span></div></div></blockquote><div><br></div><div>Hi Robert,</div><div><br></div><div>I don’t think that a single intrinsic is worth the complication at this point. I agree that this should be the long term direction but for now it’s probably easier to keep the current simple model in mind that AVX512f only requires v8i1 and above. So all the strangeness about v4i1 e.g. that it cannot be casted directly from a scalar type, etc. are kept to AVX512vl.</div><div><br></div><div>Once we figure all that out for AVX512vl we will know if it’s worth bringing it into the AVX512f world (for the sake of a single intrinsic or perhaps for some other reason I don’t yet know).</div><div><br></div><div>So my preference would keep the asm-only masking ops for now and experiment with v4i1 in AVX512f context at a later point. Is that acceptable?</div><br><blockquote type="cite"><div dir="ltr"><div><span style="font-family:arial,sans-serif;font-size:13px">Patches:</span></div><div><br></div><div>0001: LGTM, anyway. It should be committed even though we decided to include VK4 register class for AVX512F subset, because it would be helpful for other instructions (e.g. CMP that will override masking patterns)</div></div></blockquote><div><br></div><div>Yeah, I was hoping you’d notice that ;).</div><br><blockquote type="cite"><div dir="ltr"><div>0004: I don't understand why you use "AVX512_masking_asm_only" naming. It's not obvious from this name that only non-masking pattern is used.</div></div></blockquote><div><br></div><div>Do you have a better suggestion? What I was trying to express that for the masking variants we only provide asm support and no code-gen. Is your problem that the name is too masking focused, i.e. that for the non-masking we do provide code-gen?</div><div><br></div><div>Perhaps I should rename these classes to AVX512_maskable or something and call this guy AVX512_maskable_asm_masking?</div><div><br></div><div>Adam</div><br><blockquote type="cite"><div class="gmail_extra"><div class="gmail_quote">2014-10-01 17:47 GMT+04:00 Demikhovsky, Elena <span dir="ltr"><<a href="mailto:elena.demikhovsky@intel.com" target="_blank">elena.demikhovsky@intel.com</a>></span>:<br><blockquote class="gmail_quote" style="margin: 0px 0px 0px 0.8ex; border-left-width: 1px; border-left-color: rgb(204, 204, 204); border-left-style: solid; padding-left: 1ex; position: static; z-index: auto;">0003 : LGTM<br>
<span class="im HOEnZb"><br>
- Elena<br>
<br>
<br>
-----Original Message-----<br>
From: Adam Nemet [mailto:<a href="mailto:anemet@apple.com">anemet@apple.com</a>]<br>
Sent: Wednesday, October 01, 2014 08:57<br>
To: Demikhovsky, Elena; Robert Khasanov<br>
Cc: LLVM Commits<br>
Subject: [AVX512] Add masking variants for vextract*x4<br>
<br>
</span><div class="HOEnZb"><div class="h5">Hi Elena and Robert,<br>
<br>
First I tried to implement this with the usual intrinsic lowering but unfortunately because vextract*x4 produces v4* vectors I would have needed VK4 and v4i1 for masking in AVX512f which only come with AVX512vl. I don't think these intrinsics are worth the hassle making that work so instead I went for asm-only instructions. Then I have the intrinsics Pat<>s to call the corresponding instruction.<br>
<br>
This approach gave me a chance to incorporate asm-only masking support into the AVX512_masking hierarchy. See patch 1 and 4.<br>
<br>
Also the masking operand was not supported with the MRMDestReg format, so I've added that too. See patch 2.<br>
<br>
Please let me know if it looks good to you.<br>
<br>
Thanks,<br>
Adam<br>
<br>
</div></div><div class="HOEnZb"><div class="h5">---------------------------------------------------------------------<br>
Intel Israel (74) Limited<br>
<br>
This e-mail and any attachments may contain confidential material for<br>
the sole use of the intended recipient(s). Any review or distribution<br>
by others is strictly prohibited. If you are not the intended<br>
recipient, please contact the sender and delete all copies.<br>
<br>
</div></div></blockquote></div><br></div>
</blockquote></div><br></body></html>