<div dir="ltr"><br><div class="gmail_extra"><br><div class="gmail_quote">On Thu, Sep 18, 2014 at 6:27 AM, Aaron Ballman <span dir="ltr"><<a href="mailto:aaron@aaronballman.com" target="_blank">aaron@aaronballman.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: aaronballman<br>
Date: Thu Sep 18 08:27:14 2014<br>
New Revision: 218050<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=218050&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=218050&view=rev</a><br>
Log:<br>
Fixing a bunch of -Woverloaded-virtual warnings due to hiding getSubtargetImpl from the base class. NFC.<br></blockquote><div><br></div><div>Which compiler is producing that warning here?<br><br>I /think/ this is one of those cases where we improved the Clang warning and should just disable the GCC one.<br><br>(there's some debate about what the /point/ of this warning is, which is fair - but I tuned Clang's to detect the cases where someone tried to override and accidentally overloaded - which isn't the case here. The base class has a couple of virtual methods, the derived class correctly overrode one of them. I don't think this is a major source of bugs/worth fixing, possibly)<br><br>(the gap of course is that you can still end up with this problem:<br>struct base { virtual void func(int); virtual void func(bool); };<br>struct derived : base { void func(bool) override; void stuff() { func(42); /* oops, this calls func(bool) because shadowing */ } };<br>hence the debate about what the purpose of the warning is)</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<br>
Modified:<br>
llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h<br>
llvm/trunk/lib/Target/ARM/ARMTargetMachine.h<br>
llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h<br>
llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h<br>
llvm/trunk/lib/Target/Mips/MipsTargetMachine.h<br>
llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h<br>
llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h<br>
llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h<br>
llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h<br>
llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h<br>
llvm/trunk/lib/Target/X86/X86TargetMachine.h<br>
llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.h Thu Sep 18 08:27:14 2014<br>
@@ -31,6 +31,7 @@ public:<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL, bool IsLittleEndian);<br>
<br>
+ using LLVMTargetMachine::getSubtargetImpl;<br>
const AArch64Subtarget *getSubtargetImpl() const override {<br>
return &Subtarget;<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.h Thu Sep 18 08:27:14 2014<br>
@@ -32,6 +32,7 @@ public:<br>
CodeGenOpt::Level OL,<br>
bool isLittle);<br>
<br>
+ using LLVMTargetMachine::getSubtargetImpl;<br>
const ARMSubtarget *getSubtargetImpl() const override { return &Subtarget; }<br>
<br>
/// \brief Register ARM analysis passes with a pass manager.<br>
<br>
Modified: llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/Hexagon/HexagonTargetMachine.h Thu Sep 18 08:27:14 2014<br>
@@ -31,6 +31,7 @@ public:<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL);<br>
<br>
+ using LLVMTargetMachine::getSubtargetImpl;<br>
const HexagonSubtarget *getSubtargetImpl() const override {<br>
return &Subtarget;<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/MSP430/MSP430TargetMachine.h Thu Sep 18 08:27:14 2014<br>
@@ -32,6 +32,7 @@ public:<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL);<br>
<br>
+ using LLVMTargetMachine::getSubtargetImpl;<br>
const MSP430Subtarget *getSubtargetImpl() const override {<br>
return &Subtarget;<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.h Thu Sep 18 08:27:14 2014<br>
@@ -39,6 +39,7 @@ public:<br>
<br>
void addAnalysisPasses(PassManagerBase &PM) override;<br>
<br>
+ using LLVMTargetMachine::getSubtargetImpl;<br>
const MipsSubtarget *getSubtargetImpl() const override {<br>
if (Subtarget)<br>
return Subtarget;<br>
<br>
Modified: llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.h Thu Sep 18 08:27:14 2014<br>
@@ -35,6 +35,7 @@ public:<br>
const TargetOptions &Options, Reloc::Model RM,<br>
CodeModel::Model CM, CodeGenOpt::Level OP, bool is64bit);<br>
<br>
+ using LLVMTargetMachine::getSubtargetImpl;<br>
const NVPTXSubtarget *getSubtargetImpl() const override { return &Subtarget; }<br>
<br>
ManagedStringPool *getManagedStrPool() const {<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.h Thu Sep 18 08:27:14 2014<br>
@@ -32,6 +32,7 @@ public:<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL);<br>
<br>
+ using LLVMTargetMachine::getSubtargetImpl;<br>
const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; }<br>
<br>
// Pass Pipeline Configuration<br>
<br>
Modified: llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.h Thu Sep 18 08:27:14 2014<br>
@@ -33,6 +33,8 @@ public:<br>
StringRef CPU, TargetOptions Options, Reloc::Model RM,<br>
CodeModel::Model CM, CodeGenOpt::Level OL);<br>
~AMDGPUTargetMachine();<br>
+<br>
+ using LLVMTargetMachine::getSubtargetImpl;<br>
const AMDGPUSubtarget *getSubtargetImpl() const override {<br>
return &Subtarget;<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.h Thu Sep 18 08:27:14 2014<br>
@@ -28,6 +28,7 @@ public:<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL, bool is64bit);<br>
<br>
+ using LLVMTargetMachine::getSubtargetImpl;<br>
const SparcSubtarget *getSubtargetImpl() const override { return &Subtarget; }<br>
<br>
// Pass Pipeline Configuration<br>
<br>
Modified: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h Thu Sep 18 08:27:14 2014<br>
@@ -32,6 +32,7 @@ public:<br>
CodeGenOpt::Level OL);<br>
<br>
// Override TargetMachine.<br>
+ using LLVMTargetMachine::getSubtargetImpl;<br>
const SystemZSubtarget *getSubtargetImpl() const override {<br>
return &Subtarget;<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86TargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.h Thu Sep 18 08:27:14 2014<br>
@@ -31,6 +31,8 @@ public:<br>
StringRef CPU, StringRef FS, const TargetOptions &Options,<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL);<br>
+<br>
+ using LLVMTargetMachine::getSubtargetImpl;<br>
const X86Subtarget *getSubtargetImpl() const override { return &Subtarget; }<br>
<br>
/// \brief Register X86 analysis passes with a pass manager.<br>
<br>
Modified: llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h?rev=218050&r1=218049&r2=218050&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h (original)<br>
+++ llvm/trunk/lib/Target/XCore/XCoreTargetMachine.h Thu Sep 18 08:27:14 2014<br>
@@ -27,6 +27,7 @@ public:<br>
Reloc::Model RM, CodeModel::Model CM,<br>
CodeGenOpt::Level OL);<br>
<br>
+ using LLVMTargetMachine::getSubtargetImpl;<br>
const XCoreSubtarget *getSubtargetImpl() const override { return &Subtarget; }<br>
<br>
// Pass Pipeline Configuration<br>
<br>
<br>
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</blockquote></div><br></div></div>