<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Thanks Elena.<div class=""><br class=""></div><div class="">LGTM</div><div class=""><br class=""></div><div class="">I only have a few minor nitpicks:</div><div class=""> - function names should start with a lower case letter according to the coding standard. I know they weren't before, but it would be nice to clean that up while you are already touching the code.</div><div class=""> - 'using namespace' shouldn’t be in headers</div><div class=""> - there are a few 80 columns violations</div><div class=""><br class=""></div><div class=""><div class="">+ std::lower_bound(std::begin(IntrinsicsWithoutChain),</div><div class="">+ std::end(IntrinsicsWithoutChain), IntrinsicToFind); <— extra white space</div></div><div class=""><br class=""></div><div class="">- NULL —> nullptr</div><div class=""><br class=""></div><div class="">Cheers,</div><div class="">Juergen</div><div class=""><br class=""><div><blockquote type="cite" class=""><div class="">On Sep 3, 2014, at 5:30 AM, Demikhovsky, Elena <<a href="mailto:elena.demikhovsky@intel.com" class="">elena.demikhovsky@intel.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><div class="WordSection1" style="page: WordSection1; font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;"><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">I wrote one more implementation with binary search on a sorted static table.<o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">Please take a look.<o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">Thanks.<o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span></div><div class=""><div style="margin: 0cm 0cm 0.0001pt 36pt; font-size: 12pt; font-family: 'Times New Roman', serif; text-indent: -18pt;" class=""><span style="font-family: Calibri, sans-serif; color: rgb(49, 132, 155);" class=""><span class="">-<span style="font-style: normal; font-variant: normal; font-weight: normal; font-size: 7pt; line-height: normal; font-family: 'Times New Roman';" class=""> <span class="Apple-converted-space"> </span></span></span></span><span dir="LTR" class=""></span><b class=""><i class=""><span style="color: rgb(49, 132, 155);" class=""> Elena<o:p class=""></o:p></span></i></b></div></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span></div><div class=""><div style="border-style: solid none none; border-top-color: rgb(181, 196, 223); border-top-width: 1pt; padding: 3pt 0cm 0cm;" class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><b class=""><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class="">From:</span></b><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class=""><span class="Apple-converted-space"> </span>Demikhovsky, Elena<span class="Apple-converted-space"> </span><br class=""><b class="">Sent:</b><span class="Apple-converted-space"> </span>Wednesday, September 03, 2014 09:16<br class=""><b class="">To:</b><span class="Apple-converted-space"> </span>Juergen Ributzka<br class=""><b class="">Cc:</b><span class="Apple-converted-space"> </span>Sean Silva; David Blaikie; LLVM Commits<br class=""><b class="">Subject:</b><span class="Apple-converted-space"> </span>RE: [llvm] r216345 - X86 intrinsics table - simplifies intrinsics lowering.<o:p class=""></o:p></span></div></div></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><o:p class=""> </o:p></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">But this patch solves the problem. I removed globals from the header file. Can I commit it or I should look for another solution?<o:p class=""></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span></div><div class=""><div style="margin: 0cm 0cm 0.0001pt 36pt; font-size: 12pt; font-family: 'Times New Roman', serif; text-indent: -18pt;" class=""><span style="font-family: Calibri, sans-serif; color: rgb(49, 132, 155);" class=""><span class="">-<span style="font-style: normal; font-variant: normal; font-weight: normal; font-size: 7pt; line-height: normal; font-family: 'Times New Roman';" class=""> <span class="Apple-converted-space"> </span></span></span></span><span dir="LTR" class=""></span><b class=""><i class=""><span style="color: rgb(49, 132, 155);" class=""> Elena<o:p class=""></o:p></span></i></b></div></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span></div><div class=""><div style="border-style: solid none none; border-top-color: rgb(181, 196, 223); border-top-width: 1pt; padding: 3pt 0cm 0cm;" class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><b class=""><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class="">From:</span></b><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class=""><span class="Apple-converted-space"> </span>Juergen Ributzka [<a href="mailto:juergen@apple.com" style="color: purple; text-decoration: underline;" class="">mailto:juergen@apple.com</a>]<span class="Apple-converted-space"> </span><br class=""><b class="">Sent:</b><span class="Apple-converted-space"> </span>Tuesday, September 02, 2014 23:37<br class=""><b class="">To:</b><span class="Apple-converted-space"> </span>Demikhovsky, Elena<br class=""><b class="">Cc:</b><span class="Apple-converted-space"> </span>Sean Silva; David Blaikie; LLVM Commits<br class=""><b class="">Subject:</b><span class="Apple-converted-space"> </span>Re: [llvm] r216345 - X86 intrinsics table - simplifies intrinsics lowering.<o:p class=""></o:p></span></div></div></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><o:p class=""> </o:p></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">Hi Elena,<o:p class=""></o:p></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><o:p class=""> </o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">this change broke concurrent compilation for us. I looks like the globals (in a header file???) IntrWithChainMap and IntrWithoutChainMap are not guarded against multiple and concurrent initialization.<o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><o:p class=""> </o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">Could you please take a look?<o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><o:p class=""> </o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">Thanks<o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><o:p class=""> </o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">Cheers,<o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">Juergen<o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><o:p class=""> </o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><o:p class=""> </o:p></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">On Aug 27, 2014, at 12:54 AM, Demikhovsky, Elena <<a href="mailto:elena.demikhovsky@intel.com" style="color: purple; text-decoration: underline;" class="">elena.demikhovsky@intel.com</a>> wrote:<o:p class=""></o:p></div></div><p class="MsoNormal" style="margin: 0cm 0cm 12pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p class=""> </o:p></p><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">I put the intrinsics map as a static object inside static function that will be initialized on first call as Sean suggested.</span><o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span><o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">Please review.</span><o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span><o:p class=""></o:p></div></div><div style="margin-left: 36pt;" class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif; text-indent: -18pt;" class=""><span style="font-family: Calibri, sans-serif; color: rgb(49, 132, 155);" class="">-</span><span style="font-size: 7pt; color: rgb(49, 132, 155);" class=""> <span class="apple-converted-space"> </span></span><b class=""><i class=""><span style="color: rgb(49, 132, 155);" class=""> Elena</span></i></b><o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span><o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><b class=""><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class="">From:</span></b><span class="apple-converted-space"><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class=""> </span></span><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class="">Sean Silva [<a href="mailto:chisophugis@gmail.com" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">mailto:chisophugis@gmail.com</span></a>]<span class="apple-converted-space"> </span><br class=""><b class="">Sent:</b><span class="apple-converted-space"> </span>Wednesday, August 27, 2014 03:18<br class=""><b class="">To:</b><span class="apple-converted-space"> </span>David Blaikie<br class=""><b class="">Cc:</b><span class="apple-converted-space"> </span>Demikhovsky, Elena;<span class="apple-converted-space"> </span><a href="mailto:llvm-commits@cs.uiuc.edu" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">llvm-commits@cs.uiuc.edu</span></a><br class=""><b class="">Subject:</b><span class="apple-converted-space"> </span>Re: [llvm] r216345 - X86 intrinsics table - simplifies intrinsics lowering.</span><o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div><div class=""><p class="MsoNormal" style="margin: 0cm 0cm 12pt; font-size: 12pt; font-family: 'Times New Roman', serif;"> <o:p class=""></o:p></p><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">On Tue, Aug 26, 2014 at 2:22 PM, David Blaikie <<a href="mailto:dblaikie@gmail.com" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">dblaikie@gmail.com</span></a>> wrote:<o:p class=""></o:p></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div><div class=""><p class="MsoNormal" style="margin: 0cm 0cm 12pt; font-size: 12pt; font-family: 'Times New Roman', serif;"> <o:p class=""></o:p></p><div class=""><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">On Tue, Aug 26, 2014 at 2:10 PM, Sean Silva <<a href="mailto:chisophugis@gmail.com" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">chisophugis@gmail.com</span></a>> wrote:<o:p class=""></o:p></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div><div class=""><p class="MsoNormal" style="margin: 0cm 0cm 12pt; font-size: 12pt; font-family: 'Times New Roman', serif;"> <o:p class=""></o:p></p><div class=""><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">On Tue, Aug 26, 2014 at 4:15 AM, Demikhovsky, Elena <<a href="mailto:elena.demikhovsky@intel.com" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">elena.demikhovsky@intel.com</span></a>> wrote:<o:p class=""></o:p></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">- I initialize the map in static time, when X86Target object is created.</span><o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span><o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class="">- Static map initialization is supported in C++11, like</span><o:p class=""></o:p></div></div><pre style="margin: 0cm 0cm 0.0001pt; font-size: 10pt; font-family: 'Courier New'; line-height: 13.35pt; background-color: rgb(238, 238, 238); vertical-align: baseline; background-position: initial initial; background-repeat: initial initial;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span><span style="font-size: 10.5pt; font-family: Consolas; color: rgb(43, 145, 175); border: 1pt none windowtext; padding: 0cm;" class="">map</span><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;" class=""><<span style="color: rgb(43, 145, 175);" class="">int</span>, <span style="color: rgb(0, 0, 139);" class="">char</span>> m = {{<span style="color: maroon;" class="">1</span>, <span style="color: maroon;" class="">'a'</span>}, {<span style="color: maroon;" class="">3</span>, <span style="color: maroon;" class="">'b'</span>}, {<span style="color: maroon;" class="">5</span>, <span style="color: maroon;" class="">'c'</span>}, {<span style="color: maroon;" class="">7</span>, <span style="color: maroon;" class="">'d'</span>}};</span><o:p class=""></o:p></pre><pre style="margin: 0cm 0cm 0.0001pt; font-size: 10pt; font-family: 'Courier New'; line-height: 13.35pt; background-color: rgb(238, 238, 238); vertical-align: baseline; background-position: initial initial; background-repeat: initial initial;" class=""><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;" class=""> if LLVM strongly requires C++11, I can put static initialization.</span><o:p class=""></o:p></pre><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span><o:p class=""></o:p></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">I'm pretty sure that will still produce a static initializer called on startup. Please revert this until you can find a solution that doesn't require runtime initialization.<o:p class=""></o:p></div></div></div></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">+1, this isn't cool.<br class=""><br class="">I don't know if we're able to rely on multithreaded function-local static initialization (MSVC? - check the LLVM compiler feature compat page, perhaps) then you could just put this map in a static accessor function as a function-local static. That way it won't be a global constructor, just lazy initialized on first-call.<o:p class=""></o:p></div></div></div></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">It looks like this is just constant integer data though. A binary-search static table seems preferable.<o:p class=""></o:p></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">-- Sean Silva<o:p class=""></o:p></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div><blockquote style="border-style: none none none solid; border-left-color: rgb(204, 204, 204); border-left-width: 1pt; padding: 0cm 0cm 0cm 6pt; margin: 5pt 0cm 5pt 4.8pt;" class=""><div class=""><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div><blockquote style="border-style: none none none solid; border-left-color: rgb(204, 204, 204); border-left-width: 1pt; padding: 0cm 0cm 0cm 6pt; margin: 5pt 0cm 5pt 4.8pt;" class=""><div class=""><div class=""><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="color: rgb(136, 136, 136);" class=""> </span><o:p class=""></o:p></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="color: rgb(136, 136, 136);" class="">-- Sean Silva</span><o:p class=""></o:p></div></div></div><div class=""><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div><blockquote style="border-style: none none none solid; border-left-color: rgb(204, 204, 204); border-left-width: 1pt; padding: 0cm 0cm 0cm 6pt; margin: 5pt 0cm 5pt 4.8pt;" class=""><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span><o:p class=""></o:p></div></div><div style="margin-left: 36pt;" class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-family: Calibri, sans-serif; color: rgb(49, 132, 155);" class="">-</span><span style="font-size: 7pt; color: rgb(49, 132, 155);" class=""> <span class="apple-converted-space"> </span></span><b class=""><i class=""><span style="color: rgb(49, 132, 155);" class=""> Elena</span></i></b><o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);" class=""> </span><o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><b class=""><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class="">From:</span></b><span class="apple-converted-space"><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class=""> </span></span><span style="font-size: 10pt; font-family: Tahoma, sans-serif;" class="">Sean Silva [mailto:<a href="mailto:chisophugis@gmail.com" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">chisophugis@gmail.com</span></a>]<span class="apple-converted-space"> </span><br class=""><b class="">Sent:</b><span class="apple-converted-space"> </span>Monday, August 25, 2014 21:42<br class=""><b class="">To:</b><span class="apple-converted-space"> </span>Demikhovsky, Elena<br class=""><b class="">Cc:</b><span class="apple-converted-space"> </span><a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">llvm-commits@cs.uiuc.edu</span></a><br class=""><b class="">Subject:</b><span class="apple-converted-space"> </span>Re: [llvm] r216345 - X86 intrinsics table - simplifies intrinsics lowering.</span><o:p class=""></o:p></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div><div class=""><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 10pt; font-family: Arial, sans-serif;" class="">+std::map < unsigned, IntrinsicData> IntrWithChainMap;</span><o:p class=""></o:p></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">What's up with the random global (w/ static initializer)? We shouldn't have any of those in the library code.<o:p class=""></o:p></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">-- Sean Silva<o:p class=""></o:p></div></div></div></div><div class=""><p class="MsoNormal" style="margin: 0cm 0cm 12pt; font-size: 12pt; font-family: 'Times New Roman', serif;"> <o:p class=""></o:p></p><div class=""><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">On Sun, Aug 24, 2014 at 2:19 AM, Elena Demikhovsky <<a href="mailto:elena.demikhovsky@intel.com" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">elena.demikhovsky@intel.com</span></a>> wrote:<o:p class=""></o:p></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">Author: delena<br class="">Date: Sun Aug 24 04:19:56 2014<br class="">New Revision: 216345<br class=""><br class="">URL:<span class="apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project?rev=216345&view=rev" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">http://llvm.org/viewvc/llvm-project?rev=216345&view=rev</span></a><br class="">Log:<br class="">X86 intrinsics table - simplifies intrinsics lowering.<br class="">The tables are initialized when X86TargetLowering object is created.<br class=""><br class="">Added:<br class=""> llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h<br class="">Modified:<br class=""> llvm/trunk/include/llvm/IR/IntrinsicsX86.td<br class=""> llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br class=""><br class="">Modified: llvm/trunk/include/llvm/IR/IntrinsicsX86.td<br class="">URL:<span class="apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=216345&r1=216344&r2=216345&view=diff" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=216345&r1=216344&r2=216345&view=diff</span></a><br class="">==============================================================================<br class="">--- llvm/trunk/include/llvm/IR/IntrinsicsX86.td (original)<br class="">+++ llvm/trunk/include/llvm/IR/IntrinsicsX86.td Sun Aug 24 04:19:56 2014<br class="">@@ -1389,6 +1389,10 @@ let TargetPrefix = "x86" in { // All in<br class=""> GCCBuiltin<"__builtin_ia32_storeupd512_mask">,<br class=""> Intrinsic<[], [llvm_ptr_ty, llvm_v8f64_ty, llvm_i8_ty],<br class=""> [IntrReadWriteArgMem]>;<br class="">+ def int_x86_avx512_mask_store_ss :<br class="">+ GCCBuiltin<"__builtin_ia32_storess_mask">,<br class="">+ Intrinsic<[], [llvm_ptr_ty, llvm_v4f32_ty, llvm_i8_ty],<br class="">+ [IntrReadWriteArgMem]>;<br class=""> }<br class=""><br class=""> //===----------------------------------------------------------------------===//<br class=""><br class="">Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br class="">URL:<span class="apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=216345&r1=216344&r2=216345&view=diff" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=216345&r1=216344&r2=216345&view=diff</span></a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br class="">+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Aug 24 04:19:56 2014<br class="">@@ -49,6 +49,7 @@<br class=""> #include "llvm/Support/ErrorHandling.h"<br class=""> #include "llvm/Support/MathExtras.h"<br class=""> #include "llvm/Target/TargetOptions.h"<br class="">+#include "X86IntrinsicsInfo.h"<br class=""> #include <bitset><br class=""> #include <numeric><br class=""> #include <cctype><br class="">@@ -1642,6 +1643,8 @@ void X86TargetLowering::resetOperationAc<br class=""> PredictableSelectIsExpensive = !Subtarget->isAtom();<br class=""><br class=""> setPrefFunctionAlignment(4); // 2^4 bytes.<br class="">+<br class="">+ InitIntrinsicTables();<br class=""> }<br class=""><br class=""> // This has so far only been implemented for 64-bit MachO.<br class="">@@ -14488,109 +14491,40 @@ static unsigned getOpcodeForFMAIntrinsic<br class=""> static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) {<br class=""> SDLoc dl(Op);<br class=""> unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();<br class="">- switch (IntNo) {<br class="">- default: return SDValue(); // Don't custom lower most intrinsics.<br class="">- // Comparison intrinsics.<br class="">- case Intrinsic::x86_sse_comieq_ss:<br class="">- case Intrinsic::x86_sse_comilt_ss:<br class="">- case Intrinsic::x86_sse_comile_ss:<br class="">- case Intrinsic::x86_sse_comigt_ss:<br class="">- case Intrinsic::x86_sse_comige_ss:<br class="">- case Intrinsic::x86_sse_comineq_ss:<br class="">- case Intrinsic::x86_sse_ucomieq_ss:<br class="">- case Intrinsic::x86_sse_ucomilt_ss:<br class="">- case Intrinsic::x86_sse_ucomile_ss:<br class="">- case Intrinsic::x86_sse_ucomigt_ss:<br class="">- case Intrinsic::x86_sse_ucomige_ss:<br class="">- case Intrinsic::x86_sse_ucomineq_ss:<br class="">- case Intrinsic::x86_sse2_comieq_sd:<br class="">- case Intrinsic::x86_sse2_comilt_sd:<br class="">- case Intrinsic::x86_sse2_comile_sd:<br class="">- case Intrinsic::x86_sse2_comigt_sd:<br class="">- case Intrinsic::x86_sse2_comige_sd:<br class="">- case Intrinsic::x86_sse2_comineq_sd:<br class="">- case Intrinsic::x86_sse2_ucomieq_sd:<br class="">- case Intrinsic::x86_sse2_ucomilt_sd:<br class="">- case Intrinsic::x86_sse2_ucomile_sd:<br class="">- case Intrinsic::x86_sse2_ucomigt_sd:<br class="">- case Intrinsic::x86_sse2_ucomige_sd:<br class="">- case Intrinsic::x86_sse2_ucomineq_sd: {<br class="">- unsigned Opc;<br class="">- ISD::CondCode CC;<br class="">- switch (IntNo) {<br class="">- default: llvm_unreachable("Impossible intrinsic"); // Can't reach here.<br class="">- case Intrinsic::x86_sse_comieq_ss:<br class="">- case Intrinsic::x86_sse2_comieq_sd:<br class="">- Opc = X86ISD::COMI;<br class="">- CC = ISD::SETEQ;<br class="">- break;<br class="">- case Intrinsic::x86_sse_comilt_ss:<br class="">- case Intrinsic::x86_sse2_comilt_sd:<br class="">- Opc = X86ISD::COMI;<br class="">- CC = ISD::SETLT;<br class="">- break;<br class="">- case Intrinsic::x86_sse_comile_ss:<br class="">- case Intrinsic::x86_sse2_comile_sd:<br class="">- Opc = X86ISD::COMI;<br class="">- CC = ISD::SETLE;<br class="">- break;<br class="">- case Intrinsic::x86_sse_comigt_ss:<br class="">- case Intrinsic::x86_sse2_comigt_sd:<br class="">- Opc = X86ISD::COMI;<br class="">- CC = ISD::SETGT;<br class="">- break;<br class="">- case Intrinsic::x86_sse_comige_ss:<br class="">- case Intrinsic::x86_sse2_comige_sd:<br class="">- Opc = X86ISD::COMI;<br class="">- CC = ISD::SETGE;<br class="">- break;<br class="">- case Intrinsic::x86_sse_comineq_ss:<br class="">- case Intrinsic::x86_sse2_comineq_sd:<br class="">- Opc = X86ISD::COMI;<br class="">- CC = ISD::SETNE;<br class="">- break;<br class="">- case Intrinsic::x86_sse_ucomieq_ss:<br class="">- case Intrinsic::x86_sse2_ucomieq_sd:<br class="">- Opc = X86ISD::UCOMI;<br class="">- CC = ISD::SETEQ;<br class="">- break;<br class="">- case Intrinsic::x86_sse_ucomilt_ss:<br class="">- case Intrinsic::x86_sse2_ucomilt_sd:<br class="">- Opc = X86ISD::UCOMI;<br class="">- CC = ISD::SETLT;<br class="">- break;<br class="">- case Intrinsic::x86_sse_ucomile_ss:<br class="">- case Intrinsic::x86_sse2_ucomile_sd:<br class="">- Opc = X86ISD::UCOMI;<br class="">- CC = ISD::SETLE;<br class="">- break;<br class="">- case Intrinsic::x86_sse_ucomigt_ss:<br class="">- case Intrinsic::x86_sse2_ucomigt_sd:<br class="">- Opc = X86ISD::UCOMI;<br class="">- CC = ISD::SETGT;<br class="">- break;<br class="">- case Intrinsic::x86_sse_ucomige_ss:<br class="">- case Intrinsic::x86_sse2_ucomige_sd:<br class="">- Opc = X86ISD::UCOMI;<br class="">- CC = ISD::SETGE;<br class="">- break;<br class="">- case Intrinsic::x86_sse_ucomineq_ss:<br class="">- case Intrinsic::x86_sse2_ucomineq_sd:<br class="">- Opc = X86ISD::UCOMI;<br class="">- CC = ISD::SETNE;<br class="">+<br class="">+ const IntrinsicData* IntrData = GetIntrinsicWithoutChain(IntNo);<br class="">+ if (IntrData) {<br class="">+ switch(IntrData->Type) {<br class="">+ case INTR_TYPE_1OP:<br class="">+ return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), Op.getOperand(1));<br class="">+ case INTR_TYPE_2OP:<br class="">+ return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), Op.getOperand(1),<br class="">+ Op.getOperand(2));<br class="">+ case INTR_TYPE_3OP:<br class="">+ return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), Op.getOperand(1),<br class="">+ Op.getOperand(2), Op.getOperand(3));<br class="">+ case COMI: { // Comparison intrinsics<br class="">+ ISD::CondCode CC = (ISD::CondCode)IntrData->Opc1;<br class="">+ SDValue LHS = Op.getOperand(1);<br class="">+ SDValue RHS = Op.getOperand(2);<br class="">+ unsigned X86CC = TranslateX86CC(CC, true, LHS, RHS, DAG);<br class="">+ assert(X86CC != X86::COND_INVALID && "Unexpected illegal condition!");<br class="">+ SDValue Cond = DAG.getNode(IntrData->Opc0, dl, MVT::i32, LHS, RHS);<br class="">+ SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,<br class="">+ DAG.getConstant(X86CC, MVT::i8), Cond);<br class="">+ return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);<br class="">+ }<br class="">+ case VSHIFT:<br class="">+ return getTargetVShiftNode(IntrData->Opc0, dl, Op.getSimpleValueType(),<br class="">+ Op.getOperand(1), Op.getOperand(2), DAG);<br class="">+ default:<br class=""> break;<br class=""> }<br class="">-<br class="">- SDValue LHS = Op.getOperand(1);<br class="">- SDValue RHS = Op.getOperand(2);<br class="">- unsigned X86CC = TranslateX86CC(CC, true, LHS, RHS, DAG);<br class="">- assert(X86CC != X86::COND_INVALID && "Unexpected illegal condition!");<br class="">- SDValue Cond = DAG.getNode(Opc, dl, MVT::i32, LHS, RHS);<br class="">- SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,<br class="">- DAG.getConstant(X86CC, MVT::i8), Cond);<br class="">- return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);<br class=""> }<br class=""><br class="">+ switch (IntNo) {<br class="">+ default: return SDValue(); // Don't custom lower most intrinsics.<br class="">+<br class=""> // Arithmetic intrinsics.<br class=""> case Intrinsic::x86_sse2_pmulu_dq:<br class=""> case Intrinsic::x86_avx2_pmulu_dq:<br class="">@@ -14612,128 +14546,6 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S<br class=""> return DAG.getNode(ISD::MULHS, dl, Op.getValueType(),<br class=""> Op.getOperand(1), Op.getOperand(2));<br class=""><br class="">- // SSE2/AVX2 sub with unsigned saturation intrinsics<br class="">- case Intrinsic::x86_sse2_psubus_b:<br class="">- case Intrinsic::x86_sse2_psubus_w:<br class="">- case Intrinsic::x86_avx2_psubus_b:<br class="">- case Intrinsic::x86_avx2_psubus_w:<br class="">- return DAG.getNode(X86ISD::SUBUS, dl, Op.getValueType(),<br class="">- Op.getOperand(1), Op.getOperand(2));<br class="">-<br class="">- // SSE3/AVX horizontal add/sub intrinsics<br class="">- case Intrinsic::x86_sse3_hadd_ps:<br class="">- case Intrinsic::x86_sse3_hadd_pd:<br class="">- case Intrinsic::x86_avx_hadd_ps_256:<br class="">- case Intrinsic::x86_avx_hadd_pd_256:<br class="">- case Intrinsic::x86_sse3_hsub_ps:<br class="">- case Intrinsic::x86_sse3_hsub_pd:<br class="">- case Intrinsic::x86_avx_hsub_ps_256:<br class="">- case Intrinsic::x86_avx_hsub_pd_256:<br class="">- case Intrinsic::x86_ssse3_phadd_w_128:<br class="">- case Intrinsic::x86_ssse3_phadd_d_128:<br class="">- case Intrinsic::x86_avx2_phadd_w:<br class="">- case Intrinsic::x86_avx2_phadd_d:<br class="">- case Intrinsic::x86_ssse3_phsub_w_128:<br class="">- case Intrinsic::x86_ssse3_phsub_d_128:<br class="">- case Intrinsic::x86_avx2_phsub_w:<br class="">- case Intrinsic::x86_avx2_phsub_d: {<br class="">- unsigned Opcode;<br class="">- switch (IntNo) {<br class="">- default: llvm_unreachable("Impossible intrinsic"); // Can't reach here.<br class="">- case Intrinsic::x86_sse3_hadd_ps:<br class="">- case Intrinsic::x86_sse3_hadd_pd:<br class="">- case Intrinsic::x86_avx_hadd_ps_256:<br class="">- case Intrinsic::x86_avx_hadd_pd_256:<br class="">- Opcode = X86ISD::FHADD;<br class="">- break;<br class="">- case Intrinsic::x86_sse3_hsub_ps:<br class="">- case Intrinsic::x86_sse3_hsub_pd:<br class="">- case Intrinsic::x86_avx_hsub_ps_256:<br class="">- case Intrinsic::x86_avx_hsub_pd_256:<br class="">- Opcode = X86ISD::FHSUB;<br class="">- break;<br class="">- case Intrinsic::x86_ssse3_phadd_w_128:<br class="">- case Intrinsic::x86_ssse3_phadd_d_128:<br class="">- case Intrinsic::x86_avx2_phadd_w:<br class="">- case Intrinsic::x86_avx2_phadd_d:<br class="">- Opcode = X86ISD::HADD;<br class="">- break;<br class="">- case Intrinsic::x86_ssse3_phsub_w_128:<br class="">- case Intrinsic::x86_ssse3_phsub_d_128:<br class="">- case Intrinsic::x86_avx2_phsub_w:<br class="">- case Intrinsic::x86_avx2_phsub_d:<br class="">- Opcode = X86ISD::HSUB;<br class="">- break;<br class="">- }<br class="">- return DAG.getNode(Opcode, dl, Op.getValueType(),<br class="">- Op.getOperand(1), Op.getOperand(2));<br class="">- }<br class="">-<br class="">- // SSE2/SSE41/AVX2 integer max/min intrinsics.<br class="">- case Intrinsic::x86_sse2_pmaxu_b:<br class="">- case Intrinsic::x86_sse41_pmaxuw:<br class="">- case Intrinsic::x86_sse41_pmaxud:<br class="">- case Intrinsic::x86_avx2_pmaxu_b:<br class="">- case Intrinsic::x86_avx2_pmaxu_w:<br class="">- case Intrinsic::x86_avx2_pmaxu_d:<br class="">- case Intrinsic::x86_sse2_pminu_b:<br class="">- case Intrinsic::x86_sse41_pminuw:<br class="">- case Intrinsic::x86_sse41_pminud:<br class="">- case Intrinsic::x86_avx2_pminu_b:<br class="">- case Intrinsic::x86_avx2_pminu_w:<br class="">- case Intrinsic::x86_avx2_pminu_d:<br class="">- case Intrinsic::x86_sse41_pmaxsb:<br class="">- case Intrinsic::x86_sse2_pmaxs_w:<br class="">- case Intrinsic::x86_sse41_pmaxsd:<br class="">- case Intrinsic::x86_avx2_pmaxs_b:<br class="">- case Intrinsic::x86_avx2_pmaxs_w:<br class="">- case Intrinsic::x86_avx2_pmaxs_d:<br class="">- case Intrinsic::x86_sse41_pminsb:<br class="">- case Intrinsic::x86_sse2_pmins_w:<br class="">- case Intrinsic::x86_sse41_pminsd:<br class="">- case Intrinsic::x86_avx2_pmins_b:<br class="">- case Intrinsic::x86_avx2_pmins_w:<br class="">- case Intrinsic::x86_avx2_pmins_d: {<br class="">- unsigned Opcode;<br class="">- switch (IntNo) {<br class="">- default: llvm_unreachable("Impossible intrinsic"); // Can't reach here.<br class="">- case Intrinsic::x86_sse2_pmaxu_b:<br class="">- case Intrinsic::x86_sse41_pmaxuw:<br class="">- case Intrinsic::x86_sse41_pmaxud:<br class="">- case Intrinsic::x86_avx2_pmaxu_b:<br class="">- case Intrinsic::x86_avx2_pmaxu_w:<br class="">- case Intrinsic::x86_avx2_pmaxu_d:<br class="">- Opcode = X86ISD::UMAX;<br class="">- break;<br class="">- case Intrinsic::x86_sse2_pminu_b:<br class="">- case Intrinsic::x86_sse41_pminuw:<br class="">- case Intrinsic::x86_sse41_pminud:<br class="">- case Intrinsic::x86_avx2_pminu_b:<br class="">- case Intrinsic::x86_avx2_pminu_w:<br class="">- case Intrinsic::x86_avx2_pminu_d:<br class="">- Opcode = X86ISD::UMIN;<br class="">- break;<br class="">- case Intrinsic::x86_sse41_pmaxsb:<br class="">- case Intrinsic::x86_sse2_pmaxs_w:<br class="">- case Intrinsic::x86_sse41_pmaxsd:<br class="">- case Intrinsic::x86_avx2_pmaxs_b:<br class="">- case Intrinsic::x86_avx2_pmaxs_w:<br class="">- case Intrinsic::x86_avx2_pmaxs_d:<br class="">- Opcode = X86ISD::SMAX;<br class="">- break;<br class="">- case Intrinsic::x86_sse41_pminsb:<br class="">- case Intrinsic::x86_sse2_pmins_w:<br class="">- case Intrinsic::x86_sse41_pminsd:<br class="">- case Intrinsic::x86_avx2_pmins_b:<br class="">- case Intrinsic::x86_avx2_pmins_w:<br class="">- case Intrinsic::x86_avx2_pmins_d:<br class="">- Opcode = X86ISD::SMIN;<br class="">- break;<br class="">- }<br class="">- return DAG.getNode(Opcode, dl, Op.getValueType(),<br class="">- Op.getOperand(1), Op.getOperand(2));<br class="">- }<br class="">-<br class=""> // SSE/SSE2/AVX floating point max/min intrinsics.<br class=""> case Intrinsic::x86_sse_max_ps:<br class=""> case Intrinsic::x86_sse2_max_pd:<br class="">@@ -14838,17 +14650,6 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S<br class=""> return DAG.getNode(X86ISD::PSIGN, dl, Op.getValueType(),<br class=""> Op.getOperand(1), Op.getOperand(2));<br class=""><br class="">- case Intrinsic::x86_sse41_insertps:<br class="">- return DAG.getNode(X86ISD::INSERTPS, dl, Op.getValueType(),<br class="">- Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));<br class="">-<br class="">- case Intrinsic::x86_avx_vperm2f128_ps_256:<br class="">- case Intrinsic::x86_avx_vperm2f128_pd_256:<br class="">- case Intrinsic::x86_avx_vperm2f128_si_256:<br class="">- case Intrinsic::x86_avx2_vperm2i128:<br class="">- return DAG.getNode(X86ISD::VPERM2X128, dl, Op.getValueType(),<br class="">- Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));<br class="">-<br class=""> case Intrinsic::x86_avx2_permd:<br class=""> case Intrinsic::x86_avx2_permps:<br class=""> // Operands intentionally swapped. Mask is last operand to intrinsic,<br class="">@@ -14856,12 +14657,6 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S<br class=""> return DAG.getNode(X86ISD::VPERMV, dl, Op.getValueType(),<br class=""> Op.getOperand(2), Op.getOperand(1));<br class=""><br class="">- case Intrinsic::x86_sse_sqrt_ps:<br class="">- case Intrinsic::x86_sse2_sqrt_pd:<br class="">- case Intrinsic::x86_avx_sqrt_ps_256:<br class="">- case Intrinsic::x86_avx_sqrt_pd_256:<br class="">- return DAG.getNode(ISD::FSQRT, dl, Op.getValueType(), Op.getOperand(1));<br class="">-<br class=""> case Intrinsic::x86_avx512_mask_valign_q_512:<br class=""> case Intrinsic::x86_avx512_mask_valign_d_512:<br class=""> // Vector source operands are swapped.<br class="">@@ -14947,100 +14742,6 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S<br class=""> return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);<br class=""> }<br class=""><br class="">- // SSE/AVX shift intrinsics<br class="">- case Intrinsic::x86_sse2_psll_w:<br class="">- case Intrinsic::x86_sse2_psll_d:<br class="">- case Intrinsic::x86_sse2_psll_q:<br class="">- case Intrinsic::x86_avx2_psll_w:<br class="">- case Intrinsic::x86_avx2_psll_d:<br class="">- case Intrinsic::x86_avx2_psll_q:<br class="">- case Intrinsic::x86_sse2_psrl_w:<br class="">- case Intrinsic::x86_sse2_psrl_d:<br class="">- case Intrinsic::x86_sse2_psrl_q:<br class="">- case Intrinsic::x86_avx2_psrl_w:<br class="">- case Intrinsic::x86_avx2_psrl_d:<br class="">- case Intrinsic::x86_avx2_psrl_q:<br class="">- case Intrinsic::x86_sse2_psra_w:<br class="">- case Intrinsic::x86_sse2_psra_d:<br class="">- case Intrinsic::x86_avx2_psra_w:<br class="">- case Intrinsic::x86_avx2_psra_d: {<br class="">- unsigned Opcode;<br class="">- switch (IntNo) {<br class="">- default: llvm_unreachable("Impossible intrinsic"); // Can't reach here.<br class="">- case Intrinsic::x86_sse2_psll_w:<br class="">- case Intrinsic::x86_sse2_psll_d:<br class="">- case Intrinsic::x86_sse2_psll_q:<br class="">- case Intrinsic::x86_avx2_psll_w:<br class="">- case Intrinsic::x86_avx2_psll_d:<br class="">- case Intrinsic::x86_avx2_psll_q:<br class="">- Opcode = X86ISD::VSHL;<br class="">- break;<br class="">- case Intrinsic::x86_sse2_psrl_w:<br class="">- case Intrinsic::x86_sse2_psrl_d:<br class="">- case Intrinsic::x86_sse2_psrl_q:<br class="">- case Intrinsic::x86_avx2_psrl_w:<br class="">- case Intrinsic::x86_avx2_psrl_d:<br class="">- case Intrinsic::x86_avx2_psrl_q:<br class="">- Opcode = X86ISD::VSRL;<br class="">- break;<br class="">- case Intrinsic::x86_sse2_psra_w:<br class="">- case Intrinsic::x86_sse2_psra_d:<br class="">- case Intrinsic::x86_avx2_psra_w:<br class="">- case Intrinsic::x86_avx2_psra_d:<br class="">- Opcode = X86ISD::VSRA;<br class="">- break;<br class="">- }<br class="">- return DAG.getNode(Opcode, dl, Op.getValueType(),<br class="">- Op.getOperand(1), Op.getOperand(2));<br class="">- }<br class="">-<br class="">- // SSE/AVX immediate shift intrinsics<br class="">- case Intrinsic::x86_sse2_pslli_w:<br class="">- case Intrinsic::x86_sse2_pslli_d:<br class="">- case Intrinsic::x86_sse2_pslli_q:<br class="">- case Intrinsic::x86_avx2_pslli_w:<br class="">- case Intrinsic::x86_avx2_pslli_d:<br class="">- case Intrinsic::x86_avx2_pslli_q:<br class="">- case Intrinsic::x86_sse2_psrli_w:<br class="">- case Intrinsic::x86_sse2_psrli_d:<br class="">- case Intrinsic::x86_sse2_psrli_q:<br class="">- case Intrinsic::x86_avx2_psrli_w:<br class="">- case Intrinsic::x86_avx2_psrli_d:<br class="">- case Intrinsic::x86_avx2_psrli_q:<br class="">- case Intrinsic::x86_sse2_psrai_w:<br class="">- case Intrinsic::x86_sse2_psrai_d:<br class="">- case Intrinsic::x86_avx2_psrai_w:<br class="">- case Intrinsic::x86_avx2_psrai_d: {<br class="">- unsigned Opcode;<br class="">- switch (IntNo) {<br class="">- default: llvm_unreachable("Impossible intrinsic"); // Can't reach here.<br class="">- case Intrinsic::x86_sse2_pslli_w:<br class="">- case Intrinsic::x86_sse2_pslli_d:<br class="">- case Intrinsic::x86_sse2_pslli_q:<br class="">- case Intrinsic::x86_avx2_pslli_w:<br class="">- case Intrinsic::x86_avx2_pslli_d:<br class="">- case Intrinsic::x86_avx2_pslli_q:<br class="">- Opcode = X86ISD::VSHLI;<br class="">- break;<br class="">- case Intrinsic::x86_sse2_psrli_w:<br class="">- case Intrinsic::x86_sse2_psrli_d:<br class="">- case Intrinsic::x86_sse2_psrli_q:<br class="">- case Intrinsic::x86_avx2_psrli_w:<br class="">- case Intrinsic::x86_avx2_psrli_d:<br class="">- case Intrinsic::x86_avx2_psrli_q:<br class="">- Opcode = X86ISD::VSRLI;<br class="">- break;<br class="">- case Intrinsic::x86_sse2_psrai_w:<br class="">- case Intrinsic::x86_sse2_psrai_d:<br class="">- case Intrinsic::x86_avx2_psrai_w:<br class="">- case Intrinsic::x86_avx2_psrai_d:<br class="">- Opcode = X86ISD::VSRAI;<br class="">- break;<br class="">- }<br class="">- return getTargetVShiftNode(Opcode, dl, Op.getSimpleValueType(),<br class="">- Op.getOperand(1), Op.getOperand(2), DAG);<br class="">- }<br class="">-<br class=""> case Intrinsic::x86_sse42_pcmpistria128:<br class=""> case Intrinsic::x86_sse42_pcmpestria128:<br class=""> case Intrinsic::x86_sse42_pcmpistric128:<br class="">@@ -15352,134 +15053,25 @@ static SDValue LowerREADCYCLECOUNTER(SDV<br class=""> return DAG.getMergeValues(Results, DL);<br class=""> }<br class=""><br class="">-enum IntrinsicType {<br class="">- GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, ADX<br class="">-};<br class="">-<br class="">-struct IntrinsicData {<br class="">- IntrinsicData(IntrinsicType IType, unsigned IOpc0, unsigned IOpc1)<br class="">- :Type(IType), Opc0(IOpc0), Opc1(IOpc1) {}<br class="">- IntrinsicType Type;<br class="">- unsigned Opc0;<br class="">- unsigned Opc1;<br class="">-};<br class="">-<br class="">-std::map < unsigned, IntrinsicData> IntrMap;<br class="">-static void InitIntinsicsMap() {<br class="">- static bool Initialized = false;<br class="">- if (Initialized)<br class="">- return;<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qps_512,<br class="">- IntrinsicData(GATHER, X86::VGATHERQPSZrm, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qps_512,<br class="">- IntrinsicData(GATHER, X86::VGATHERQPSZrm, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qpd_512,<br class="">- IntrinsicData(GATHER, X86::VGATHERQPDZrm, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_dpd_512,<br class="">- IntrinsicData(GATHER, X86::VGATHERDPDZrm, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_dps_512,<br class="">- IntrinsicData(GATHER, X86::VGATHERDPSZrm, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qpi_512,<br class="">- IntrinsicData(GATHER, X86::VPGATHERQDZrm, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qpq_512,<br class="">- IntrinsicData(GATHER, X86::VPGATHERQQZrm, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_dpi_512,<br class="">- IntrinsicData(GATHER, X86::VPGATHERDDZrm, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_dpq_512,<br class="">- IntrinsicData(GATHER, X86::VPGATHERDQZrm, 0)));<br class="">-<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_qps_512,<br class="">- IntrinsicData(SCATTER, X86::VSCATTERQPSZmr, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_qpd_512,<br class="">- IntrinsicData(SCATTER, X86::VSCATTERQPDZmr, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_dpd_512,<br class="">- IntrinsicData(SCATTER, X86::VSCATTERDPDZmr, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_dps_512,<br class="">- IntrinsicData(SCATTER, X86::VSCATTERDPSZmr, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_qpi_512,<br class="">- IntrinsicData(SCATTER, X86::VPSCATTERQDZmr, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_qpq_512,<br class="">- IntrinsicData(SCATTER, X86::VPSCATTERQQZmr, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_dpi_512,<br class="">- IntrinsicData(SCATTER, X86::VPSCATTERDDZmr, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_dpq_512,<br class="">- IntrinsicData(SCATTER, X86::VPSCATTERDQZmr, 0)));<br class="">-<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gatherpf_qps_512,<br class="">- IntrinsicData(PREFETCH, X86::VGATHERPF0QPSm,<br class="">- X86::VGATHERPF1QPSm)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gatherpf_qpd_512,<br class="">- IntrinsicData(PREFETCH, X86::VGATHERPF0QPDm,<br class="">- X86::VGATHERPF1QPDm)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gatherpf_dpd_512,<br class="">- IntrinsicData(PREFETCH, X86::VGATHERPF0DPDm,<br class="">- X86::VGATHERPF1DPDm)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gatherpf_dps_512,<br class="">- IntrinsicData(PREFETCH, X86::VGATHERPF0DPSm,<br class="">- X86::VGATHERPF1DPSm)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatterpf_qps_512,<br class="">- IntrinsicData(PREFETCH, X86::VSCATTERPF0QPSm,<br class="">- X86::VSCATTERPF1QPSm)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatterpf_qpd_512,<br class="">- IntrinsicData(PREFETCH, X86::VSCATTERPF0QPDm,<br class="">- X86::VSCATTERPF1QPDm)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatterpf_dpd_512,<br class="">- IntrinsicData(PREFETCH, X86::VSCATTERPF0DPDm,<br class="">- X86::VSCATTERPF1DPDm)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatterpf_dps_512,<br class="">- IntrinsicData(PREFETCH, X86::VSCATTERPF0DPSm,<br class="">- X86::VSCATTERPF1DPSm)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_rdrand_16,<br class="">- IntrinsicData(RDRAND, X86ISD::RDRAND, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_rdrand_32,<br class="">- IntrinsicData(RDRAND, X86ISD::RDRAND, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_rdrand_64,<br class="">- IntrinsicData(RDRAND, X86ISD::RDRAND, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_rdseed_16,<br class="">- IntrinsicData(RDSEED, X86ISD::RDSEED, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_rdseed_32,<br class="">- IntrinsicData(RDSEED, X86ISD::RDSEED, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_rdseed_64,<br class="">- IntrinsicData(RDSEED, X86ISD::RDSEED, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_xtest,<br class="">- IntrinsicData(XTEST, X86ISD::XTEST, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_rdtsc,<br class="">- IntrinsicData(RDTSC, X86ISD::RDTSC_DAG, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_rdtscp,<br class="">- IntrinsicData(RDTSC, X86ISD::RDTSCP_DAG, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_rdpmc,<br class="">- IntrinsicData(RDPMC, X86ISD::RDPMC_DAG, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_addcarryx_u32,<br class="">- IntrinsicData(ADX, X86ISD::ADC, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_addcarryx_u64,<br class="">- IntrinsicData(ADX, X86ISD::ADC, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_addcarry_u32,<br class="">- IntrinsicData(ADX, X86ISD::ADC, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_addcarry_u64,<br class="">- IntrinsicData(ADX, X86ISD::ADC, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_subborrow_u32,<br class="">- IntrinsicData(ADX, X86ISD::SBB, 0)));<br class="">- IntrMap.insert(std::make_pair(Intrinsic::x86_subborrow_u64,<br class="">- IntrinsicData(ADX, X86ISD::SBB, 0)));<br class="">- Initialized = true;<br class="">-}<br class=""><br class=""> static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget *Subtarget,<br class=""> SelectionDAG &DAG) {<br class="">- InitIntinsicsMap();<br class=""> unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();<br class="">- std::map < unsigned, IntrinsicData>::const_iterator itr = IntrMap.find(IntNo);<br class="">- if (itr == IntrMap.end())<br class="">+<br class="">+ const IntrinsicData* IntrData = GetIntrinsicWithChain(IntNo);<br class="">+ if (!IntrData)<br class=""> return SDValue();<br class=""><br class=""> SDLoc dl(Op);<br class="">- IntrinsicData Intr = itr->second;<br class="">- switch(Intr.Type) {<br class="">+ switch(IntrData->Type) {<br class="">+ default:<br class="">+ llvm_unreachable("Unknown Intrinsic Type");<br class="">+ break;<br class=""> case RDSEED:<br class=""> case RDRAND: {<br class=""> // Emit the node with the right value type.<br class=""> SDVTList VTs = DAG.getVTList(Op->getValueType(0), MVT::Glue, MVT::Other);<br class="">- SDValue Result = DAG.getNode(Intr.Opc0, dl, VTs, Op.getOperand(0));<br class="">+ SDValue Result = DAG.getNode(IntrData->Opc0, dl, VTs, Op.getOperand(0));<br class=""><br class=""> // If the value returned by RDRAND/RDSEED was valid (CF=1), return 1.<br class=""> // Otherwise return the value from Rand, which is always 0, casted to i32.<br class="">@@ -15503,7 +15095,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br class=""> SDValue Index = Op.getOperand(4);<br class=""> SDValue Mask = Op.getOperand(5);<br class=""> SDValue Scale = Op.getOperand(6);<br class="">- return getGatherNode(Intr.Opc0, Op, DAG, Src, Mask, Base, Index, Scale, Chain,<br class="">+ return getGatherNode(IntrData->Opc0, Op, DAG, Src, Mask, Base, Index, Scale, Chain,<br class=""> Subtarget);<br class=""> }<br class=""> case SCATTER: {<br class="">@@ -15514,7 +15106,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br class=""> SDValue Index = Op.getOperand(4);<br class=""> SDValue Src = Op.getOperand(5);<br class=""> SDValue Scale = Op.getOperand(6);<br class="">- return getScatterNode(Intr.Opc0, Op, DAG, Src, Mask, Base, Index, Scale, Chain);<br class="">+ return getScatterNode(IntrData->Opc0, Op, DAG, Src, Mask, Base, Index, Scale, Chain);<br class=""> }<br class=""> case PREFETCH: {<br class=""> SDValue Hint = Op.getOperand(6);<br class="">@@ -15522,7 +15114,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br class=""> if (dyn_cast<ConstantSDNode> (Hint) == nullptr ||<br class=""> (HintVal = dyn_cast<ConstantSDNode> (Hint)->getZExtValue()) > 1)<br class=""> llvm_unreachable("Wrong prefetch hint in intrinsic: should be 0 or 1");<br class="">- unsigned Opcode = (HintVal ? Intr.Opc1 : Intr.Opc0);<br class="">+ unsigned Opcode = (HintVal ? IntrData->Opc1 : IntrData->Opc0);<br class=""> SDValue Chain = Op.getOperand(0);<br class=""> SDValue Mask = Op.getOperand(2);<br class=""> SDValue Index = Op.getOperand(3);<br class="">@@ -15533,7 +15125,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br class=""> // Read Time Stamp Counter (RDTSC) and Processor ID (RDTSCP).<br class=""> case RDTSC: {<br class=""> SmallVector<SDValue, 2> Results;<br class="">- getReadTimeStampCounter(Op.getNode(), dl, Intr.Opc0, DAG, Subtarget, Results);<br class="">+ getReadTimeStampCounter(Op.getNode(), dl, IntrData->Opc0, DAG, Subtarget, Results);<br class=""> return DAG.getMergeValues(Results, dl);<br class=""> }<br class=""> // Read Performance Monitoring Counters.<br class="">@@ -15545,7 +15137,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br class=""> // XTEST intrinsics.<br class=""> case XTEST: {<br class=""> SDVTList VTs = DAG.getVTList(Op->getValueType(0), MVT::Other);<br class="">- SDValue InTrans = DAG.getNode(X86ISD::XTEST, dl, VTs, Op.getOperand(0));<br class="">+ SDValue InTrans = DAG.getNode(IntrData->Opc0, dl, VTs, Op.getOperand(0));<br class=""> SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,<br class=""> DAG.getConstant(X86::COND_NE, MVT::i8),<br class=""> InTrans);<br class="">@@ -15560,7 +15152,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br class=""> SDVTList VTs = DAG.getVTList(Op.getOperand(3)->getValueType(0), MVT::Other);<br class=""> SDValue GenCF = DAG.getNode(X86ISD::ADD, dl, CFVTs, Op.getOperand(2),<br class=""> DAG.getConstant(-1, MVT::i8));<br class="">- SDValue Res = DAG.getNode(Intr.Opc0, dl, VTs, Op.getOperand(3),<br class="">+ SDValue Res = DAG.getNode(IntrData->Opc0, dl, VTs, Op.getOperand(3),<br class=""> Op.getOperand(4), GenCF.getValue(1));<br class=""> SDValue Store = DAG.getStore(Op.getOperand(0), dl, Res.getValue(0),<br class=""> Op.getOperand(5), MachinePointerInfo(),<br class="">@@ -15573,7 +15165,6 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br class=""> return DAG.getMergeValues(Results, dl);<br class=""> }<br class=""> }<br class="">- llvm_unreachable("Unknown Intrinsic Type");<br class=""> }<br class=""><br class=""> SDValue X86TargetLowering::LowerRETURNADDR(SDValue Op,<br class=""><br class="">Added: llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h<br class="">URL:<span class="apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h?rev=216345&view=auto" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h?rev=216345&view=auto</span></a><br class="">==============================================================================<br class="">--- llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h (added)<br class="">+++ llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h Sun Aug 24 04:19:56 2014<br class="">@@ -0,0 +1,241 @@<br class="">+//===-- X86IntinsicsInfo.h - X86 Instrinsics ------------*- C++ -*-===//<br class="">+//<br class="">+// The LLVM Compiler Infrastructure<br class="">+//<br class="">+// This file is distributed under the University of Illinois Open Source<br class="">+// License. See LICENSE.TXT for details.<br class="">+//<br class="">+//===----------------------------------------------------------------------===//<br class="">+//<br class="">+// This file contains the details for lowering X86 intrinsics<br class="">+//<br class="">+//===----------------------------------------------------------------------===//<br class="">+<br class="">+#ifndef LLVM_LIB_TARGET_X86_X86INTRINSICSINFO_H<br class="">+#define LLVM_LIB_TARGET_X86_X86INTRINSICSINFO_H<br class="">+<br class="">+using namespace llvm;<br class="">+<br class="">+enum IntrinsicType {<br class="">+ GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, ADX,<br class="">+ INTR_TYPE_1OP, INTR_TYPE_2OP, INTR_TYPE_3OP, VSHIFT,<br class="">+ COMI<br class="">+};<br class="">+<br class="">+struct IntrinsicData {<br class="">+ IntrinsicData(IntrinsicType IType, unsigned IOpc0, unsigned IOpc1)<br class="">+ :Type(IType), Opc0(IOpc0), Opc1(IOpc1) {}<br class="">+ IntrinsicType Type;<br class="">+ unsigned Opc0;<br class="">+ unsigned Opc1;<br class="">+};<br class="">+<br class="">+#define INTRINSIC_WITH_CHAIN(id, type, op0, op1) \<br class="">+ IntrWithChainMap.insert(std::make_pair(Intrinsic::id, \<br class="">+ IntrinsicData(type, op0, op1)))<br class="">+<br class="">+std::map < unsigned, IntrinsicData> IntrWithChainMap;<br class="">+void InitIntrinsicsWithChain() {<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_gather_qps_512, GATHER, X86::VGATHERQPSZrm, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_gather_qpd_512, GATHER, X86::VGATHERQPDZrm, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_gather_dps_512, GATHER, X86::VGATHERDPSZrm, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_gather_dpd_512, GATHER, X86::VGATHERDPDZrm, 0);<br class="">+<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_gather_qpi_512, GATHER, X86::VPGATHERQDZrm, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_gather_qpq_512, GATHER, X86::VPGATHERQQZrm, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_gather_dpi_512, GATHER, X86::VPGATHERDDZrm, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_gather_dpq_512, GATHER, X86::VPGATHERDQZrm, 0);<br class="">+<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_scatter_qps_512, SCATTER, X86::VSCATTERQPSZmr, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_scatter_qpd_512, SCATTER, X86::VSCATTERQPDZmr, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_scatter_dps_512, SCATTER, X86::VSCATTERDPSZmr, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_scatter_dpd_512, SCATTER, X86::VSCATTERDPDZmr, 0);<br class="">+<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_scatter_qpi_512, SCATTER, X86::VPSCATTERQDZmr, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_scatter_qpq_512, SCATTER, X86::VPSCATTERQQZmr, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_scatter_dpi_512, SCATTER, X86::VPSCATTERDDZmr, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_scatter_dpq_512, SCATTER, X86::VPSCATTERDQZmr, 0);<br class="">+<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_gatherpf_qps_512, PREFETCH, X86::VGATHERPF0QPSm, X86::VGATHERPF1QPSm);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_gatherpf_qpd_512, PREFETCH, X86::VGATHERPF0QPDm, X86::VGATHERPF1QPDm);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_gatherpf_dps_512, PREFETCH, X86::VGATHERPF0DPSm, X86::VGATHERPF1DPSm);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_gatherpf_dpd_512, PREFETCH, X86::VGATHERPF0DPDm, X86::VGATHERPF1DPDm);<br class="">+<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_scatterpf_qps_512, PREFETCH, X86::VSCATTERPF0QPSm, X86::VSCATTERPF1QPSm);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_scatterpf_qpd_512, PREFETCH, X86::VSCATTERPF0QPDm, X86::VSCATTERPF1QPDm);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_scatterpf_dps_512, PREFETCH, X86::VSCATTERPF0DPSm, X86::VSCATTERPF1DPSm);<br class="">+ INTRINSIC_WITH_CHAIN(x86_avx512_scatterpf_dpd_512, PREFETCH, X86::VSCATTERPF0DPDm, X86::VSCATTERPF1DPDm);<br class="">+<br class="">+ INTRINSIC_WITH_CHAIN(x86_rdrand_16, RDRAND, X86ISD::RDRAND, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_rdrand_32, RDRAND, X86ISD::RDRAND, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_rdrand_64, RDRAND, X86ISD::RDRAND, 0);<br class="">+<br class="">+ INTRINSIC_WITH_CHAIN(x86_rdseed_16, RDSEED, X86ISD::RDSEED, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_rdseed_32, RDSEED, X86ISD::RDSEED, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_rdseed_64, RDSEED, X86ISD::RDSEED, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_xtest, XTEST, X86ISD::XTEST, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_rdtsc, RDTSC, X86ISD::RDTSC_DAG, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_rdtscp, RDTSC, X86ISD::RDTSCP_DAG, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_rdpmc, RDPMC, X86ISD::RDPMC_DAG, 0);<br class="">+<br class="">+ INTRINSIC_WITH_CHAIN(x86_addcarryx_u32, ADX, X86ISD::ADC, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_addcarryx_u64, ADX, X86ISD::ADC, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_addcarry_u32, ADX, X86ISD::ADC, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_addcarry_u64, ADX, X86ISD::ADC, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_subborrow_u32, ADX, X86ISD::SBB, 0);<br class="">+ INTRINSIC_WITH_CHAIN(x86_subborrow_u64, ADX, X86ISD::SBB, 0);<br class="">+<br class="">+}<br class="">+<br class="">+const IntrinsicData* GetIntrinsicWithChain(unsigned IntNo) {<br class="">+ std::map < unsigned, IntrinsicData>::const_iterator itr =<br class="">+ IntrWithChainMap.find(IntNo);<br class="">+ if (itr == IntrWithChainMap.end())<br class="">+ return NULL;<br class="">+ return &(itr->second);<br class="">+}<br class="">+<br class="">+#define INTRINSIC_WO_CHAIN(id, type, op0, op1) \<br class="">+ IntrWithoutChainMap.insert(std::make_pair(Intrinsic::id, \<br class="">+ IntrinsicData(type, op0, op1)))<br class="">+<br class="">+<br class="">+std::map < unsigned, IntrinsicData> IntrWithoutChainMap;<br class="">+<br class="">+void InitIntrinsicsWithoutChain() {<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_sqrt_ps, INTR_TYPE_1OP, ISD::FSQRT, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_sqrt_pd, INTR_TYPE_1OP, ISD::FSQRT, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx_sqrt_ps_256, INTR_TYPE_1OP, ISD::FSQRT, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx_sqrt_pd_256, INTR_TYPE_1OP, ISD::FSQRT, 0);<br class="">+<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psubus_b, INTR_TYPE_2OP, X86ISD::SUBUS, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psubus_w, INTR_TYPE_2OP, X86ISD::SUBUS, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psubus_b, INTR_TYPE_2OP, X86ISD::SUBUS, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psubus_w, INTR_TYPE_2OP, X86ISD::SUBUS, 0);<br class="">+<br class="">+ INTRINSIC_WO_CHAIN(x86_sse3_hadd_ps, INTR_TYPE_2OP, X86ISD::FHADD, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse3_hadd_pd, INTR_TYPE_2OP, X86ISD::FHADD, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx_hadd_ps_256, INTR_TYPE_2OP, X86ISD::FHADD, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx_hadd_pd_256, INTR_TYPE_2OP, X86ISD::FHADD, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse3_hsub_ps, INTR_TYPE_2OP, X86ISD::FHSUB, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse3_hsub_pd, INTR_TYPE_2OP, X86ISD::FHSUB, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx_hsub_ps_256, INTR_TYPE_2OP, X86ISD::FHSUB, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx_hsub_pd_256, INTR_TYPE_2OP, X86ISD::FHSUB, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_ssse3_phadd_w_128, INTR_TYPE_2OP, X86ISD::HADD, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_ssse3_phadd_d_128, INTR_TYPE_2OP, X86ISD::HADD, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_phadd_w, INTR_TYPE_2OP, X86ISD::HADD, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_phadd_d, INTR_TYPE_2OP, X86ISD::HADD, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_ssse3_phsub_w_128, INTR_TYPE_2OP, X86ISD::HSUB, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_ssse3_phsub_d_128, INTR_TYPE_2OP, X86ISD::HSUB, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_phsub_w, INTR_TYPE_2OP, X86ISD::HSUB, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_phsub_d, INTR_TYPE_2OP, X86ISD::HSUB, 0);<br class="">+<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_pmaxu_b, INTR_TYPE_2OP, X86ISD::UMAX, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse41_pmaxuw, INTR_TYPE_2OP, X86ISD::UMAX, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse41_pmaxud, INTR_TYPE_2OP, X86ISD::UMAX, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pmaxu_b, INTR_TYPE_2OP, X86ISD::UMAX, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pmaxu_w, INTR_TYPE_2OP, X86ISD::UMAX, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pmaxu_d, INTR_TYPE_2OP, X86ISD::UMAX, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_pminu_b, INTR_TYPE_2OP, X86ISD::UMIN, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse41_pminuw, INTR_TYPE_2OP, X86ISD::UMIN, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse41_pminud, INTR_TYPE_2OP, X86ISD::UMIN, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pminu_b, INTR_TYPE_2OP, X86ISD::UMIN, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pminu_w, INTR_TYPE_2OP, X86ISD::UMIN, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pminu_d, INTR_TYPE_2OP, X86ISD::UMIN, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse41_pmaxsb, INTR_TYPE_2OP, X86ISD::SMAX, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_pmaxs_w, INTR_TYPE_2OP, X86ISD::SMAX, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse41_pmaxsd, INTR_TYPE_2OP, X86ISD::SMAX, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pmaxs_b, INTR_TYPE_2OP, X86ISD::SMAX, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pmaxs_w, INTR_TYPE_2OP, X86ISD::SMAX, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pmaxs_d, INTR_TYPE_2OP, X86ISD::SMAX, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse41_pminsb, INTR_TYPE_2OP, X86ISD::SMIN, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_pmins_w, INTR_TYPE_2OP, X86ISD::SMIN, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse41_pminsd, INTR_TYPE_2OP, X86ISD::SMIN, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pmins_b, INTR_TYPE_2OP, X86ISD::SMIN, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pmins_w, INTR_TYPE_2OP, X86ISD::SMIN, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pmins_d, INTR_TYPE_2OP, X86ISD::SMIN, 0);<br class="">+<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psll_w, INTR_TYPE_2OP, X86ISD::VSHL, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psll_d, INTR_TYPE_2OP, X86ISD::VSHL, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psll_q, INTR_TYPE_2OP, X86ISD::VSHL, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psll_w, INTR_TYPE_2OP, X86ISD::VSHL, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psll_d, INTR_TYPE_2OP, X86ISD::VSHL, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psll_q, INTR_TYPE_2OP, X86ISD::VSHL, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psrl_w, INTR_TYPE_2OP, X86ISD::VSRL, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psrl_q, INTR_TYPE_2OP, X86ISD::VSRL, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psrl_w, INTR_TYPE_2OP, X86ISD::VSRL, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psrl_q, INTR_TYPE_2OP, X86ISD::VSRL, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psra_w, INTR_TYPE_2OP, X86ISD::VSRA, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psra_d, INTR_TYPE_2OP, X86ISD::VSRA, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psra_w, INTR_TYPE_2OP, X86ISD::VSRA, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psra_d, INTR_TYPE_2OP, X86ISD::VSRA, 0);<br class="">+<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_pslli_w, VSHIFT, X86ISD::VSHLI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_pslli_d, VSHIFT, X86ISD::VSHLI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_pslli_q, VSHIFT, X86ISD::VSHLI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pslli_w, VSHIFT, X86ISD::VSHLI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pslli_d, VSHIFT, X86ISD::VSHLI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_pslli_q, VSHIFT, X86ISD::VSHLI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psrli_w, VSHIFT, X86ISD::VSRLI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psrli_d, VSHIFT, X86ISD::VSRLI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psrli_q, VSHIFT, X86ISD::VSRLI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psrli_w, VSHIFT, X86ISD::VSRLI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psrli_d, VSHIFT, X86ISD::VSRLI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psrli_q, VSHIFT, X86ISD::VSRLI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psrai_w, VSHIFT, X86ISD::VSRAI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_psrai_d, VSHIFT, X86ISD::VSRAI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psrai_w, VSHIFT, X86ISD::VSRAI, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_psrai_d, VSHIFT, X86ISD::VSRAI, 0);<br class="">+<br class="">+ INTRINSIC_WO_CHAIN(x86_avx_vperm2f128_ps_256, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx_vperm2f128_pd_256, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx_vperm2f128_si_256, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0);<br class="">+ INTRINSIC_WO_CHAIN(x86_avx2_vperm2i128, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0);<br class="">+<br class="">+ INTRINSIC_WO_CHAIN(x86_sse41_insertps, INTR_TYPE_3OP, X86ISD::INSERTPS, 0);<br class="">+<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_comieq_ss, COMI, X86ISD::COMI, ISD::SETEQ);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_comieq_sd, COMI, X86ISD::COMI, ISD::SETEQ);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_comilt_ss, COMI, X86ISD::COMI, ISD::SETLT);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_comilt_sd, COMI, X86ISD::COMI, ISD::SETLT);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_comile_ss, COMI, X86ISD::COMI, ISD::SETLE);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_comile_sd, COMI, X86ISD::COMI, ISD::SETLE);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_comigt_ss, COMI, X86ISD::COMI, ISD::SETGT);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_comigt_sd, COMI, X86ISD::COMI, ISD::SETGT);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_comige_ss, COMI, X86ISD::COMI, ISD::SETGE);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_comige_sd, COMI, X86ISD::COMI, ISD::SETGE);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_comineq_ss, COMI, X86ISD::COMI, ISD::SETNE);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_comineq_sd,COMI, X86ISD::COMI, ISD::SETNE);<br class="">+<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_ucomieq_ss, COMI, X86ISD::UCOMI, ISD::SETEQ);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_ucomieq_sd, COMI, X86ISD::UCOMI, ISD::SETEQ);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_ucomilt_ss, COMI, X86ISD::UCOMI, ISD::SETLT);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_ucomilt_sd, COMI, X86ISD::UCOMI, ISD::SETLT);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_ucomile_ss, COMI, X86ISD::UCOMI, ISD::SETLE);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_ucomile_sd, COMI, X86ISD::UCOMI, ISD::SETLE);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_ucomigt_ss, COMI, X86ISD::UCOMI, ISD::SETGT);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_ucomigt_sd, COMI, X86ISD::UCOMI, ISD::SETGT);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_ucomige_ss, COMI, X86ISD::UCOMI, ISD::SETGE);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_ucomige_sd, COMI, X86ISD::UCOMI, ISD::SETGE);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse_ucomineq_ss, COMI, X86ISD::UCOMI, ISD::SETNE);<br class="">+ INTRINSIC_WO_CHAIN(x86_sse2_ucomineq_sd,COMI, X86ISD::UCOMI, ISD::SETNE);<br class="">+}<br class="">+<br class="">+const IntrinsicData* GetIntrinsicWithoutChain(unsigned IntNo) {<br class="">+ std::map < unsigned, IntrinsicData>::const_iterator itr =<br class="">+ IntrWithoutChainMap.find(IntNo);<br class="">+ if (itr == IntrWithoutChainMap.end())<br class="">+ return NULL;<br class="">+ return &(itr->second);<br class="">+}<br class="">+<br class="">+// Initialize intrinsics data<br class="">+void InitIntrinsicTables() {<br class="">+ InitIntrinsicsWithChain();<br class="">+ InitIntrinsicsWithoutChain();<br class="">+}<br class="">+<br class="">+<br class="">+#endif<br class=""><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">llvm-commits@cs.uiuc.edu</span></a><br class=""><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</span></a><o:p class=""></o:p></div></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div></div></div><p style="margin-right: 0cm; margin-left: 0cm; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">---------------------------------------------------------------------<br class="">Intel Israel (74) Limited<o:p class=""></o:p></p><p style="margin-right: 0cm; margin-left: 0cm; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">This e-mail and any attachments may contain confidential material for<br class="">the sole use of the intended recipient(s). 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If you are not the intended<br class="">recipient, please contact the sender and delete all copies.<o:p class=""></o:p></p></blockquote></div></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div><p class="MsoNormal" style="margin: 0cm 0cm 12pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">llvm-commits@cs.uiuc.edu</span></a><br class=""><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</span></a><o:p class=""></o:p></p></blockquote></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></blockquote></div><div class=""><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""> <o:p class=""></o:p></div></div></div></div><p style="margin-right: 0cm; margin-left: 0cm; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">---------------------------------------------------------------------<br class="">Intel Israel (74) Limited<o:p class=""></o:p></p><p style="margin-right: 0cm; margin-left: 0cm; font-size: 12pt; font-family: 'Times New Roman', serif;" class="">This e-mail and any attachments may contain confidential material for<br class="">the sole use of the intended recipient(s). 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If you are not the intended<br class="">recipient, please contact the sender and delete all copies.<o:p class=""></o:p></p><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><span style="font-size: 9pt; font-family: Helvetica, sans-serif;" class=""><intrinsics_map_2.diff>_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@cs.uiuc.edu" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">llvm-commits@cs.uiuc.edu</span></a><br class=""><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" style="color: purple; text-decoration: underline;" class=""><span style="color: purple;" class="">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</span></a><o:p class=""></o:p></span></div></div></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;" class=""><o:p class=""> </o:p></div></div></div><p style="margin-right: 0cm; margin-left: 0cm; font-size: 12pt; font-family: 'Times New Roman', serif; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class="">---------------------------------------------------------------------<br class="">Intel Israel (74) Limited</p><p style="margin-right: 0cm; margin-left: 0cm; font-size: 12pt; font-family: 'Times New Roman', serif; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class="">This e-mail and any attachments may contain confidential material for<br class="">the sole use of the intended recipient(s). Any review or distribution<br class="">by others is strictly prohibited. If you are not the intended<br class="">recipient, please contact the sender and delete all copies.</p><span id="cid:913BF359-AFDA-495F-A713-C15EE27F443E@apple.com"><intrinsics_map_3.diff></span></div></blockquote></div><br class=""></div></body></html>