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<p><font size="2" face="sans-serif">Hi,</font><br>
<br>
<font size="2" face="sans-serif">Here is a patch to improve FMA folding in DAGCombiner.cpp.</font><br>
<br>
<font size="2" face="sans-serif">Previously, when looking at a FMUL and a FADD, it would combine them into FMA if the FMUL is only used by the FADD. This was to ensure that the FMUL will be removed, meaning that the number of instructions will actually be reduced. However, if the FMUL has many uses but can be combined with each one of them (i.e. they are either FADD or FSUB), it should still be combined. Attached is a patch which checks all uses of the FMUL.</font><br>
<br>
<font size="2" face="sans-serif">Olivier</font><br>
<br>
<br>
<i>(See attached file: fma.diff)</i><i>(See attached file: test-fma.c)</i><br>
<br>
<font size="1" color="#800080" face="sans-serif">----- Forwarded by Olivier H Sallenave/Watson/IBM</font><font size="1" color="#800080" face="sans-serif"> on 09/03/2014 12:08 PM</font><font size="1" color="#800080" face="sans-serif"> -----</font><br>
<br>
<font size="1" color="#5F5F5F" face="sans-serif">From: </font><font size="1" face="sans-serif">Hal Finkel <hfinkel@anl.gov></font><br>
<font size="1" color="#5F5F5F" face="sans-serif">To: </font><font size="1" face="sans-serif">Kevin K O'Brien/Watson/IBM@IBMUS</font><br>
<font size="1" color="#5F5F5F" face="sans-serif">Cc: </font><font size="1" face="sans-serif">Samuel F Antao/Watson/IBM@IBMUS, <llvmdev@cs.uiuc.edu>, Olivier H Sallenave/Watson/IBM@IBMUS</font><br>
<font size="1" color="#5F5F5F" face="sans-serif">Date: </font><font size="1" face="sans-serif">08/26/2014 11:33 AM</font><br>
<font size="1" color="#5F5F5F" face="sans-serif">Subject: </font><font size="1" face="sans-serif">Re: [LLVMdev] Multiply-add combining</font><br>
<hr width="100%" size="2" align="left" noshade style="color:#8091A5; "><br>
<br>
<br>
<tt><font size="2">Kevin, Olivier,<br>
<br>
The target independent heuristic could certainly check all uses, patches welcome. We could also consider each case separately, as Kevin suggests, but that might not be optimal on targets with only one floating-point pipeline, so we'd need to make it opt-in. You should also look at the MachineCombiner Pass (added in r214832, currently only used by the ARM backend I think) the tries to solve this problem in a more-sophisticated way.<br>
<br>
-Hal<br>
<br>
----- Original Message -----<br>
> From: "Kevin K O'Brien" <caomhin@us.ibm.com><br>
> To: "Olivier H Sallenave" <ohsallen@us.ibm.com><br>
> Cc: "Samuel F Antao" <sfantao@us.ibm.com>, llvmdev@cs.uiuc.edu<br>
> Sent: Tuesday, August 26, 2014 10:16:23 AM<br>
> Subject: Re: [LLVMdev] Multiply-add combining<br>
> <br>
> <br>
> <br>
> <br>
> Hi Olivier,<br>
> I think we discussed this last Thursday? My feeling is that each use<br>
> of the multiply can be considered separately. If it can be combined,<br>
> then we should do so. The multiply should be left in place and<br>
> removed by a dead code elimination pass sometime later. This is what<br>
> TOBEY does. If you want me to explain the XL method in more detail,<br>
> come talk to me.<br>
> <br>
> Kevin<br>
> ----------------------------------------------<br>
> Kevin O'Brien<br>
> Manager, Advanced Compiler Technology<br>
> IBM T.J Watson Research Center, Yorktown Heights, NY<br>
> <br>
> Inactive hide details for Olivier H Sallenave---08/26/2014 11:12:04<br>
> AM---Hi, I tried to compile the following using -ffp-contraOlivier H<br>
> Sallenave---08/26/2014 11:12:04 AM---Hi, I tried to compile the<br>
> following using -ffp-contract=fast:<br>
> <br>
> <br>
> <br>
> <br>
> From:<br>
> Olivier H Sallenave/Watson/IBM<br>
> <br>
> <br>
> <br>
> To:<br>
> llvmdev@cs.uiuc.edu,<br>
> <br>
> <br>
> <br>
> Cc:<br>
> Samuel F Antao/Watson/IBM@IBMUS, Kevin K O'Brien/Watson/IBM@IBMUS<br>
> <br>
> <br>
> <br>
> Date:<br>
> 08/26/2014 11:12 AM<br>
> <br>
> <br>
> <br>
> Subject:<br>
> Multiply-add combining<br>
> <br>
> <br>
> Hi,<br>
> <br>
> I tried to compile the following using -ffp-contract=fast:<br>
> <br>
> %mul = fmul double %sub5, %x<br>
> %add = fadd double %add6, %mul<br>
> %sub = fsub double %sub5, %mul<br>
> <br>
> I expected fadd and fsub to be contracted with fmul, which didn't<br>
> happen.<br>
> <br>
> When looking in DAGCombiner.cpp, it appears the result of the fmul<br>
> needs to be used only once, which isn't the case here as it is used<br>
> by both the fadd and the fsub:<br>
> <br>
> // fold (fadd (fmul x, y), z) -> (fma x, y, z)<br>
> if (N0.getOpcode() == ISD::FMUL && N0.hasOneUse())<br>
> return DAG.getNode(ISD::FMA, SDLoc(N), VT, N0.getOperand(0),<br>
> N0.getOperand(1), N1);<br>
> <br>
> This heuristic looks a little conservative, could we instead check<br>
> that every instruction using the result of the fmul are combinable<br>
> (i.e., they are either fadd or fsub)?<br>
> <br>
> <br>
> Thanks in advance,<br>
> Olivier<br>
> <br>
> <br>
> _______________________________________________<br>
> LLVM Developers mailing list<br>
> LLVMdev@cs.uiuc.edu </font></tt><tt><font size="2"><a href="http://llvm.cs.uiuc.edu">http://llvm.cs.uiuc.edu</a></font></tt><tt><font size="2"><br>
> </font></tt><tt><font size="2"><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a></font></tt><tt><font size="2"><br>
> <br>
<br>
-- <br>
Hal Finkel<br>
Assistant Computational Scientist<br>
Leadership Computing Facility<br>
Argonne National Laboratory<br>
<br>
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