<html><head><meta http-equiv="Content-Type" content="text/html charset=windows-1252"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;"><br><div><div>On Sep 1, 2014, at 11:42 PM, Hal Finkel <<a href="mailto:hfinkel@anl.gov">hfinkel@anl.gov</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div style="font-size: 14px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;">----- Original Message -----<br><blockquote type="cite">From: "Adam Nemet" <<a href="mailto:anemet@apple.com">anemet@apple.com</a>><br>To: "Hal Finkel" <<a href="mailto:hfinkel@anl.gov">hfinkel@anl.gov</a>><br>Cc: <a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br>Sent: Friday, June 13, 2014 12:24:53 AM<br>Subject: Re: [llvm] r208640 - [DAGCombiner] Split up an indexed load if only the<span class="Apple-tab-span" style="white-space: pre;"> </span>base pointer value is live<br><br><br>On Jun 12, 2014, at 5:25 PM, Hal Finkel <<a href="mailto:hfinkel@anl.gov">hfinkel@anl.gov</a>> wrote:<br><br><blockquote type="cite">----- Original Message -----<br><blockquote type="cite">From: "Adam Nemet" <<a href="mailto:anemet@apple.com">anemet@apple.com</a>><br>To: "Hal Finkel" <<a href="mailto:hfinkel@anl.gov">hfinkel@anl.gov</a>><br>Cc: <a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br>Sent: Thursday, June 12, 2014 6:11:19 PM<br>Subject: Re: [llvm] r208640 - [DAGCombiner] Split up an indexed<br>load if only the<span class="Apple-tab-span" style="white-space: pre;"> </span>base pointer value is live<br><br>Hal,<br><br>Did you guys make any progress on this?<br></blockquote><br>Not yet, but it is next on my list (I'm working on PR19991 right<br>now).<br></blockquote><br>Great, thanks!<br></blockquote><br>I'm really sorry that it took me so long to actually get to this. Reapplied with modifications in r216898.<br></div></blockquote><div><br></div><div>No problem, thanks very much for the fix!</div><div><br></div><div>Adam</div><br><blockquote type="cite"><div style="font-size: 14px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;">Thanks again,<br>Hal<br><br><blockquote type="cite"><br><blockquote type="cite"><blockquote type="cite">I’d like to see this<br>committed back possibly with some fixes.<br></blockquote><br>Me too :-)<br><br><blockquote type="cite"><br>Let me know if I can help. Is there a PR tracking the issue?<br></blockquote><br>Will do; I'm not sure if anyone filed a PR or not.<br></blockquote><br>It's PR20024 now.<br><br>Adam<br><br><blockquote type="cite"><br>-Hal<br><br><blockquote type="cite"><br>Thanks,<br>Adam<br><br>On May 28, 2014, at 9:57 AM, Adam Nemet <<a href="mailto:anemet@apple.com">anemet@apple.com</a>> wrote:<br><br><blockquote type="cite">Hi Hal,<br><br>Sure, sorry about that. Let me know if I can help in any way.<br><br>You may want to try disable the transformation in the presence of<br>TargetConstants. This is what cause the issue in PR19796.<br>Something like:<br><br>diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>index 2d2fd53..ed3c581 100644<br>--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>@@ -7899,7 +7899,8 @@ SDValue DAGCombiner::visitLOAD(SDNode *N) {<br> if (!N->hasAnyUseOfValue(0)) {<br> SDValue Undef = DAG.getUNDEF(N->getValueType(0));<br> SDValue Index;<br>- if (N->hasAnyUseOfValue(1)) {<br>+ if (N->hasAnyUseOfValue(1) &&<br>+ N->getOperand(1)->getOpcode() !=<br>ISD::TargetConstant)<br>{<br> Index = SplitIndexingFromLoad(LD);<br> // Try to fold the base pointer arithmetic into<br> subsequent loads and<br> // stores.<br><br>Adam<br><br>On May 28, 2014, at 8:45 AM, Hal Finkel <<a href="mailto:hfinkel@anl.gov">hfinkel@anl.gov</a>> wrote:<br><br><blockquote type="cite">Adam,<br><br>Unfortunately, this caused a massive self-hosting failure on<br>ppc64/Linux. I've reverted it (in r209747) while we investigate.<br>Given that, with this change, nearly all regression tests<br>segfault, I hope it will be relatively easy to diagnose.<br><br>-Hal<br><br>----- Original Message -----<br><blockquote type="cite">From: "Adam Nemet" <<a href="mailto:anemet@apple.com">anemet@apple.com</a>><br>To: <a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br>Sent: Monday, May 12, 2014 6:00:03 PM<br>Subject: [llvm] r208640 - [DAGCombiner] Split up an indexed<br>load<br>if only the<span class="Apple-tab-span" style="white-space: pre;"> </span>base pointer value is live<br><br>Author: anemet<br>Date: Mon May 12 18:00:03 2014<br>New Revision: 208640<br><br>URL: <a href="http://llvm.org/viewvc/llvm-project?rev=208640&view=rev">http://llvm.org/viewvc/llvm-project?rev=208640&view=rev</a><br>Log:<br>[DAGCombiner] Split up an indexed load if only the base pointer<br>value<br>is live<br><br>Right now the load may not get DCE'd because of the side-effect<br>of<br>updating<br>the base pointer.<br><br>This can happen if we lower a read-modify-write of an illegal<br>larger<br>type<br>(e.g. i48) such that the modification only affects one of the<br>subparts (the<br>lower i32 part but not the higher i16 part). See the testcase.<br><br>In order to spot the dead load we need to revisit it when<br>SimplifyDemandedBits<br>decided that the value of the load is masked off. This is the<br>CommitTargetLoweringOpt piece.<br><br>I checked compile time with ARM64 by sending SPEC bitcode files<br>through llc.<br>No measurable change.<br><br>Fixes <<a href="rdar://problem/16031651">rdar://problem/16031651</a>><br><br>Added:<br>llvm/trunk/test/CodeGen/ARM64/dagcombiner-dead-indexed-load.ll<br>Modified:<br>llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br><br>Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>URL:<br><a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=208640&r1=208639&r2=208640&view=diff">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=208640&r1=208639&r2=208640&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp<br>(original)<br>+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Mon May<br>12<br>18:00:03 2014<br>@@ -167,6 +167,7 @@ namespace {<br><br> bool CombineToPreIndexedLoadStore(SDNode *N);<br> bool CombineToPostIndexedLoadStore(SDNode *N);<br>+ SDValue SplitIndexingFromLoad(LoadSDNode *LD);<br> bool SliceUpLoad(SDNode *N);<br><br> void ReplaceLoadWithPromotedLoad(SDNode *Load, SDNode<br> *ExtLoad);<br>@@ -761,10 +762,14 @@ CommitTargetLoweringOpt(const TargetLowe<br><br> // If the operands of this node are only used by the node,<br> they<br> will now<br> // be dead. Make sure to visit them first to delete dead<br> nodes<br> early.<br>- for (unsigned i = 0, e =<br>TLO.Old.getNode()->getNumOperands(); i<br>!= e; ++i)<br>- if<br>(TLO.Old.getNode()->getOperand(i).getNode()->hasOneUse())<br>-<br> AddToWorkList(TLO.Old.getNode()->getOperand(i).getNode());<br>-<br>+ for (unsigned i = 0, e =<br>TLO.Old.getNode()->getNumOperands(); i<br>!= e; ++i) {<br>+ SDNode *Op = TLO.Old.getNode()->getOperand(i).getNode();<br>+ // For an operand generating multiple values, one of the<br>values may<br>+ // become dead allowing further simplification (e.g.<br>split<br>index<br>+ // arithmetic from an indexed load).<br>+ if (Op->hasOneUse() || Op->getNumValues() > 1)<br>+ AddToWorkList(Op);<br>+ }<br> DAG.DeleteNode(TLO.Old.getNode());<br>}<br>}<br>@@ -7844,6 +7849,17 @@ bool DAGCombiner::CombineToPostIndexedLo<br>return false;<br>}<br><br>+/// \brief Return the base-pointer arithmetic from an indexed<br>\p<br>LD.<br>+SDValue DAGCombiner::SplitIndexingFromLoad(LoadSDNode *LD) {<br>+ ISD::MemIndexedMode AM = LD->getAddressingMode();<br>+ assert(AM != ISD::UNINDEXED);<br>+ SDValue BP = LD->getOperand(1);<br>+ SDValue Inc = LD->getOperand(2);<br>+ unsigned Opc =<br>+ (AM == ISD::PRE_INC || AM == ISD::POST_INC ? ISD::ADD :<br>ISD::SUB);<br>+ return DAG.getNode(Opc, SDLoc(LD), BP.getSimpleValueType(),<br>BP,<br>Inc);<br>+}<br>+<br>SDValue DAGCombiner::visitLOAD(SDNode *N) {<br>LoadSDNode *LD = cast<LoadSDNode>(N);<br>SDValue Chain = LD->getChain();<br>@@ -7880,8 +7896,16 @@ SDValue DAGCombiner::visitLOAD(SDNode *N<br> } else {<br> // Indexed loads.<br> assert(N->getValueType(2) == MVT::Other && "Malformed<br> indexed<br> loads?");<br>- if (!N->hasAnyUseOfValue(0) && !N->hasAnyUseOfValue(1))<br>{<br>+ if (!N->hasAnyUseOfValue(0)) {<br> SDValue Undef = DAG.getUNDEF(N->getValueType(0));<br>+ SDValue Index;<br>+ if (N->hasAnyUseOfValue(1)) {<br>+ Index = SplitIndexingFromLoad(LD);<br>+ // Try to fold the base pointer arithmetic into<br>subsequent<br>loads and<br>+ // stores.<br>+ AddUsersToWorkList(N);<br>+ } else<br>+ Index = DAG.getUNDEF(N->getValueType(1));<br> DEBUG(dbgs() << "\nReplacing.7 ";<br> N->dump(&DAG);<br> dbgs() << "\nWith: ";<br>@@ -7889,8 +7913,7 @@ SDValue DAGCombiner::visitLOAD(SDNode *N<br> dbgs() << " and 2 other values\n");<br> WorkListRemover DeadNodes(*this);<br> DAG.ReplaceAllUsesOfValueWith(SDValue(N, 0), Undef);<br>- DAG.ReplaceAllUsesOfValueWith(SDValue(N, 1),<br>-<br> DAG.getUNDEF(N->getValueType(1)));<br>+ DAG.ReplaceAllUsesOfValueWith(SDValue(N, 1), Index);<br> DAG.ReplaceAllUsesOfValueWith(SDValue(N, 2), Chain);<br> removeFromWorkList(N);<br> DAG.DeleteNode(N);<br><br>Added:<br>llvm/trunk/test/CodeGen/ARM64/dagcombiner-dead-indexed-load.ll<br>URL:<br>http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM64/dagcombiner-dead-indexed-load.ll?rev=208640&view=auto<br>==============================================================================<br>---<br>llvm/trunk/test/CodeGen/ARM64/dagcombiner-dead-indexed-load.ll<br>(added)<br>+++<br>llvm/trunk/test/CodeGen/ARM64/dagcombiner-dead-indexed-load.ll<br>Mon May 12 18:00:03 2014<br>@@ -0,0 +1,29 @@<br>+; RUN: llc -mcpu=cyclone < %s | FileCheck %s<br>+<br>+target datalayout = "e-i64:64-n32:64-S128"<br>+target triple = "arm64-apple-ios"<br>+<br>+%"struct.SU" = type { i32, %"struct.SU"*, i32*, i32, i32,<br>%"struct.BO", i32, [5 x i8] }<br>+%"struct.BO" = type { %"struct.RE" }<br>+<br>+%"struct.RE" = type { i32, i32, i32, i32 }<br>+<br>+; This is a read-modify-write of some bifields combined into<br>an<br>i48.<br>It gets<br>+; legalized into i32 and i16 accesses. Only a single store of<br>zero<br>to the low<br>+; i32 part should be live.<br>+<br>+; CHECK-LABEL: test:<br>+; CHECK-NOT: ldr<br>+; CHECK: str wzr<br>+; CHECK-NOT: str<br>+define void @test(%"struct.SU"* nocapture %su) {<br>+entry:<br>+ %r1 = getelementptr inbounds %"struct.SU"* %su, i64 1, i32 5<br>+ %r2 = bitcast %"struct.BO"* %r1 to i48*<br>+ %r3 = load i48* %r2, align 8<br>+ %r4 = and i48 %r3, -4294967296<br>+ %r5 = or i48 0, %r4<br>+ store i48 %r5, i48* %r2, align 8<br>+<br>+ ret void<br>+}<br><br><br>_______________________________________________<br>llvm-commits mailing list<br>llvm-commits@cs.uiuc.edu<br>http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits<br><br></blockquote><br>--<br>Hal Finkel<br>Assistant Computational Scientist<br>Leadership Computing Facility<br>Argonne National Laboratory<br></blockquote><br></blockquote><br><br></blockquote><br>--<br>Hal Finkel<br>Assistant Computational Scientist<br>Leadership Computing Facility<br>Argonne National Laboratory<br></blockquote><br><br></blockquote><br>--<span class="Apple-converted-space"> </span><br>Hal Finkel<br>Assistant Computational Scientist<br>Leadership Computing Facility<br>Argonne National Laboratory</div></blockquote></div><br></body></html>