<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;">Hi Elena,<div><br></div><div>this change broke concurrent compilation for us. I looks like the globals (in a header file???) IntrWithChainMap and IntrWithoutChainMap are not guarded against multiple and concurrent initialization.</div><div><br></div><div>Could you please take a look?</div><div><br></div><div>Thanks</div><div><br></div><div>Cheers,</div><div>Juergen</div><div><br></div><div><br><div><div>On Aug 27, 2014, at 12:54 AM, Demikhovsky, Elena <<a href="mailto:elena.demikhovsky@intel.com">elena.demikhovsky@intel.com</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div lang="EN-US" link="blue" vlink="purple" style="font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;"><div class="WordSection1" style="page: WordSection1;"><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);">I put the intrinsics map as a static object inside static function that will be initialized on first call as Sean suggested.<o:p></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);"> </span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);">Please review.<o:p></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);"> </span></div><div style="margin: 0cm 0cm 0.0001pt 36pt; font-size: 12pt; font-family: 'Times New Roman', serif; text-indent: -18pt;"><span style="font-family: Calibri, sans-serif; color: rgb(49, 132, 155);"><span>-<span style="font-style: normal; font-variant: normal; font-weight: normal; font-size: 7pt; line-height: normal; font-family: 'Times New Roman';">         <span class="Apple-converted-space"> </span></span></span></span><span dir="LTR"></span><b><i><span style="color: rgb(49, 132, 155);"> Elena<o:p></o:p></span></i></b></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);"> </span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><b><span style="font-size: 10pt; font-family: Tahoma, sans-serif;">From:</span></b><span style="font-size: 10pt; font-family: Tahoma, sans-serif;"><span class="Apple-converted-space"> </span>Sean Silva [<a href="mailto:chisophugis@gmail.com" style="color: purple; text-decoration: underline;">mailto:chisophugis@gmail.com</a>]<span class="Apple-converted-space"> </span><br><b>Sent:</b><span class="Apple-converted-space"> </span>Wednesday, August 27, 2014 03:18<br><b>To:</b><span class="Apple-converted-space"> </span>David Blaikie<br><b>Cc:</b><span class="Apple-converted-space"> </span>Demikhovsky, Elena;<span class="Apple-converted-space"> </span><a href="mailto:llvm-commits@cs.uiuc.edu" style="color: purple; text-decoration: underline;">llvm-commits@cs.uiuc.edu</a><br><b>Subject:</b><span class="Apple-converted-space"> </span>Re: [llvm] r216345 - X86 intrinsics table - simplifies intrinsics lowering.<o:p></o:p></span></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></div><div><p class="MsoNormal" style="margin: 0cm 0cm 12pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></p><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;">On Tue, Aug 26, 2014 at 2:22 PM, David Blaikie <<a href="mailto:dblaikie@gmail.com" target="_blank" style="color: purple; text-decoration: underline;">dblaikie@gmail.com</a>> wrote:<o:p></o:p></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></div><div><p class="MsoNormal" style="margin: 0cm 0cm 12pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></p><div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;">On Tue, Aug 26, 2014 at 2:10 PM, Sean Silva <<a href="mailto:chisophugis@gmail.com" target="_blank" style="color: purple; text-decoration: underline;">chisophugis@gmail.com</a>> wrote:<o:p></o:p></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></div><div><p class="MsoNormal" style="margin: 0cm 0cm 12pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></p><div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;">On Tue, Aug 26, 2014 at 4:15 AM, Demikhovsky, Elena <<a href="mailto:elena.demikhovsky@intel.com" target="_blank" style="color: purple; text-decoration: underline;">elena.demikhovsky@intel.com</a>> wrote:<o:p></o:p></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);">- I initialize the map in static time, when X86Target object is created.</span><o:p></o:p></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);"> </span><o:p></o:p></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);">- Static map initialization is supported in C++11, like</span><o:p></o:p></div><pre style="margin: 0cm 0cm 0.0001pt; font-size: 10pt; font-family: 'Courier New'; line-height: 13.35pt; background-color: rgb(238, 238, 238); vertical-align: baseline; background-position: initial initial; background-repeat: initial initial;"><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);">   </span><span style="font-size: 10.5pt; font-family: Consolas; color: rgb(43, 145, 175); border: 1pt none windowtext; padding: 0cm;">map</span><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;"><</span><span style="font-size: 10.5pt; font-family: Consolas; color: rgb(43, 145, 175); border: 1pt none windowtext; padding: 0cm;">int</span><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;">, </span><span style="font-size: 10.5pt; font-family: Consolas; color: rgb(0, 0, 139); border: 1pt none windowtext; padding: 0cm;">char</span><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;">> m = {{</span><span style="font-size: 10.5pt; font-family: Consolas; color: maroon; border: 1pt none windowtext; padding: 0cm;">1</span><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;">, </span><span style="font-size: 10.5pt; font-family: Consolas; color: maroon; border: 1pt none windowtext; padding: 0cm;">'a'</span><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;">}, {</span><span style="font-size: 10.5pt; font-family: Consolas; color: maroon; border: 1pt none windowtext; padding: 0cm;">3</span><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;">, </span><span style="font-size: 10.5pt; font-family: Consolas; color: maroon; border: 1pt none windowtext; padding: 0cm;">'b'</span><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;">}, {</span><span style="font-size: 10.5pt; font-family: Consolas; color: maroon; border: 1pt none windowtext; padding: 0cm;">5</span><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;">, </span><span style="font-size: 10.5pt; font-family: Consolas; color: maroon; border: 1pt none windowtext; padding: 0cm;">'c'</span><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;">}, {</span><span style="font-size: 10.5pt; font-family: Consolas; color: maroon; border: 1pt none windowtext; padding: 0cm;">7</span><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;">, </span><span style="font-size: 10.5pt; font-family: Consolas; color: maroon; border: 1pt none windowtext; padding: 0cm;">'d'</span><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;">}};</span><o:p></o:p></pre><pre style="margin: 0cm 0cm 0.0001pt; font-size: 10pt; font-family: 'Courier New'; line-height: 13.35pt; background-color: rgb(238, 238, 238); vertical-align: baseline; background-position: initial initial; background-repeat: initial initial;"><span style="font-size: 10.5pt; font-family: Consolas; border: 1pt none windowtext; padding: 0cm;"> if LLVM strongly requires C++11, I can put static initialization.</span><o:p></o:p></pre><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);"> </span><o:p></o:p></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></div></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;">I'm pretty sure that will still produce a static initializer called on startup. Please revert this until you can find a solution that doesn't require runtime initialization.<o:p></o:p></div></div></div></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></div></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;">+1, this isn't cool.<br><br>I don't know if we're able to rely on multithreaded function-local static initialization (MSVC? - check the LLVM compiler feature compat page, perhaps) then you could just put this map in a static accessor function as a function-local static. That way it won't be a global constructor, just lazy initialized on first-call.<o:p></o:p></div></div></div></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;">It looks like this is just constant integer data though. A binary-search static table seems preferable.<o:p></o:p></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;">-- Sean Silva<o:p></o:p></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"> <o:p></o:p></div></div><blockquote style="border-style: none none none solid; border-left-color: rgb(204, 204, 204); border-left-width: 1pt; padding: 0cm 0cm 0cm 6pt; margin-left: 4.8pt; margin-right: 0cm;"><div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"> <o:p></o:p></div></div><blockquote style="border-style: none none none solid; border-left-color: rgb(204, 204, 204); border-left-width: 1pt; padding: 0cm 0cm 0cm 6pt; margin-left: 4.8pt; margin-right: 0cm;"><div><div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="color: rgb(136, 136, 136);"> </span></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="color: rgb(136, 136, 136);">-- Sean Silva<o:p></o:p></span></div></div><div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"> <o:p></o:p></div></div><blockquote style="border-style: none none none solid; border-left-color: rgb(204, 204, 204); border-left-width: 1pt; padding: 0cm 0cm 0cm 6pt; margin-left: 4.8pt; margin-right: 0cm;"><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);"> </span><o:p></o:p></div><div style="margin: 0cm 0cm 0.0001pt 36pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-family: Calibri, sans-serif; color: rgb(49, 132, 155);">-</span><span style="font-size: 7pt; color: rgb(49, 132, 155);">         <span class="Apple-converted-space"> </span></span><b><i><span style="color: rgb(49, 132, 155);"> Elena</span></i></b><o:p></o:p></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-size: 11pt; font-family: Calibri, sans-serif; color: rgb(31, 73, 125);"> </span><o:p></o:p></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><b><span style="font-size: 10pt; font-family: Tahoma, sans-serif;">From:</span></b><span style="font-size: 10pt; font-family: Tahoma, sans-serif;"><span class="Apple-converted-space"> </span>Sean Silva [mailto:<a href="mailto:chisophugis@gmail.com" target="_blank" style="color: purple; text-decoration: underline;">chisophugis@gmail.com</a>]<span class="Apple-converted-space"> </span><br><b>Sent:</b><span class="Apple-converted-space"> </span>Monday, August 25, 2014 21:42<br><b>To:</b><span class="Apple-converted-space"> </span>Demikhovsky, Elena<br><b>Cc:</b><span class="Apple-converted-space"> </span><a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank" style="color: purple; text-decoration: underline;">llvm-commits@cs.uiuc.edu</a><br><b>Subject:</b><span class="Apple-converted-space"> </span>Re: [llvm] r216345 - X86 intrinsics table - simplifies intrinsics lowering.</span><o:p></o:p></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"> <o:p></o:p></div><div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><span style="font-size: 10pt; font-family: Arial, sans-serif;">+std::map < unsigned, IntrinsicData> IntrWithChainMap;</span><o:p></o:p></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"> <o:p></o:p></div></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;">What's up with the random global (w/ static initializer)? We shouldn't have any of those in the library code.<o:p></o:p></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"> <o:p></o:p></div></div><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;">-- Sean Silva<o:p></o:p></div></div></div><div><p class="MsoNormal" style="margin: 0cm 0cm 12pt; font-size: 12pt; font-family: 'Times New Roman', serif;"> <o:p></o:p></p><div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;">On Sun, Aug 24, 2014 at 2:19 AM, Elena Demikhovsky <<a href="mailto:elena.demikhovsky@intel.com" target="_blank" style="color: purple; text-decoration: underline;">elena.demikhovsky@intel.com</a>> wrote:<o:p></o:p></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;">Author: delena<br>Date: Sun Aug 24 04:19:56 2014<br>New Revision: 216345<br><br>URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project?rev=216345&view=rev" target="_blank" style="color: purple; text-decoration: underline;">http://llvm.org/viewvc/llvm-project?rev=216345&view=rev</a><br>Log:<br>X86 intrinsics table - simplifies intrinsics lowering.<br>The tables are initialized when X86TargetLowering object is created.<br><br>Added:<br>    llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h<br>Modified:<br>    llvm/trunk/include/llvm/IR/IntrinsicsX86.td<br>    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br><br>Modified: llvm/trunk/include/llvm/IR/IntrinsicsX86.td<br>URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=216345&r1=216344&r2=216345&view=diff" target="_blank" style="color: purple; text-decoration: underline;">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/IntrinsicsX86.td?rev=216345&r1=216344&r2=216345&view=diff</a><br>==============================================================================<br>--- llvm/trunk/include/llvm/IR/IntrinsicsX86.td (original)<br>+++ llvm/trunk/include/llvm/IR/IntrinsicsX86.td Sun Aug 24 04:19:56 2014<br>@@ -1389,6 +1389,10 @@ let TargetPrefix = "x86" in {  // All in<br>         GCCBuiltin<"__builtin_ia32_storeupd512_mask">,<br>         Intrinsic<[], [llvm_ptr_ty, llvm_v8f64_ty, llvm_i8_ty],<br>                   [IntrReadWriteArgMem]>;<br>+  def int_x86_avx512_mask_store_ss :<br>+        GCCBuiltin<"__builtin_ia32_storess_mask">,<br>+        Intrinsic<[], [llvm_ptr_ty, llvm_v4f32_ty, llvm_i8_ty],<br>+                  [IntrReadWriteArgMem]>;<br> }<br><br> //===----------------------------------------------------------------------===//<br><br>Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp<br>URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=216345&r1=216344&r2=216345&view=diff" target="_blank" style="color: purple; text-decoration: underline;">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=216345&r1=216344&r2=216345&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)<br>+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Aug 24 04:19:56 2014<br>@@ -49,6 +49,7 @@<br> #include "llvm/Support/ErrorHandling.h"<br> #include "llvm/Support/MathExtras.h"<br> #include "llvm/Target/TargetOptions.h"<br>+#include "X86IntrinsicsInfo.h"<br> #include <bitset><br> #include <numeric><br> #include <cctype><br>@@ -1642,6 +1643,8 @@ void X86TargetLowering::resetOperationAc<br>   PredictableSelectIsExpensive = !Subtarget->isAtom();<br><br>   setPrefFunctionAlignment(4); // 2^4 bytes.<br>+<br>+  InitIntrinsicTables();<br> }<br><br> // This has so far only been implemented for 64-bit MachO.<br>@@ -14488,109 +14491,40 @@ static unsigned getOpcodeForFMAIntrinsic<br> static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) {<br>   SDLoc dl(Op);<br>   unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();<br>-  switch (IntNo) {<br>-  default: return SDValue();    // Don't custom lower most intrinsics.<br>-  // Comparison intrinsics.<br>-  case Intrinsic::x86_sse_comieq_ss:<br>-  case Intrinsic::x86_sse_comilt_ss:<br>-  case Intrinsic::x86_sse_comile_ss:<br>-  case Intrinsic::x86_sse_comigt_ss:<br>-  case Intrinsic::x86_sse_comige_ss:<br>-  case Intrinsic::x86_sse_comineq_ss:<br>-  case Intrinsic::x86_sse_ucomieq_ss:<br>-  case Intrinsic::x86_sse_ucomilt_ss:<br>-  case Intrinsic::x86_sse_ucomile_ss:<br>-  case Intrinsic::x86_sse_ucomigt_ss:<br>-  case Intrinsic::x86_sse_ucomige_ss:<br>-  case Intrinsic::x86_sse_ucomineq_ss:<br>-  case Intrinsic::x86_sse2_comieq_sd:<br>-  case Intrinsic::x86_sse2_comilt_sd:<br>-  case Intrinsic::x86_sse2_comile_sd:<br>-  case Intrinsic::x86_sse2_comigt_sd:<br>-  case Intrinsic::x86_sse2_comige_sd:<br>-  case Intrinsic::x86_sse2_comineq_sd:<br>-  case Intrinsic::x86_sse2_ucomieq_sd:<br>-  case Intrinsic::x86_sse2_ucomilt_sd:<br>-  case Intrinsic::x86_sse2_ucomile_sd:<br>-  case Intrinsic::x86_sse2_ucomigt_sd:<br>-  case Intrinsic::x86_sse2_ucomige_sd:<br>-  case Intrinsic::x86_sse2_ucomineq_sd: {<br>-    unsigned Opc;<br>-    ISD::CondCode CC;<br>-    switch (IntNo) {<br>-    default: llvm_unreachable("Impossible intrinsic");  // Can't reach here.<br>-    case Intrinsic::x86_sse_comieq_ss:<br>-    case Intrinsic::x86_sse2_comieq_sd:<br>-      Opc = X86ISD::COMI;<br>-      CC = ISD::SETEQ;<br>-      break;<br>-    case Intrinsic::x86_sse_comilt_ss:<br>-    case Intrinsic::x86_sse2_comilt_sd:<br>-      Opc = X86ISD::COMI;<br>-      CC = ISD::SETLT;<br>-      break;<br>-    case Intrinsic::x86_sse_comile_ss:<br>-    case Intrinsic::x86_sse2_comile_sd:<br>-      Opc = X86ISD::COMI;<br>-      CC = ISD::SETLE;<br>-      break;<br>-    case Intrinsic::x86_sse_comigt_ss:<br>-    case Intrinsic::x86_sse2_comigt_sd:<br>-      Opc = X86ISD::COMI;<br>-      CC = ISD::SETGT;<br>-      break;<br>-    case Intrinsic::x86_sse_comige_ss:<br>-    case Intrinsic::x86_sse2_comige_sd:<br>-      Opc = X86ISD::COMI;<br>-      CC = ISD::SETGE;<br>-      break;<br>-    case Intrinsic::x86_sse_comineq_ss:<br>-    case Intrinsic::x86_sse2_comineq_sd:<br>-      Opc = X86ISD::COMI;<br>-      CC = ISD::SETNE;<br>-      break;<br>-    case Intrinsic::x86_sse_ucomieq_ss:<br>-    case Intrinsic::x86_sse2_ucomieq_sd:<br>-      Opc = X86ISD::UCOMI;<br>-      CC = ISD::SETEQ;<br>-      break;<br>-    case Intrinsic::x86_sse_ucomilt_ss:<br>-    case Intrinsic::x86_sse2_ucomilt_sd:<br>-      Opc = X86ISD::UCOMI;<br>-      CC = ISD::SETLT;<br>-      break;<br>-    case Intrinsic::x86_sse_ucomile_ss:<br>-    case Intrinsic::x86_sse2_ucomile_sd:<br>-      Opc = X86ISD::UCOMI;<br>-      CC = ISD::SETLE;<br>-      break;<br>-    case Intrinsic::x86_sse_ucomigt_ss:<br>-    case Intrinsic::x86_sse2_ucomigt_sd:<br>-      Opc = X86ISD::UCOMI;<br>-      CC = ISD::SETGT;<br>-      break;<br>-    case Intrinsic::x86_sse_ucomige_ss:<br>-    case Intrinsic::x86_sse2_ucomige_sd:<br>-      Opc = X86ISD::UCOMI;<br>-      CC = ISD::SETGE;<br>-      break;<br>-    case Intrinsic::x86_sse_ucomineq_ss:<br>-    case Intrinsic::x86_sse2_ucomineq_sd:<br>-      Opc = X86ISD::UCOMI;<br>-      CC = ISD::SETNE;<br>+<br>+  const IntrinsicData* IntrData = GetIntrinsicWithoutChain(IntNo);<br>+  if (IntrData) {<br>+    switch(IntrData->Type) {<br>+    case INTR_TYPE_1OP:<br>+      return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), Op.getOperand(1));<br>+    case INTR_TYPE_2OP:<br>+      return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), Op.getOperand(1),<br>+        Op.getOperand(2));<br>+    case INTR_TYPE_3OP:<br>+      return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), Op.getOperand(1),<br>+        Op.getOperand(2), Op.getOperand(3));<br>+    case COMI: { // Comparison intrinsics<br>+      ISD::CondCode CC = (ISD::CondCode)IntrData->Opc1;<br>+      SDValue LHS = Op.getOperand(1);<br>+      SDValue RHS = Op.getOperand(2);<br>+      unsigned X86CC = TranslateX86CC(CC, true, LHS, RHS, DAG);<br>+      assert(X86CC != X86::COND_INVALID && "Unexpected illegal condition!");<br>+      SDValue Cond = DAG.getNode(IntrData->Opc0, dl, MVT::i32, LHS, RHS);<br>+      SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,<br>+                                  DAG.getConstant(X86CC, MVT::i8), Cond);<br>+      return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);<br>+    }<br>+    case VSHIFT:<br>+      return getTargetVShiftNode(IntrData->Opc0, dl, Op.getSimpleValueType(),<br>+                                 Op.getOperand(1), Op.getOperand(2), DAG);<br>+    default:<br>       break;<br>     }<br>-<br>-    SDValue LHS = Op.getOperand(1);<br>-    SDValue RHS = Op.getOperand(2);<br>-    unsigned X86CC = TranslateX86CC(CC, true, LHS, RHS, DAG);<br>-    assert(X86CC != X86::COND_INVALID && "Unexpected illegal condition!");<br>-    SDValue Cond = DAG.getNode(Opc, dl, MVT::i32, LHS, RHS);<br>-    SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,<br>-                                DAG.getConstant(X86CC, MVT::i8), Cond);<br>-    return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);<br>   }<br><br>+  switch (IntNo) {<br>+  default: return SDValue();    // Don't custom lower most intrinsics.<br>+<br>   // Arithmetic intrinsics.<br>   case Intrinsic::x86_sse2_pmulu_dq:<br>   case Intrinsic::x86_avx2_pmulu_dq:<br>@@ -14612,128 +14546,6 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S<br>     return DAG.getNode(ISD::MULHS, dl, Op.getValueType(),<br>                        Op.getOperand(1), Op.getOperand(2));<br><br>-  // SSE2/AVX2 sub with unsigned saturation intrinsics<br>-  case Intrinsic::x86_sse2_psubus_b:<br>-  case Intrinsic::x86_sse2_psubus_w:<br>-  case Intrinsic::x86_avx2_psubus_b:<br>-  case Intrinsic::x86_avx2_psubus_w:<br>-    return DAG.getNode(X86ISD::SUBUS, dl, Op.getValueType(),<br>-                       Op.getOperand(1), Op.getOperand(2));<br>-<br>-  // SSE3/AVX horizontal add/sub intrinsics<br>-  case Intrinsic::x86_sse3_hadd_ps:<br>-  case Intrinsic::x86_sse3_hadd_pd:<br>-  case Intrinsic::x86_avx_hadd_ps_256:<br>-  case Intrinsic::x86_avx_hadd_pd_256:<br>-  case Intrinsic::x86_sse3_hsub_ps:<br>-  case Intrinsic::x86_sse3_hsub_pd:<br>-  case Intrinsic::x86_avx_hsub_ps_256:<br>-  case Intrinsic::x86_avx_hsub_pd_256:<br>-  case Intrinsic::x86_ssse3_phadd_w_128:<br>-  case Intrinsic::x86_ssse3_phadd_d_128:<br>-  case Intrinsic::x86_avx2_phadd_w:<br>-  case Intrinsic::x86_avx2_phadd_d:<br>-  case Intrinsic::x86_ssse3_phsub_w_128:<br>-  case Intrinsic::x86_ssse3_phsub_d_128:<br>-  case Intrinsic::x86_avx2_phsub_w:<br>-  case Intrinsic::x86_avx2_phsub_d: {<br>-    unsigned Opcode;<br>-    switch (IntNo) {<br>-    default: llvm_unreachable("Impossible intrinsic");  // Can't reach here.<br>-    case Intrinsic::x86_sse3_hadd_ps:<br>-    case Intrinsic::x86_sse3_hadd_pd:<br>-    case Intrinsic::x86_avx_hadd_ps_256:<br>-    case Intrinsic::x86_avx_hadd_pd_256:<br>-      Opcode = X86ISD::FHADD;<br>-      break;<br>-    case Intrinsic::x86_sse3_hsub_ps:<br>-    case Intrinsic::x86_sse3_hsub_pd:<br>-    case Intrinsic::x86_avx_hsub_ps_256:<br>-    case Intrinsic::x86_avx_hsub_pd_256:<br>-      Opcode = X86ISD::FHSUB;<br>-      break;<br>-    case Intrinsic::x86_ssse3_phadd_w_128:<br>-    case Intrinsic::x86_ssse3_phadd_d_128:<br>-    case Intrinsic::x86_avx2_phadd_w:<br>-    case Intrinsic::x86_avx2_phadd_d:<br>-      Opcode = X86ISD::HADD;<br>-      break;<br>-    case Intrinsic::x86_ssse3_phsub_w_128:<br>-    case Intrinsic::x86_ssse3_phsub_d_128:<br>-    case Intrinsic::x86_avx2_phsub_w:<br>-    case Intrinsic::x86_avx2_phsub_d:<br>-      Opcode = X86ISD::HSUB;<br>-      break;<br>-    }<br>-    return DAG.getNode(Opcode, dl, Op.getValueType(),<br>-                       Op.getOperand(1), Op.getOperand(2));<br>-  }<br>-<br>-  // SSE2/SSE41/AVX2 integer max/min intrinsics.<br>-  case Intrinsic::x86_sse2_pmaxu_b:<br>-  case Intrinsic::x86_sse41_pmaxuw:<br>-  case Intrinsic::x86_sse41_pmaxud:<br>-  case Intrinsic::x86_avx2_pmaxu_b:<br>-  case Intrinsic::x86_avx2_pmaxu_w:<br>-  case Intrinsic::x86_avx2_pmaxu_d:<br>-  case Intrinsic::x86_sse2_pminu_b:<br>-  case Intrinsic::x86_sse41_pminuw:<br>-  case Intrinsic::x86_sse41_pminud:<br>-  case Intrinsic::x86_avx2_pminu_b:<br>-  case Intrinsic::x86_avx2_pminu_w:<br>-  case Intrinsic::x86_avx2_pminu_d:<br>-  case Intrinsic::x86_sse41_pmaxsb:<br>-  case Intrinsic::x86_sse2_pmaxs_w:<br>-  case Intrinsic::x86_sse41_pmaxsd:<br>-  case Intrinsic::x86_avx2_pmaxs_b:<br>-  case Intrinsic::x86_avx2_pmaxs_w:<br>-  case Intrinsic::x86_avx2_pmaxs_d:<br>-  case Intrinsic::x86_sse41_pminsb:<br>-  case Intrinsic::x86_sse2_pmins_w:<br>-  case Intrinsic::x86_sse41_pminsd:<br>-  case Intrinsic::x86_avx2_pmins_b:<br>-  case Intrinsic::x86_avx2_pmins_w:<br>-  case Intrinsic::x86_avx2_pmins_d: {<br>-    unsigned Opcode;<br>-    switch (IntNo) {<br>-    default: llvm_unreachable("Impossible intrinsic");  // Can't reach here.<br>-    case Intrinsic::x86_sse2_pmaxu_b:<br>-    case Intrinsic::x86_sse41_pmaxuw:<br>-    case Intrinsic::x86_sse41_pmaxud:<br>-    case Intrinsic::x86_avx2_pmaxu_b:<br>-    case Intrinsic::x86_avx2_pmaxu_w:<br>-    case Intrinsic::x86_avx2_pmaxu_d:<br>-      Opcode = X86ISD::UMAX;<br>-      break;<br>-    case Intrinsic::x86_sse2_pminu_b:<br>-    case Intrinsic::x86_sse41_pminuw:<br>-    case Intrinsic::x86_sse41_pminud:<br>-    case Intrinsic::x86_avx2_pminu_b:<br>-    case Intrinsic::x86_avx2_pminu_w:<br>-    case Intrinsic::x86_avx2_pminu_d:<br>-      Opcode = X86ISD::UMIN;<br>-      break;<br>-    case Intrinsic::x86_sse41_pmaxsb:<br>-    case Intrinsic::x86_sse2_pmaxs_w:<br>-    case Intrinsic::x86_sse41_pmaxsd:<br>-    case Intrinsic::x86_avx2_pmaxs_b:<br>-    case Intrinsic::x86_avx2_pmaxs_w:<br>-    case Intrinsic::x86_avx2_pmaxs_d:<br>-      Opcode = X86ISD::SMAX;<br>-      break;<br>-    case Intrinsic::x86_sse41_pminsb:<br>-    case Intrinsic::x86_sse2_pmins_w:<br>-    case Intrinsic::x86_sse41_pminsd:<br>-    case Intrinsic::x86_avx2_pmins_b:<br>-    case Intrinsic::x86_avx2_pmins_w:<br>-    case Intrinsic::x86_avx2_pmins_d:<br>-      Opcode = X86ISD::SMIN;<br>-      break;<br>-    }<br>-    return DAG.getNode(Opcode, dl, Op.getValueType(),<br>-                       Op.getOperand(1), Op.getOperand(2));<br>-  }<br>-<br>   // SSE/SSE2/AVX floating point max/min intrinsics.<br>   case Intrinsic::x86_sse_max_ps:<br>   case Intrinsic::x86_sse2_max_pd:<br>@@ -14838,17 +14650,6 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S<br>     return DAG.getNode(X86ISD::PSIGN, dl, Op.getValueType(),<br>                        Op.getOperand(1), Op.getOperand(2));<br><br>-  case Intrinsic::x86_sse41_insertps:<br>-    return DAG.getNode(X86ISD::INSERTPS, dl, Op.getValueType(),<br>-                       Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));<br>-<br>-  case Intrinsic::x86_avx_vperm2f128_ps_256:<br>-  case Intrinsic::x86_avx_vperm2f128_pd_256:<br>-  case Intrinsic::x86_avx_vperm2f128_si_256:<br>-  case Intrinsic::x86_avx2_vperm2i128:<br>-    return DAG.getNode(X86ISD::VPERM2X128, dl, Op.getValueType(),<br>-                       Op.getOperand(1), Op.getOperand(2), Op.getOperand(3));<br>-<br>   case Intrinsic::x86_avx2_permd:<br>   case Intrinsic::x86_avx2_permps:<br>     // Operands intentionally swapped. Mask is last operand to intrinsic,<br>@@ -14856,12 +14657,6 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S<br>     return DAG.getNode(X86ISD::VPERMV, dl, Op.getValueType(),<br>                        Op.getOperand(2), Op.getOperand(1));<br><br>-  case Intrinsic::x86_sse_sqrt_ps:<br>-  case Intrinsic::x86_sse2_sqrt_pd:<br>-  case Intrinsic::x86_avx_sqrt_ps_256:<br>-  case Intrinsic::x86_avx_sqrt_pd_256:<br>-    return DAG.getNode(ISD::FSQRT, dl, Op.getValueType(), Op.getOperand(1));<br>-<br>   case Intrinsic::x86_avx512_mask_valign_q_512:<br>   case Intrinsic::x86_avx512_mask_valign_d_512:<br>     // Vector source operands are swapped.<br>@@ -14947,100 +14742,6 @@ static SDValue LowerINTRINSIC_WO_CHAIN(S<br>     return DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, SetCC);<br>   }<br><br>-  // SSE/AVX shift intrinsics<br>-  case Intrinsic::x86_sse2_psll_w:<br>-  case Intrinsic::x86_sse2_psll_d:<br>-  case Intrinsic::x86_sse2_psll_q:<br>-  case Intrinsic::x86_avx2_psll_w:<br>-  case Intrinsic::x86_avx2_psll_d:<br>-  case Intrinsic::x86_avx2_psll_q:<br>-  case Intrinsic::x86_sse2_psrl_w:<br>-  case Intrinsic::x86_sse2_psrl_d:<br>-  case Intrinsic::x86_sse2_psrl_q:<br>-  case Intrinsic::x86_avx2_psrl_w:<br>-  case Intrinsic::x86_avx2_psrl_d:<br>-  case Intrinsic::x86_avx2_psrl_q:<br>-  case Intrinsic::x86_sse2_psra_w:<br>-  case Intrinsic::x86_sse2_psra_d:<br>-  case Intrinsic::x86_avx2_psra_w:<br>-  case Intrinsic::x86_avx2_psra_d: {<br>-    unsigned Opcode;<br>-    switch (IntNo) {<br>-    default: llvm_unreachable("Impossible intrinsic");  // Can't reach here.<br>-    case Intrinsic::x86_sse2_psll_w:<br>-    case Intrinsic::x86_sse2_psll_d:<br>-    case Intrinsic::x86_sse2_psll_q:<br>-    case Intrinsic::x86_avx2_psll_w:<br>-    case Intrinsic::x86_avx2_psll_d:<br>-    case Intrinsic::x86_avx2_psll_q:<br>-      Opcode = X86ISD::VSHL;<br>-      break;<br>-    case Intrinsic::x86_sse2_psrl_w:<br>-    case Intrinsic::x86_sse2_psrl_d:<br>-    case Intrinsic::x86_sse2_psrl_q:<br>-    case Intrinsic::x86_avx2_psrl_w:<br>-    case Intrinsic::x86_avx2_psrl_d:<br>-    case Intrinsic::x86_avx2_psrl_q:<br>-      Opcode = X86ISD::VSRL;<br>-      break;<br>-    case Intrinsic::x86_sse2_psra_w:<br>-    case Intrinsic::x86_sse2_psra_d:<br>-    case Intrinsic::x86_avx2_psra_w:<br>-    case Intrinsic::x86_avx2_psra_d:<br>-      Opcode = X86ISD::VSRA;<br>-      break;<br>-    }<br>-    return DAG.getNode(Opcode, dl, Op.getValueType(),<br>-                       Op.getOperand(1), Op.getOperand(2));<br>-  }<br>-<br>-  // SSE/AVX immediate shift intrinsics<br>-  case Intrinsic::x86_sse2_pslli_w:<br>-  case Intrinsic::x86_sse2_pslli_d:<br>-  case Intrinsic::x86_sse2_pslli_q:<br>-  case Intrinsic::x86_avx2_pslli_w:<br>-  case Intrinsic::x86_avx2_pslli_d:<br>-  case Intrinsic::x86_avx2_pslli_q:<br>-  case Intrinsic::x86_sse2_psrli_w:<br>-  case Intrinsic::x86_sse2_psrli_d:<br>-  case Intrinsic::x86_sse2_psrli_q:<br>-  case Intrinsic::x86_avx2_psrli_w:<br>-  case Intrinsic::x86_avx2_psrli_d:<br>-  case Intrinsic::x86_avx2_psrli_q:<br>-  case Intrinsic::x86_sse2_psrai_w:<br>-  case Intrinsic::x86_sse2_psrai_d:<br>-  case Intrinsic::x86_avx2_psrai_w:<br>-  case Intrinsic::x86_avx2_psrai_d: {<br>-    unsigned Opcode;<br>-    switch (IntNo) {<br>-    default: llvm_unreachable("Impossible intrinsic");  // Can't reach here.<br>-    case Intrinsic::x86_sse2_pslli_w:<br>-    case Intrinsic::x86_sse2_pslli_d:<br>-    case Intrinsic::x86_sse2_pslli_q:<br>-    case Intrinsic::x86_avx2_pslli_w:<br>-    case Intrinsic::x86_avx2_pslli_d:<br>-    case Intrinsic::x86_avx2_pslli_q:<br>-      Opcode = X86ISD::VSHLI;<br>-      break;<br>-    case Intrinsic::x86_sse2_psrli_w:<br>-    case Intrinsic::x86_sse2_psrli_d:<br>-    case Intrinsic::x86_sse2_psrli_q:<br>-    case Intrinsic::x86_avx2_psrli_w:<br>-    case Intrinsic::x86_avx2_psrli_d:<br>-    case Intrinsic::x86_avx2_psrli_q:<br>-      Opcode = X86ISD::VSRLI;<br>-      break;<br>-    case Intrinsic::x86_sse2_psrai_w:<br>-    case Intrinsic::x86_sse2_psrai_d:<br>-    case Intrinsic::x86_avx2_psrai_w:<br>-    case Intrinsic::x86_avx2_psrai_d:<br>-      Opcode = X86ISD::VSRAI;<br>-      break;<br>-    }<br>-    return getTargetVShiftNode(Opcode, dl, Op.getSimpleValueType(),<br>-                               Op.getOperand(1), Op.getOperand(2), DAG);<br>-  }<br>-<br>   case Intrinsic::x86_sse42_pcmpistria128:<br>   case Intrinsic::x86_sse42_pcmpestria128:<br>   case Intrinsic::x86_sse42_pcmpistric128:<br>@@ -15352,134 +15053,25 @@ static SDValue LowerREADCYCLECOUNTER(SDV<br>   return DAG.getMergeValues(Results, DL);<br> }<br><br>-enum IntrinsicType {<br>-  GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, ADX<br>-};<br>-<br>-struct IntrinsicData {<br>-  IntrinsicData(IntrinsicType IType, unsigned IOpc0, unsigned IOpc1)<br>-    :Type(IType), Opc0(IOpc0), Opc1(IOpc1) {}<br>-  IntrinsicType Type;<br>-  unsigned      Opc0;<br>-  unsigned      Opc1;<br>-};<br>-<br>-std::map < unsigned, IntrinsicData> IntrMap;<br>-static void InitIntinsicsMap() {<br>-  static bool Initialized = false;<br>-  if (Initialized)<br>-    return;<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qps_512,<br>-                                IntrinsicData(GATHER, X86::VGATHERQPSZrm, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qps_512,<br>-                                IntrinsicData(GATHER, X86::VGATHERQPSZrm, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qpd_512,<br>-                                IntrinsicData(GATHER, X86::VGATHERQPDZrm, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_dpd_512,<br>-                                IntrinsicData(GATHER, X86::VGATHERDPDZrm, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_dps_512,<br>-                                IntrinsicData(GATHER, X86::VGATHERDPSZrm, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qpi_512,<br>-                                IntrinsicData(GATHER, X86::VPGATHERQDZrm, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_qpq_512,<br>-                                IntrinsicData(GATHER, X86::VPGATHERQQZrm, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_dpi_512,<br>-                                IntrinsicData(GATHER, X86::VPGATHERDDZrm, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gather_dpq_512,<br>-                                IntrinsicData(GATHER, X86::VPGATHERDQZrm, 0)));<br>-<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_qps_512,<br>-                                IntrinsicData(SCATTER, X86::VSCATTERQPSZmr, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_qpd_512,<br>-                                IntrinsicData(SCATTER, X86::VSCATTERQPDZmr, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_dpd_512,<br>-                                IntrinsicData(SCATTER, X86::VSCATTERDPDZmr, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_dps_512,<br>-                                IntrinsicData(SCATTER, X86::VSCATTERDPSZmr, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_qpi_512,<br>-                                IntrinsicData(SCATTER, X86::VPSCATTERQDZmr, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_qpq_512,<br>-                                IntrinsicData(SCATTER, X86::VPSCATTERQQZmr, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_dpi_512,<br>-                                IntrinsicData(SCATTER, X86::VPSCATTERDDZmr, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatter_dpq_512,<br>-                                IntrinsicData(SCATTER, X86::VPSCATTERDQZmr, 0)));<br>-<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gatherpf_qps_512,<br>-                                IntrinsicData(PREFETCH, X86::VGATHERPF0QPSm,<br>-                                                        X86::VGATHERPF1QPSm)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gatherpf_qpd_512,<br>-                                IntrinsicData(PREFETCH, X86::VGATHERPF0QPDm,<br>-                                                        X86::VGATHERPF1QPDm)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gatherpf_dpd_512,<br>-                                IntrinsicData(PREFETCH, X86::VGATHERPF0DPDm,<br>-                                                        X86::VGATHERPF1DPDm)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_gatherpf_dps_512,<br>-                                IntrinsicData(PREFETCH, X86::VGATHERPF0DPSm,<br>-                                                        X86::VGATHERPF1DPSm)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatterpf_qps_512,<br>-                                IntrinsicData(PREFETCH, X86::VSCATTERPF0QPSm,<br>-                                                        X86::VSCATTERPF1QPSm)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatterpf_qpd_512,<br>-                                IntrinsicData(PREFETCH, X86::VSCATTERPF0QPDm,<br>-                                                        X86::VSCATTERPF1QPDm)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatterpf_dpd_512,<br>-                                IntrinsicData(PREFETCH, X86::VSCATTERPF0DPDm,<br>-                                                        X86::VSCATTERPF1DPDm)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_avx512_scatterpf_dps_512,<br>-                                IntrinsicData(PREFETCH, X86::VSCATTERPF0DPSm,<br>-                                                        X86::VSCATTERPF1DPSm)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_rdrand_16,<br>-                                IntrinsicData(RDRAND, X86ISD::RDRAND, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_rdrand_32,<br>-                                IntrinsicData(RDRAND, X86ISD::RDRAND, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_rdrand_64,<br>-                                IntrinsicData(RDRAND, X86ISD::RDRAND, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_rdseed_16,<br>-                                IntrinsicData(RDSEED, X86ISD::RDSEED, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_rdseed_32,<br>-                                IntrinsicData(RDSEED, X86ISD::RDSEED, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_rdseed_64,<br>-                                IntrinsicData(RDSEED, X86ISD::RDSEED, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_xtest,<br>-                                IntrinsicData(XTEST,  X86ISD::XTEST,  0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_rdtsc,<br>-                                IntrinsicData(RDTSC,  X86ISD::RDTSC_DAG, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_rdtscp,<br>-                                IntrinsicData(RDTSC,  X86ISD::RDTSCP_DAG, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_rdpmc,<br>-                                IntrinsicData(RDPMC,  X86ISD::RDPMC_DAG, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_addcarryx_u32,<br>-                                IntrinsicData(ADX,    X86ISD::ADC, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_addcarryx_u64,<br>-                                IntrinsicData(ADX,    X86ISD::ADC, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_addcarry_u32,<br>-                                IntrinsicData(ADX,    X86ISD::ADC, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_addcarry_u64,<br>-                                IntrinsicData(ADX,    X86ISD::ADC, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_subborrow_u32,<br>-                                IntrinsicData(ADX,    X86ISD::SBB, 0)));<br>-  IntrMap.insert(std::make_pair(Intrinsic::x86_subborrow_u64,<br>-                                IntrinsicData(ADX,    X86ISD::SBB, 0)));<br>-  Initialized = true;<br>-}<br><br> static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget *Subtarget,<br>                                       SelectionDAG &DAG) {<br>-  InitIntinsicsMap();<br>   unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();<br>-  std::map < unsigned, IntrinsicData>::const_iterator itr = IntrMap.find(IntNo);<br>-  if (itr == IntrMap.end())<br>+<br>+  const IntrinsicData* IntrData = GetIntrinsicWithChain(IntNo);<br>+  if (!IntrData)<br>     return SDValue();<br><br>   SDLoc dl(Op);<br>-  IntrinsicData Intr = itr->second;<br>-  switch(Intr.Type) {<br>+  switch(IntrData->Type) {<br>+  default:<br>+    llvm_unreachable("Unknown Intrinsic Type");<br>+    break;<br>   case RDSEED:<br>   case RDRAND: {<br>     // Emit the node with the right value type.<br>     SDVTList VTs = DAG.getVTList(Op->getValueType(0), MVT::Glue, MVT::Other);<br>-    SDValue Result = DAG.getNode(Intr.Opc0, dl, VTs, Op.getOperand(0));<br>+    SDValue Result = DAG.getNode(IntrData->Opc0, dl, VTs, Op.getOperand(0));<br><br>     // If the value returned by RDRAND/RDSEED was valid (CF=1), return 1.<br>     // Otherwise return the value from Rand, which is always 0, casted to i32.<br>@@ -15503,7 +15095,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br>     SDValue Index = Op.getOperand(4);<br>     SDValue Mask  = Op.getOperand(5);<br>     SDValue Scale = Op.getOperand(6);<br>-    return getGatherNode(Intr.Opc0, Op, DAG, Src, Mask, Base, Index, Scale, Chain,<br>+    return getGatherNode(IntrData->Opc0, Op, DAG, Src, Mask, Base, Index, Scale, Chain,<br>                           Subtarget);<br>   }<br>   case SCATTER: {<br>@@ -15514,7 +15106,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br>     SDValue Index = Op.getOperand(4);<br>     SDValue Src   = Op.getOperand(5);<br>     SDValue Scale = Op.getOperand(6);<br>-    return getScatterNode(Intr.Opc0, Op, DAG, Src, Mask, Base, Index, Scale, Chain);<br>+    return getScatterNode(IntrData->Opc0, Op, DAG, Src, Mask, Base, Index, Scale, Chain);<br>   }<br>   case PREFETCH: {<br>     SDValue Hint = Op.getOperand(6);<br>@@ -15522,7 +15114,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br>     if (dyn_cast<ConstantSDNode> (Hint) == nullptr ||<br>         (HintVal = dyn_cast<ConstantSDNode> (Hint)->getZExtValue()) > 1)<br>       llvm_unreachable("Wrong prefetch hint in intrinsic: should be 0 or 1");<br>-    unsigned Opcode = (HintVal ? Intr.Opc1 : Intr.Opc0);<br>+    unsigned Opcode = (HintVal ? IntrData->Opc1 : IntrData->Opc0);<br>     SDValue Chain = Op.getOperand(0);<br>     SDValue Mask  = Op.getOperand(2);<br>     SDValue Index = Op.getOperand(3);<br>@@ -15533,7 +15125,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br>   // Read Time Stamp Counter (RDTSC) and Processor ID (RDTSCP).<br>   case RDTSC: {<br>     SmallVector<SDValue, 2> Results;<br>-    getReadTimeStampCounter(Op.getNode(), dl, Intr.Opc0, DAG, Subtarget, Results);<br>+    getReadTimeStampCounter(Op.getNode(), dl, IntrData->Opc0, DAG, Subtarget, Results);<br>     return DAG.getMergeValues(Results, dl);<br>   }<br>   // Read Performance Monitoring Counters.<br>@@ -15545,7 +15137,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br>   // XTEST intrinsics.<br>   case XTEST: {<br>     SDVTList VTs = DAG.getVTList(Op->getValueType(0), MVT::Other);<br>-    SDValue InTrans = DAG.getNode(X86ISD::XTEST, dl, VTs, Op.getOperand(0));<br>+    SDValue InTrans = DAG.getNode(IntrData->Opc0, dl, VTs, Op.getOperand(0));<br>     SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8,<br>                                 DAG.getConstant(X86::COND_NE, MVT::i8),<br>                                 InTrans);<br>@@ -15560,7 +15152,7 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br>     SDVTList VTs = DAG.getVTList(Op.getOperand(3)->getValueType(0), MVT::Other);<br>     SDValue GenCF = DAG.getNode(X86ISD::ADD, dl, CFVTs, Op.getOperand(2),<br>                                 DAG.getConstant(-1, MVT::i8));<br>-    SDValue Res = DAG.getNode(Intr.Opc0, dl, VTs, Op.getOperand(3),<br>+    SDValue Res = DAG.getNode(IntrData->Opc0, dl, VTs, Op.getOperand(3),<br>                               Op.getOperand(4), GenCF.getValue(1));<br>     SDValue Store = DAG.getStore(Op.getOperand(0), dl, Res.getValue(0),<br>                                  Op.getOperand(5), MachinePointerInfo(),<br>@@ -15573,7 +15165,6 @@ static SDValue LowerINTRINSIC_W_CHAIN(SD<br>     return DAG.getMergeValues(Results, dl);<br>   }<br>   }<br>-  llvm_unreachable("Unknown Intrinsic Type");<br> }<br><br> SDValue X86TargetLowering::LowerRETURNADDR(SDValue Op,<br><br>Added: llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h<br>URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h?rev=216345&view=auto" target="_blank" style="color: purple; text-decoration: underline;">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h?rev=216345&view=auto</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h (added)<br>+++ llvm/trunk/lib/Target/X86/X86IntrinsicsInfo.h Sun Aug 24 04:19:56 2014<br>@@ -0,0 +1,241 @@<br>+//===-- X86IntinsicsInfo.h - X86 Instrinsics ------------*- C++ -*-===//<br>+//<br>+//                     The LLVM Compiler Infrastructure<br>+//<br>+// This file is distributed under the University of Illinois Open Source<br>+// License. See LICENSE.TXT for details.<br>+//<br>+//===----------------------------------------------------------------------===//<br>+//<br>+// This file contains the details for lowering X86 intrinsics<br>+//<br>+//===----------------------------------------------------------------------===//<br>+<br>+#ifndef LLVM_LIB_TARGET_X86_X86INTRINSICSINFO_H<br>+#define LLVM_LIB_TARGET_X86_X86INTRINSICSINFO_H<br>+<br>+using namespace llvm;<br>+<br>+enum IntrinsicType {<br>+  GATHER, SCATTER, PREFETCH, RDSEED, RDRAND, RDPMC, RDTSC, XTEST, ADX,<br>+  INTR_TYPE_1OP, INTR_TYPE_2OP, INTR_TYPE_3OP, VSHIFT,<br>+  COMI<br>+};<br>+<br>+struct IntrinsicData {<br>+  IntrinsicData(IntrinsicType IType, unsigned IOpc0, unsigned IOpc1)<br>+    :Type(IType), Opc0(IOpc0), Opc1(IOpc1) {}<br>+  IntrinsicType Type;<br>+  unsigned      Opc0;<br>+  unsigned      Opc1;<br>+};<br>+<br>+#define INTRINSIC_WITH_CHAIN(id, type, op0, op1) \<br>+ IntrWithChainMap.insert(std::make_pair(Intrinsic::id, \<br>+   IntrinsicData(type, op0, op1)))<br>+<br>+std::map < unsigned, IntrinsicData> IntrWithChainMap;<br>+void InitIntrinsicsWithChain() {<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_gather_qps_512, GATHER, X86::VGATHERQPSZrm, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_gather_qpd_512, GATHER, X86::VGATHERQPDZrm, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_gather_dps_512, GATHER, X86::VGATHERDPSZrm, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_gather_dpd_512, GATHER, X86::VGATHERDPDZrm, 0);<br>+<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_gather_qpi_512, GATHER, X86::VPGATHERQDZrm, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_gather_qpq_512, GATHER, X86::VPGATHERQQZrm, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_gather_dpi_512, GATHER, X86::VPGATHERDDZrm, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_gather_dpq_512, GATHER, X86::VPGATHERDQZrm, 0);<br>+<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_scatter_qps_512, SCATTER, X86::VSCATTERQPSZmr, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_scatter_qpd_512, SCATTER, X86::VSCATTERQPDZmr, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_scatter_dps_512, SCATTER, X86::VSCATTERDPSZmr, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_scatter_dpd_512, SCATTER, X86::VSCATTERDPDZmr, 0);<br>+<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_scatter_qpi_512, SCATTER, X86::VPSCATTERQDZmr, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_scatter_qpq_512, SCATTER, X86::VPSCATTERQQZmr, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_scatter_dpi_512, SCATTER, X86::VPSCATTERDDZmr, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_scatter_dpq_512, SCATTER, X86::VPSCATTERDQZmr, 0);<br>+<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_gatherpf_qps_512, PREFETCH, X86::VGATHERPF0QPSm, X86::VGATHERPF1QPSm);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_gatherpf_qpd_512, PREFETCH, X86::VGATHERPF0QPDm, X86::VGATHERPF1QPDm);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_gatherpf_dps_512, PREFETCH, X86::VGATHERPF0DPSm, X86::VGATHERPF1DPSm);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_gatherpf_dpd_512, PREFETCH, X86::VGATHERPF0DPDm, X86::VGATHERPF1DPDm);<br>+<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_scatterpf_qps_512, PREFETCH, X86::VSCATTERPF0QPSm, X86::VSCATTERPF1QPSm);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_scatterpf_qpd_512, PREFETCH, X86::VSCATTERPF0QPDm, X86::VSCATTERPF1QPDm);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_scatterpf_dps_512, PREFETCH, X86::VSCATTERPF0DPSm, X86::VSCATTERPF1DPSm);<br>+  INTRINSIC_WITH_CHAIN(x86_avx512_scatterpf_dpd_512, PREFETCH, X86::VSCATTERPF0DPDm, X86::VSCATTERPF1DPDm);<br>+<br>+  INTRINSIC_WITH_CHAIN(x86_rdrand_16, RDRAND, X86ISD::RDRAND, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_rdrand_32, RDRAND, X86ISD::RDRAND, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_rdrand_64, RDRAND, X86ISD::RDRAND, 0);<br>+<br>+  INTRINSIC_WITH_CHAIN(x86_rdseed_16, RDSEED, X86ISD::RDSEED, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_rdseed_32, RDSEED, X86ISD::RDSEED, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_rdseed_64, RDSEED, X86ISD::RDSEED, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_xtest,     XTEST,  X86ISD::XTEST,  0);<br>+  INTRINSIC_WITH_CHAIN(x86_rdtsc,     RDTSC,  X86ISD::RDTSC_DAG, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_rdtscp,    RDTSC,  X86ISD::RDTSCP_DAG, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_rdpmc,     RDPMC,  X86ISD::RDPMC_DAG, 0);<br>+<br>+  INTRINSIC_WITH_CHAIN(x86_addcarryx_u32, ADX, X86ISD::ADC, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_addcarryx_u64, ADX, X86ISD::ADC, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_addcarry_u32,  ADX, X86ISD::ADC, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_addcarry_u64,  ADX, X86ISD::ADC, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_subborrow_u32, ADX, X86ISD::SBB, 0);<br>+  INTRINSIC_WITH_CHAIN(x86_subborrow_u64, ADX, X86ISD::SBB, 0);<br>+<br>+}<br>+<br>+const IntrinsicData* GetIntrinsicWithChain(unsigned IntNo) {<br>+  std::map < unsigned, IntrinsicData>::const_iterator itr =<br>+    IntrWithChainMap.find(IntNo);<br>+  if (itr == IntrWithChainMap.end())<br>+    return NULL;<br>+  return &(itr->second);<br>+}<br>+<br>+#define INTRINSIC_WO_CHAIN(id, type, op0, op1) \<br>+ IntrWithoutChainMap.insert(std::make_pair(Intrinsic::id, \<br>+   IntrinsicData(type, op0, op1)))<br>+<br>+<br>+std::map < unsigned, IntrinsicData> IntrWithoutChainMap;<br>+<br>+void InitIntrinsicsWithoutChain() {<br>+  INTRINSIC_WO_CHAIN(x86_sse_sqrt_ps,     INTR_TYPE_1OP, ISD::FSQRT, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_sqrt_pd,    INTR_TYPE_1OP, ISD::FSQRT, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx_sqrt_ps_256, INTR_TYPE_1OP, ISD::FSQRT, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx_sqrt_pd_256, INTR_TYPE_1OP, ISD::FSQRT, 0);<br>+<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psubus_b,     INTR_TYPE_2OP, X86ISD::SUBUS, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psubus_w,     INTR_TYPE_2OP, X86ISD::SUBUS, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psubus_b,     INTR_TYPE_2OP, X86ISD::SUBUS, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psubus_w,     INTR_TYPE_2OP, X86ISD::SUBUS, 0);<br>+<br>+  INTRINSIC_WO_CHAIN(x86_sse3_hadd_ps,      INTR_TYPE_2OP, X86ISD::FHADD, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse3_hadd_pd,      INTR_TYPE_2OP, X86ISD::FHADD, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx_hadd_ps_256,   INTR_TYPE_2OP, X86ISD::FHADD, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx_hadd_pd_256,   INTR_TYPE_2OP, X86ISD::FHADD, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse3_hsub_ps,      INTR_TYPE_2OP, X86ISD::FHSUB, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse3_hsub_pd,      INTR_TYPE_2OP, X86ISD::FHSUB, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx_hsub_ps_256,   INTR_TYPE_2OP, X86ISD::FHSUB, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx_hsub_pd_256,   INTR_TYPE_2OP, X86ISD::FHSUB, 0);<br>+  INTRINSIC_WO_CHAIN(x86_ssse3_phadd_w_128, INTR_TYPE_2OP, X86ISD::HADD, 0);<br>+  INTRINSIC_WO_CHAIN(x86_ssse3_phadd_d_128, INTR_TYPE_2OP, X86ISD::HADD, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_phadd_w,      INTR_TYPE_2OP, X86ISD::HADD, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_phadd_d,      INTR_TYPE_2OP, X86ISD::HADD, 0);<br>+  INTRINSIC_WO_CHAIN(x86_ssse3_phsub_w_128, INTR_TYPE_2OP, X86ISD::HSUB, 0);<br>+  INTRINSIC_WO_CHAIN(x86_ssse3_phsub_d_128, INTR_TYPE_2OP, X86ISD::HSUB, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_phsub_w,      INTR_TYPE_2OP, X86ISD::HSUB, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_phsub_d,      INTR_TYPE_2OP, X86ISD::HSUB, 0);<br>+<br>+  INTRINSIC_WO_CHAIN(x86_sse2_pmaxu_b,      INTR_TYPE_2OP, X86ISD::UMAX, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse41_pmaxuw,      INTR_TYPE_2OP, X86ISD::UMAX, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse41_pmaxud,      INTR_TYPE_2OP, X86ISD::UMAX, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pmaxu_b,      INTR_TYPE_2OP, X86ISD::UMAX, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pmaxu_w,      INTR_TYPE_2OP, X86ISD::UMAX, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pmaxu_d,      INTR_TYPE_2OP, X86ISD::UMAX, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_pminu_b,      INTR_TYPE_2OP, X86ISD::UMIN, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse41_pminuw,      INTR_TYPE_2OP, X86ISD::UMIN, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse41_pminud,      INTR_TYPE_2OP, X86ISD::UMIN, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pminu_b,      INTR_TYPE_2OP, X86ISD::UMIN, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pminu_w,      INTR_TYPE_2OP, X86ISD::UMIN, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pminu_d,      INTR_TYPE_2OP, X86ISD::UMIN, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse41_pmaxsb,      INTR_TYPE_2OP, X86ISD::SMAX, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_pmaxs_w,      INTR_TYPE_2OP, X86ISD::SMAX, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse41_pmaxsd,      INTR_TYPE_2OP, X86ISD::SMAX, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pmaxs_b,      INTR_TYPE_2OP, X86ISD::SMAX, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pmaxs_w,      INTR_TYPE_2OP, X86ISD::SMAX, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pmaxs_d,      INTR_TYPE_2OP, X86ISD::SMAX, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse41_pminsb,      INTR_TYPE_2OP, X86ISD::SMIN, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_pmins_w,      INTR_TYPE_2OP, X86ISD::SMIN, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse41_pminsd,      INTR_TYPE_2OP, X86ISD::SMIN, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pmins_b,      INTR_TYPE_2OP, X86ISD::SMIN, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pmins_w,      INTR_TYPE_2OP, X86ISD::SMIN, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pmins_d,      INTR_TYPE_2OP, X86ISD::SMIN, 0);<br>+<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psll_w,      INTR_TYPE_2OP, X86ISD::VSHL, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psll_d,      INTR_TYPE_2OP, X86ISD::VSHL, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psll_q,      INTR_TYPE_2OP, X86ISD::VSHL, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psll_w,      INTR_TYPE_2OP, X86ISD::VSHL, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psll_d,      INTR_TYPE_2OP, X86ISD::VSHL, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psll_q,      INTR_TYPE_2OP, X86ISD::VSHL, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psrl_w,      INTR_TYPE_2OP, X86ISD::VSRL, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psrl_d,      INTR_TYPE_2OP, X86ISD::VSRL, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psrl_q,      INTR_TYPE_2OP, X86ISD::VSRL, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psrl_w,      INTR_TYPE_2OP, X86ISD::VSRL, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psrl_d,      INTR_TYPE_2OP, X86ISD::VSRL, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psrl_q,      INTR_TYPE_2OP, X86ISD::VSRL, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psra_w,      INTR_TYPE_2OP, X86ISD::VSRA, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psra_d,      INTR_TYPE_2OP, X86ISD::VSRA, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psra_w,      INTR_TYPE_2OP, X86ISD::VSRA, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psra_d,      INTR_TYPE_2OP, X86ISD::VSRA, 0);<br>+<br>+  INTRINSIC_WO_CHAIN(x86_sse2_pslli_w,     VSHIFT, X86ISD::VSHLI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_pslli_d,     VSHIFT, X86ISD::VSHLI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_pslli_q,     VSHIFT, X86ISD::VSHLI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pslli_w,     VSHIFT, X86ISD::VSHLI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pslli_d,     VSHIFT, X86ISD::VSHLI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_pslli_q,     VSHIFT, X86ISD::VSHLI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psrli_w,     VSHIFT, X86ISD::VSRLI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psrli_d,     VSHIFT, X86ISD::VSRLI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psrli_q,     VSHIFT, X86ISD::VSRLI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psrli_w,     VSHIFT, X86ISD::VSRLI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psrli_d,     VSHIFT, X86ISD::VSRLI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psrli_q,     VSHIFT, X86ISD::VSRLI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psrai_w,     VSHIFT, X86ISD::VSRAI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_psrai_d,     VSHIFT, X86ISD::VSRAI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psrai_w,     VSHIFT, X86ISD::VSRAI, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_psrai_d,     VSHIFT, X86ISD::VSRAI, 0);<br>+<br>+  INTRINSIC_WO_CHAIN(x86_avx_vperm2f128_ps_256, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx_vperm2f128_pd_256, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx_vperm2f128_si_256, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0);<br>+  INTRINSIC_WO_CHAIN(x86_avx2_vperm2i128,       INTR_TYPE_3OP, X86ISD::VPERM2X128, 0);<br>+<br>+  INTRINSIC_WO_CHAIN(x86_sse41_insertps,        INTR_TYPE_3OP, X86ISD::INSERTPS, 0);<br>+<br>+  INTRINSIC_WO_CHAIN(x86_sse_comieq_ss,  COMI, X86ISD::COMI, ISD::SETEQ);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_comieq_sd, COMI, X86ISD::COMI, ISD::SETEQ);<br>+  INTRINSIC_WO_CHAIN(x86_sse_comilt_ss,  COMI, X86ISD::COMI, ISD::SETLT);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_comilt_sd, COMI, X86ISD::COMI, ISD::SETLT);<br>+  INTRINSIC_WO_CHAIN(x86_sse_comile_ss,  COMI, X86ISD::COMI, ISD::SETLE);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_comile_sd, COMI, X86ISD::COMI, ISD::SETLE);<br>+  INTRINSIC_WO_CHAIN(x86_sse_comigt_ss,  COMI, X86ISD::COMI, ISD::SETGT);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_comigt_sd, COMI, X86ISD::COMI, ISD::SETGT);<br>+  INTRINSIC_WO_CHAIN(x86_sse_comige_ss,  COMI, X86ISD::COMI, ISD::SETGE);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_comige_sd, COMI, X86ISD::COMI, ISD::SETGE);<br>+  INTRINSIC_WO_CHAIN(x86_sse_comineq_ss, COMI, X86ISD::COMI, ISD::SETNE);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_comineq_sd,COMI, X86ISD::COMI, ISD::SETNE);<br>+<br>+  INTRINSIC_WO_CHAIN(x86_sse_ucomieq_ss,  COMI, X86ISD::UCOMI, ISD::SETEQ);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_ucomieq_sd, COMI, X86ISD::UCOMI, ISD::SETEQ);<br>+  INTRINSIC_WO_CHAIN(x86_sse_ucomilt_ss,  COMI, X86ISD::UCOMI, ISD::SETLT);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_ucomilt_sd, COMI, X86ISD::UCOMI, ISD::SETLT);<br>+  INTRINSIC_WO_CHAIN(x86_sse_ucomile_ss,  COMI, X86ISD::UCOMI, ISD::SETLE);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_ucomile_sd, COMI, X86ISD::UCOMI, ISD::SETLE);<br>+  INTRINSIC_WO_CHAIN(x86_sse_ucomigt_ss,  COMI, X86ISD::UCOMI, ISD::SETGT);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_ucomigt_sd, COMI, X86ISD::UCOMI, ISD::SETGT);<br>+  INTRINSIC_WO_CHAIN(x86_sse_ucomige_ss,  COMI, X86ISD::UCOMI, ISD::SETGE);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_ucomige_sd, COMI, X86ISD::UCOMI, ISD::SETGE);<br>+  INTRINSIC_WO_CHAIN(x86_sse_ucomineq_ss, COMI, X86ISD::UCOMI, ISD::SETNE);<br>+  INTRINSIC_WO_CHAIN(x86_sse2_ucomineq_sd,COMI, X86ISD::UCOMI, ISD::SETNE);<br>+}<br>+<br>+const IntrinsicData* GetIntrinsicWithoutChain(unsigned IntNo) {<br>+  std::map < unsigned, IntrinsicData>::const_iterator itr =<br>+    IntrWithoutChainMap.find(IntNo);<br>+  if (itr == IntrWithoutChainMap.end())<br>+    return NULL;<br>+  return &(itr->second);<br>+}<br>+<br>+// Initialize intrinsics data<br>+void InitIntrinsicTables() {<br>+  InitIntrinsicsWithChain();<br>+  InitIntrinsicsWithoutChain();<br>+}<br>+<br>+<br>+#endif<br><br><br>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank" style="color: purple; text-decoration: underline;">llvm-commits@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank" style="color: purple; text-decoration: underline;">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><o:p></o:p></div></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"> <o:p></o:p></div></div></div></div><p style="margin-right: 0cm; margin-left: 0cm; font-size: 12pt; font-family: 'Times New Roman', serif;">---------------------------------------------------------------------<br>Intel Israel (74) Limited<o:p></o:p></p><p style="margin-right: 0cm; margin-left: 0cm; font-size: 12pt; font-family: 'Times New Roman', serif;">This e-mail and any attachments may contain confidential material for<br>the sole use of the intended recipient(s). Any review or distribution<br>by others is strictly prohibited. If you are not the intended<br>recipient, please contact the sender and delete all copies.<o:p></o:p></p></blockquote></div></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></div></div><p class="MsoNormal" style="margin: 0cm 0cm 12pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><br>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank" style="color: purple; text-decoration: underline;">llvm-commits@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank" style="color: purple; text-decoration: underline;">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><o:p></o:p></p></blockquote></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></div></blockquote></div><div style="margin: 0cm 0cm 0.0001pt; font-size: 12pt; font-family: 'Times New Roman', serif;"><o:p> </o:p></div></div></div></div><p style="margin-right: 0cm; margin-left: 0cm; font-size: 12pt; font-family: 'Times New Roman', serif;">---------------------------------------------------------------------<br>Intel Israel (74) Limited</p><p style="margin-right: 0cm; margin-left: 0cm; font-size: 12pt; font-family: 'Times New Roman', serif;">This e-mail and any attachments may contain confidential material for<br>the sole use of the intended recipient(s). Any review or distribution<br>by others is strictly prohibited. If you are not the intended<br>recipient, please contact the sender and delete all copies.</p><span><intrinsics_map_2.diff></span>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@cs.uiuc.edu" style="color: purple; text-decoration: underline;">llvm-commits@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" style="color: purple; text-decoration: underline;">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br></div></blockquote></div><br></div></body></html>