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</o:shapelayout></xml><![endif]--></head><body lang=EN-GB link=blue vlink=purple><div class=WordSection1><p class=MsoNormal>While experimenting with the PBQP allocator on aarch64, it triggered a bug<o:p></o:p></p><p class=MsoNormal>in AArch64A57FPLoadBalancing.cpp, where an accumulator chain could be<o:p></o:p></p><p class=MsoNormal>reference from different accumulator registers at the same time.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>The attached patch fixes it.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Coming up with a simple testcase is not easy, as this highly depends on<o:p></o:p></p><p class=MsoNormal>what the register allocator is doing: this issue showed up while working<o:p></o:p></p><p class=MsoNormal>with the PBQP allocator, which produced a different allocation scheme.<o:p></o:p></p><p class=MsoNormal>A testcase would need to come up with chain starting in D[0-7], then<o:p></o:p></p><p class=MsoNormal>Moving it to D[8-15], followed by a call to a function whose regmask<o:p></o:p></p><p class=MsoNormal>clobbers the starting accumulator in D[0-7], then another use of the chain.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>I also fixed some formatting and added some invariant checks while there.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Cheers,<o:p></o:p></p><p class=MsoNormal><span style='mso-fareast-language:EN-GB'>--<o:p></o:p></span></p><p class=MsoNormal><span style='mso-fareast-language:EN-GB'>Arnaud A. de Grandmaison<o:p></o:p></span></p><p class=MsoNormal><o:p> </o:p></p></div></body></html>