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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal>Hi,<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>This patch removes edges in the scheduling graph between stores/loads off the same base register if memory accesses do not overlap. We saw an improvement on eembc/automark on a cortex-a53 device, as well as a small improvement on spec2000/eon. No significant performance changes were observed on cortex-a57, but this may be more relevant on in-order architectures. <o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Would this be of interest to anyone? If so, can someone please review?<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Thanks,<o:p></o:p></p><p class=MsoNormal>Sanjin<o:p></o:p></p></div></body></html>