<html><head><meta http-equiv="Content-Type" content="text/html charset=windows-1252"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Thanks Nadav!<div class=""><br class=""></div><div class="">This is <span style="font-family: Menlo; font-size: 11px;" class="">r215904 to </span><span style="font-family: Menlo; font-size: 11px;" class="">r215924.</span></div><div class=""><font face="Menlo" class=""><span style="font-size: 11px;" class=""><br class=""></span></font></div><div class="">-Quentin<br class=""><div><blockquote type="cite" class=""><div class="">On Aug 18, 2014, at 10:07 AM, Nadav Rotem <<a href="mailto:nrotem@apple.com" class="">nrotem@apple.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><meta http-equiv="Content-Type" content="text/html charset=windows-1252" class=""><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class=""><div class="">Thank you for looking at this Quentin. The patch LGTM. </div><br class=""><div style="" class=""><blockquote type="cite" class=""><div class="">On Aug 18, 2014, at 10:06 AM, Quentin Colombet <<a href="mailto:qcolombet@apple.com" class="">qcolombet@apple.com</a>> wrote:</div><br class="Apple-interchange-newline"><div class=""><meta http-equiv="Content-Type" content="text/html charset=windows-1252" class=""><div style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class="">Ping?<div class=""><br class=""></div><div class="">Thanks,</div><div class="">-Quentin<br class=""><div style="" class=""><div class=""><br class=""></div><div class="">On Aug 12, 2014, at 10:04 AM, Quentin Colombet <<a href="mailto:qcolombet@apple.com" class="">qcolombet@apple.com</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite" class=""><div style="font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;" class="">Hi Nadav,<br class=""><br class="">On Aug 12, 2014, at 9:29 AM, Nadav Rotem <<a href="mailto:nrotem@apple.com" class="">nrotem@apple.com</a>> wrote:<br class=""><br class=""><blockquote type="cite" class="">Hi Quentin,<span class="Apple-converted-space"> </span><br class=""><br class="">Sorry for the delay in response. Thanks for taking the time to work on improving the scheduling model for x86.<span class="Apple-converted-space"> </span><br class=""></blockquote><br class="">Thanks for taking a look!<br class=""><br class=""><blockquote type="cite" class=""><br class=""><blockquote type="cite" class="">On Aug 8, 2014, at 5:10 PM, Quentin Colombet <<a href="mailto:qcolombet@apple.com" class="">qcolombet@apple.com</a>> wrote:<br class=""><br class="">Hi,<br class=""><br class="">This series of patches adds an exception for each instruction that diverges from the generic scheduling model.<br class="">It follows the structure of Agner Fog’s instructions tables and provides a patch for each sub-group.<br class=""></blockquote><br class="">Did you use Agner’s tables or the tables from the intel optimization guide?<span class="Apple-converted-space"> </span><br class=""></blockquote><br class="">I used Agner’s tables. As far as I can tell the intel optimization guide is not precise enough for this level of details. Moreover, Agner’s data are based on actual measurements :).<br class=""><br class="">Cheers,<br class="">-Quentin<br class=""><blockquote type="cite" class=""><br class=""><blockquote type="cite" class=""><br class="">Although I had observed changes of the schedule of some test cases in the llvm-testsuite + SPECs, I had not measured anything than noise.<br class="">Note: I have measured both ‘-O3 -march=native' and ‘-Os -march=native’ on a Haswell machine.<br class=""></blockquote><br class="">:(<span class="Apple-converted-space"> </span><br class=""><br class=""><blockquote type="cite" class=""><br class="">Thanks for your reviews.<br class=""><br class="">-Quentin<br class=""><0001-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0002-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0003-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0004-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0005-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0006-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0007-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0008-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0009-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0010-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0011-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0012-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0013-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0014-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0015-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0016-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0017-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0018-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0019-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0020-X86-Haswell-SchedModel-Add-architecture-specific-sch.patch><0021-X86-Haswell-SchedModel-Tidy-up.patch><br class=""></blockquote><br class=""></blockquote><br class=""><br class="">_______________________________________________<br class="">llvm-commits mailing list<br class=""><a href="mailto:llvm-commits@cs.uiuc.edu" class="">llvm-commits@cs.uiuc.edu</a><br class=""><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" class="">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a></div></blockquote></div><br class=""></div></div></div></blockquote></div><br class=""></div></div></blockquote></div><br class=""></div></body></html>