<div dir="ltr"><div><div><div><div>Sorry about that. Let me know if the patch below corrects all problems. <br><br></div>1. I don't think we can use 'CHECK-NEXT' in the ARM cases because the order of the moves to r0 and r1 are not fixed. We can't even use 'CHECK' to confirm both of the #0 and the #-2147483648 move instructions because plain 'CHECK' imposes ordering. Is there another directive that doesn't impose ordering?<br>
</div><br>2. The 'CHECK-NOT' in the ARM cases was requested by Renato. Should the equivalent also go in the X86 tests?<br></div><br>3. The X86 cases are just one instruction + return, so I've added the CHECK-NEXT for 'retq' there.<br>
<br></div>4. I don't think we need to regex the register names in any of these cases. The ABI specifies the return registers, so they are fixed.<br><div><div><br>Index: test/CodeGen/ARM/fabs-neon.ll<br>===================================================================<br>
--- test/CodeGen/ARM/fabs-neon.ll (revision 214897)<br>+++ test/CodeGen/ARM/fabs-neon.ll (working copy)<br>@@ -31,24 +31,26 @@<br> ; We should generate:<br> ; mov r0, #0<br> ; mvn r1, #-2147483648<br>-; mov pc, lr<br>
+; bx lr<br> <br>+define i64 @fabs_v2f32_1() {<br> ; CHECK-LABEL: fabs_v2f32_1<br>-define i64 @fabs_v2f32_1() {<br>+; CHECK: mvn r1, #-2147483648<br>+; CHECK: bx lr<br>+; CHECK-NOT: vabs<br> %bitcast = bitcast i64 18446744069414584320 to <2 x float> ; 0xFFFF_FFFF_0000_0000<br>
%fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)<br> %ret = bitcast <2 x float> %fabs to i64<br> ret i64 %ret<br>-; CHECK: mvn r1, #-2147483648<br>-; CHECK-NOT: vabs<br> }<br> <br>+define i64 @fabs_v2f32_2() {<br>
; CHECK-LABEL: fabs_v2f32_2<br>-define i64 @fabs_v2f32_2() {<br>+; CHECK: mvn r0, #-2147483648<br>+; CHECK: bx lr<br>+; CHECK-NOT: vabs<br> %bitcast = bitcast i64 4294967295 to <2 x float> ; 0x0000_0000_FFFF_FFFF<br>
%fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)<br> %ret = bitcast <2 x float> %fabs to i64<br> ret i64 %ret<br>-; CHECK: mvn r0, #-2147483648<br>-; CHECK-NOT: vabs<br> }<br>Index: test/CodeGen/X86/vec_fabs.ll<br>
===================================================================<br>--- test/CodeGen/X86/vec_fabs.ll (revision 214897)<br>+++ test/CodeGen/X86/vec_fabs.ll (working copy)<br>@@ -54,22 +54,22 @@<br> <br> ; CHECK-LABEL: fabs_v2f32_1<br>
define i64 @fabs_v2f32_1() {<br>+; CHECK: movabsq $9223372032559808512, %rax # imm = 0x7FFFFFFF00000000<br>+; CHECK-NEXT: retq<br> %bitcast = bitcast i64 18446744069414584320 to <2 x float> ; 0xFFFF_FFFF_0000_0000<br>
%fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)<br> %ret = bitcast <2 x float> %fabs to i64<br> ret i64 %ret<br>-; CHECK: movabsq $9223372032559808512, %rax<br>-; # imm = 0x7FFF_FFFF_0000_0000<br>
}<br> <br> ; CHECK-LABEL: fabs_v2f32_2<br> define i64 @fabs_v2f32_2() {<br>+; CHECK: movl $2147483647, %eax # imm = 0x7FFFFFFF<br>+; CHECK-NEXT: retq<br> %bitcast = bitcast i64 4294967295 to <2 x float> ; 0x0000_0000_FFFF_FFFF<br>
%fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %bitcast)<br> %ret = bitcast <2 x float> %fabs to i64<br> ret i64 %ret<br>-; CHECK: movl $2147483647, %eax<br>-; # imm = 0x0000_0000_7FFF_FFFF<br>
}<br></div></div></div><div class="gmail_extra"><br><br><div class="gmail_quote">On Tue, Aug 5, 2014 at 12:41 PM, Chandler Carruth <span dir="ltr"><<a href="mailto:chandlerc@google.com" target="_blank">chandlerc@google.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div class="gmail_extra"><div><div class="h5"><br><div class="gmail_quote">On Tue, Aug 5, 2014 at 10:35 AM, Sanjay Patel <span dir="ltr"><<a href="mailto:spatel@rotateright.com" target="_blank">spatel@rotateright.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div style="overflow:hidden"> ; PR20354: when generating code for a vector <span>fabs</span> op,<br>
-; make sure the correct mask is used for all vector elements.<br>
-; CHECK-LABEL: .LCPI4_0:<br>
-; CHECK-NEXT: .long <a href="tel:2147483647" value="+12147483647" target="_blank">2147483647</a><br>
-; CHECK-NEXT: .long <a href="tel:2147483647" value="+12147483647" target="_blank">2147483647</a><br>
-define i64 @fabs_v2f32(<2 x float> %v) {<br>
-; CHECK-LABEL: fabs_v2f32:<br>
-; CHECK: movabsq $-9223372034707292160, %[[R:r[^ ]+]]<br>
-; CHECK-NEXT: vmovq %[[R]], %[[X:xmm[0-9]+]]<br>
-; CHECK-NEXT: vandps {{.*}}.LCPI4_0{{.*}}, %[[X]], %[[X]]<br>
-; CHECK-NEXT: vmovq %[[X]], %rax<br>
-; CHECK-NEXT: retq<br>
- %highbits = bitcast i64 9223372039002259456 to <2 x float> ; 0x8000_0000_8000_0000<br>
- %<span>fabs</span> = call <2 x float> @llvm.<span>fabs</span>.v2f32(<2 x float> %highbits)<br>
- %ret = bitcast <2 x float> %<span>fabs</span> to i64<br>
- ret i64 %ret<br>
+; make sure that we're only turning off the sign bit of each float value.<br>
+; No constant pool loads or vector ops are needed for the <span>fabs</span> of a<br>
+; bitcasted integer constant; we should just return an integer constant<br>
+; that has the sign bits turned off.<br>
+;<br>
+; So instead of something like this:<br>
+; movabsq (constant pool load of mask for sign bits)<br>
+; vmovq (move from integer register to vector/fp register)<br>
+; vandps (mask off sign bits)<br>
+; vmovq (move vector/fp register back to integer return register)<br>
+;<br>
+; We should generate:<br>
+; mov (put constant value in return register)<br>
+<br>
+; CHECK-LABEL: fabs_v2f32_1<br>
+define i64 @fabs_v2f32_1() {<br>
+ %bitcast = bitcast i64 18446744069414584320 to <2 x float> ; 0xFFFF_FFFF_0000_0000<br>
+ %<span>fabs</span> = call <2 x float> @llvm.<span>fabs</span>.v2f32(<2 x float> %bitcast)<br>
+ %ret = bitcast <2 x float> %<span>fabs</span> to i64<br>
+ ret i64 %ret<br>
+; CHECK: movabsq $9223372032559808512, %rax<br>
+; # imm = 0x7FFF_FFFF_0000_0000<br>
+}</div></blockquote></div><br></div></div>I would strongly prefer that you follow the style of FileCheck patterns I used. Specifically, please check the entire sequence of instructions.</div><div class="gmail_extra"><br>
</div><div class="gmail_extra">
Also, rather than the weird '# imm' comment, I think we should just check the verbose asm comment that produces the readable hex form. Using FileCheck against the verbose asm comments just leads to more readable and maintainable tests, even if its good to not always rely on them (in case they contain a bug somehow).</div>
</div>
</blockquote></div><br></div>