<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;"><br><div><div>On Jun 17, 2014, at 10:05 AM, Matt Arsenault <<a href="mailto:Matthew.Arsenault@amd.com">Matthew.Arsenault@amd.com</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div style="font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;">On 06/17/2014 07:10 AM, Tom Stellard wrote:<br><blockquote type="cite">On Tue, Jun 17, 2014 at 12:28:14AM +0000, Matt Arsenault wrote:<br><blockquote type="cite">These will be used in the implementations of custom lowering of and library implementations of various math functions, so it's useful to expose these as builtins.<br><br><a href="http://reviews.llvm.org/D4168">http://reviews.llvm.org/D4168</a><br><br>Files:<br> include/llvm/IR/IntrinsicsR600.td<br> lib/Target/R600/AMDGPUISelLowering.cpp<br> lib/Target/R600/AMDGPUISelLowering.h<br> lib/Target/R600/AMDGPUInstrInfo.td<br> lib/Target/R600/AMDGPUInstructions.td<br> lib/Target/R600/AMDGPUIntrinsics.td<br> lib/Target/R600/SIInsertWaits.cpp<br> lib/Target/R600/SIInstructions.td<br> lib/Transforms/InstCombine/InstCombineCalls.cpp<br> test/CodeGen/R600/llvm.AMDGPU.div_fixup.ll<br> test/CodeGen/R600/llvm.AMDGPU.div_fmas.ll<br> test/CodeGen/R600/llvm.AMDGPU.div_scale.ll<br> test/CodeGen/R600/llvm.AMDGPU.rcp.ll<br> test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll<br> test/Transforms/InstCombine/r600-intrinsics.ll<br>Index: include/llvm/IR/IntrinsicsR600.td<br>===================================================================<br>--- include/llvm/IR/IntrinsicsR600.td<br>+++ include/llvm/IR/IntrinsicsR600.td<br>@@ -33,4 +33,34 @@<br> "__builtin_r600_read_tgid">;<br> defm int_r600_read_tidig : R600ReadPreloadRegisterIntrinsic_xyz <<br> "__builtin_r600_read_tidig">;<br>+<br> } // End TargetPrefix = "r600"<br>+<br>+let TargetPrefix = "AMDGPU" in {<br>+def int_AMDGPU_div_scale :<br>+ Intrinsic<[llvm_anyfloat_ty, llvm_i1_ty],<br>+ [LLVMMatchType<0>, LLVMMatchType<0>], [IntrNoMem]>,<br>+ GCCBuiltin<"__builtin_r600_div_scale">;<br></blockquote>I think we should replace the r600 in the builtin name with amdgpu, this will<br>prevent some confusion about what hardware is supported on.<br><br></blockquote></div></blockquote></div><br><div>I think some (maybe all) of these are for SI+ only</div></body></html>