<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;">LGTM. <div><br><div style=""><div>On Apr 25, 2014, at 12:59 PM, Michael Spencer <<a href="mailto:bigcheesegs@gmail.com">bigcheesegs@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div style="font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-stroke-width: 0px;">On Fri, Apr 25, 2014 at 9:43 AM, Andrea Di Biagio<br><<a href="mailto:andrea.dibiagio@gmail.com">andrea.dibiagio@gmail.com</a>> wrote:<br><blockquote type="cite">Hi,<br><br>this patch extends the fix committed at revision 20758<br>(<a href="http://llvm.org/viewvc/llvm-project?view=revision&revision=207058">http://llvm.org/viewvc/llvm-project?view=revision&revision=207058</a>) to<br>also teach InstCombine how to fold calls to SSE2/AVX2 packed logical<br>shift right intrinsics.<br><br>A packed logical shift right with a shift count bigger than or equal<br>to the element size always produces a zero vector. In all other cases,<br>it can be safely replaced by a 'lshr' instruction.<br><br>Please let me know if ok to submit.<br><br>Thanks,<br>Andrea Di Biagio<br>SN Systems - Sony Computer Entertainment Group.<br></blockquote><br>lgtm.<br><br>- Michael Spencer<br>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a></div></blockquote></div><br></div></body></html>