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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">I have even more problems with i1 scalar type which became legal in AVX-512.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">“store i1” writes 8 bits to memory. Nobody expects that “store i1” will be done as<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">load i8 -> set LSB -> store i8<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">am I right?<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<![if !supportLists]><span style="font-family:"Calibri","sans-serif";color:#31849B"><span style="mso-list:Ignore">-<span style="font:7.0pt "Times New Roman"">
</span></span></span><![endif]><span dir="LTR"></span><b><i><span style="color:#31849B"> Elena<o:p></o:p></span></i></b></p>
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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Nadav Rotem [mailto:nrotem@apple.com]
<br>
<b>Sent:</b> Wednesday, April 09, 2014 23:30<br>
<b>To:</b> Hal Finkel<br>
<b>Cc:</b> Duncan Sands; llvm-commits@cs.uiuc.edu; Demikhovsky, Elena<br>
<b>Subject:</b> Re: i1 vectors (Re: [PATCH] Fix PR15267)<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">On Apr 9, 2014, at 1:28 PM, Hal Finkel <<a href="mailto:hfinkel@anl.gov">hfinkel@anl.gov</a>> wrote:<o:p></o:p></p>
</div>
<p class="MsoNormal"><br>
<br>
<o:p></o:p></p>
<div>
<p class="MsoNormal"><span style="font-size:9.0pt">----- Original Message -----<br>
<br>
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt">From: "Nadav Rotem" <<a href="mailto:nrotem@apple.com">nrotem@apple.com</a>><br>
To: "Hal Finkel" <<a href="mailto:hfinkel@anl.gov">hfinkel@anl.gov</a>><br>
Cc: "Duncan Sands" <<a href="mailto:baldrick@free.fr">baldrick@free.fr</a>>, <a href="mailto:llvm-commits@cs.uiuc.edu">
llvm-commits@cs.uiuc.edu</a>, "Elena Demikhovsky" <<a href="mailto:elena.demikhovsky@intel.com">elena.demikhovsky@intel.com</a>><br>
Sent: Wednesday, April 9, 2014 3:20:04 PM<br>
Subject: Re: i1 vectors (Re: [PATCH] Fix PR15267)<br>
<br>
<br>
On Apr 9, 2014, at 1:15 PM, Hal Finkel <<a href="mailto:hfinkel@anl.gov">hfinkel@anl.gov</a>> wrote:<br>
<br>
<br>
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt">----- Original Message -----<br>
<br>
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt">From: "Duncan Sands" <<a href="mailto:baldrick@free.fr">baldrick@free.fr</a>><br>
To: "Hal Finkel" <<a href="mailto:hfinkel@anl.gov">hfinkel@anl.gov</a>><br>
Cc: <a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a>, "Nadav Rotem" <<a href="mailto:nrotem@apple.com">nrotem@apple.com</a>><br>
Sent: Wednesday, February 20, 2013 11:38:45 AM<br>
Subject: Re: [PATCH] Fix PR15267<br>
<br>
Hi Hal,<br>
<br>
<br>
<o:p></o:p></span></p>
<blockquote style="margin-top:5.0pt;margin-bottom:5.0pt">
<blockquote style="margin-top:5.0pt;margin-bottom:5.0pt">
<blockquote style="margin-top:5.0pt;margin-bottom:5.0pt">
<p class="MsoNormal"><span style="font-size:9.0pt">it sounds like you consider <4 x i1> to be bitpacked in<br>
memory,<br>
like i4.<br>
Is that right?<o:p></o:p></span></p>
</blockquote>
<p class="MsoNormal"><span style="font-size:9.0pt"><br>
Yes. We need this in order to be consistent with targets that<br>
support mask<br>
registers.<o:p></o:p></span></p>
</blockquote>
<p class="MsoNormal"><span style="font-size:9.0pt"><br>
while it makes sense to me, can you please document this<br>
somewhere<br>
and ensure<br>
that getTypeAllocSize and friends are fixed (should return 1<br>
byte!).<o:p></o:p></span></p>
</blockquote>
<p class="MsoNormal"><span style="font-size:9.0pt"><br>
Also, we need to make sure that global constants are emitted<br>
correctly. Currently, if you make a <N x i1> global constant, it<br>
will emit each element into a separate byte.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt"><br>
all kinds of codegen stuff is broken for these types. However<br>
even<br>
before<br>
getting as far as codegen, there are issues at the IR level (type<br>
sizes as<br>
I mentioned, and also passes that get it wrong for these types).<br>
Someone<br>
really needs to audit the IR carefully (I would volunteer but I<br>
don't<br>
think<br>
I have time), and then take a careful look at codegen<br>
(particularly<br>
the type<br>
legalization logic; I'm probably the right guy to do that,<br>
but...).<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-bottom:12.0pt"><span style="font-size:9.0pt"><br>
To bring this up again, I'm becoming increasingly nervous, seeing<br>
all of the i1 vector support, not only in AVX but also in AVX-512,<br>
going into the x86 backend while this has not yet been addressed.<br>
<br>
I think that either we should come up with a definitive plan for<br>
dealing with this, or we should forbid outright the<br>
loading/storing of i1 vectors until we do. The in-register<br>
representations of the i1 vectors, as far as I can tell, is fine<br>
(so long as the backend provides a self-consistent implementation<br>
of build_vector, extract_elemt, etc.). However, providing i1<br>
vectors in their current state, as part of the general LLVM IR<br>
interface, with an exposed yet inconsistent memory representation,<br>
feels like asking for trouble.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt"><br>
I think that at this point the representation of i1 vectors is clear.<br>
i1s are bit packed in memory. When AVX512 masks are saved to memory<br>
they are copied as-is. When an AVX mask are saved to memory they<br>
need to be packed. At the moment we have a bug in the code that<br>
packs i1s into memory. But this can be fixed. With the exception of<br>
the load/store bug everything else already works.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt"><br>
Globals, at least, are still broken:<br>
<br>
$ cat /tmp/g.ll<span class="apple-converted-space"> </span><br>
@Q = global <4 x i1> <i1 0, i1 undef, i1 1, i1 1>, align 16<br>
<br>
$ llc -mtriple=x86_64-pc-linux -mcpu=corei7-avx < /tmp/g.ll<span class="apple-converted-space"> </span><br>
<span class="apple-tab-span"> </span>.text<br>
<span class="apple-tab-span"> </span>.file<span class="apple-tab-span">
</span>"<stdin>"<br>
<span class="apple-tab-span"> </span>.type<span class="apple-tab-span">
</span>Q,@object # @Q<br>
<span class="apple-tab-span"> </span>.data<br>
<span class="apple-tab-span"> </span>.globl<span class="apple-tab-span">
</span>Q<br>
<span class="apple-tab-span"> </span>.align<span class="apple-tab-span">
</span>16<br>
Q:<br>
<span class="apple-tab-span"> </span>.byte<span class="apple-tab-span">
</span>0 # 0x0<br>
<span class="apple-tab-span"> </span>.zero<span class="apple-tab-span">
</span>1<br>
<span class="apple-tab-span"> </span>.byte<span class="apple-tab-span">
</span>1 # 0x1<br>
<span class="apple-tab-span"> </span>.byte<span class="apple-tab-span">
</span>1 # 0x1<br>
<span class="apple-tab-span"> </span>.size<span class="apple-tab-span">
</span>Q, 4<br>
<br>
And so if you try to load from this value then you'll obviously have a problem. Is this what you were talking about, or are you referring to something else?<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">I forgot about globals. Yes, this is also a problem. I meant that SelectionDAGLegalize::LegalizeLoadOps and SelectionDAGLegalize::LegalizeStoreOps don’t know how to pack i1 vectors.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><br>
<br>
<o:p></o:p></p>
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<p class="MsoNormal"><span style="font-size:9.0pt"><br>
-Hal<br>
<br>
<br>
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt"><br>
<br>
<br>
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt">-Hal<br>
<br>
<br>
<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-bottom:12.0pt"><span style="font-size:9.0pt"><br>
Ciao, Duncan.<br>
<br>
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt"><br>
--<br>
Hal Finkel<br>
Assistant Computational Scientist<br>
Leadership Computing Facility<br>
Argonne National Laboratory<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-bottom:12.0pt"><span style="font-size:9.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt"><br>
--<span class="apple-converted-space"> </span><br>
Hal Finkel<br>
Assistant Computational Scientist<br>
Leadership Computing Facility<br>
Argonne National Laboratory<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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