<div dir="ltr">Doesn't this require an implementation of TargetInstrInfo::findCommutedOpIndices?</div><div class="gmail_extra"><br><br><div class="gmail_quote">On Wed, Apr 2, 2014 at 3:06 PM, Lang Hames <span dir="ltr"><<a href="mailto:lhames@gmail.com" target="_blank">lhames@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: lhames<br>
Date: Wed Apr 2 17:06:16 2014<br>
New Revision: 205472<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=205472&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=205472&view=rev</a><br>
Log:<br>
[X86] Make the VFMA*231 variants commutable and relax the alignment restrictions<br>
on FMA3 memory operands. FMA3 instructions are VEX encoded, so they can load<br>
from unaligned memory.<br>
<br>
Testcase to follow, along with related patch.<br>
<br>
<rdar://problem/16478629><br>
<br>
<br>
Modified:<br>
llvm/trunk/lib/Target/X86/X86InstrFMA.td<br>
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86InstrFMA.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFMA.td?rev=205472&r1=205471&r2=205472&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFMA.td?rev=205472&r1=205471&r2=205472&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86InstrFMA.td (original)<br>
+++ llvm/trunk/lib/Target/X86/X86InstrFMA.td Wed Apr 2 17:06:16 2014<br>
@@ -67,6 +67,7 @@ let neverHasSideEffects = 1 in {<br>
defm r132 : fma3p_rm<opc132,<br>
!strconcat(OpcodeStr, "132", PackTy),<br>
MemFrag128, MemFrag256, OpTy128, OpTy256>;<br>
+ let isCommutable = 1 in<br>
defm r231 : fma3p_rm<opc231,<br>
!strconcat(OpcodeStr, "231", PackTy),<br>
MemFrag128, MemFrag256, OpTy128, OpTy256>;<br>
@@ -146,6 +147,7 @@ multiclass fma3s_forms<bits<8> opc132, b<br>
let neverHasSideEffects = 1 in {<br>
defm r132 : fma3s_rm<opc132, !strconcat(OpStr, "132", PackTy),<br>
x86memop, RC, OpVT, mem_frag>;<br>
+ let isCommutable = 1 in<br>
defm r231 : fma3s_rm<opc231, !strconcat(OpStr, "231", PackTy),<br>
x86memop, RC, OpVT, mem_frag>;<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=205472&r1=205471&r2=205472&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=205472&r1=205471&r2=205472&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Wed Apr 2 17:06:16 2014<br>
@@ -1282,111 +1282,111 @@ X86InstrInfo::X86InstrInfo(X86TargetMach<br>
<br>
static const X86OpTblEntry OpTbl3[] = {<br>
// FMA foldable instructions<br>
- { X86::VFMADDSSr231r, X86::VFMADDSSr231m, 0 },<br>
- { X86::VFMADDSDr231r, X86::VFMADDSDr231m, 0 },<br>
- { X86::VFMADDSSr132r, X86::VFMADDSSr132m, 0 },<br>
- { X86::VFMADDSDr132r, X86::VFMADDSDr132m, 0 },<br>
- { X86::VFMADDSSr213r, X86::VFMADDSSr213m, 0 },<br>
- { X86::VFMADDSDr213r, X86::VFMADDSDr213m, 0 },<br>
-<br>
- { X86::VFMADDPSr231r, X86::VFMADDPSr231m, TB_ALIGN_16 },<br>
- { X86::VFMADDPDr231r, X86::VFMADDPDr231m, TB_ALIGN_16 },<br>
- { X86::VFMADDPSr132r, X86::VFMADDPSr132m, TB_ALIGN_16 },<br>
- { X86::VFMADDPDr132r, X86::VFMADDPDr132m, TB_ALIGN_16 },<br>
- { X86::VFMADDPSr213r, X86::VFMADDPSr213m, TB_ALIGN_16 },<br>
- { X86::VFMADDPDr213r, X86::VFMADDPDr213m, TB_ALIGN_16 },<br>
- { X86::VFMADDPSr231rY, X86::VFMADDPSr231mY, TB_ALIGN_32 },<br>
- { X86::VFMADDPDr231rY, X86::VFMADDPDr231mY, TB_ALIGN_32 },<br>
- { X86::VFMADDPSr132rY, X86::VFMADDPSr132mY, TB_ALIGN_32 },<br>
- { X86::VFMADDPDr132rY, X86::VFMADDPDr132mY, TB_ALIGN_32 },<br>
- { X86::VFMADDPSr213rY, X86::VFMADDPSr213mY, TB_ALIGN_32 },<br>
- { X86::VFMADDPDr213rY, X86::VFMADDPDr213mY, TB_ALIGN_32 },<br>
-<br>
- { X86::VFNMADDSSr231r, X86::VFNMADDSSr231m, 0 },<br>
- { X86::VFNMADDSDr231r, X86::VFNMADDSDr231m, 0 },<br>
- { X86::VFNMADDSSr132r, X86::VFNMADDSSr132m, 0 },<br>
- { X86::VFNMADDSDr132r, X86::VFNMADDSDr132m, 0 },<br>
- { X86::VFNMADDSSr213r, X86::VFNMADDSSr213m, 0 },<br>
- { X86::VFNMADDSDr213r, X86::VFNMADDSDr213m, 0 },<br>
-<br>
- { X86::VFNMADDPSr231r, X86::VFNMADDPSr231m, TB_ALIGN_16 },<br>
- { X86::VFNMADDPDr231r, X86::VFNMADDPDr231m, TB_ALIGN_16 },<br>
- { X86::VFNMADDPSr132r, X86::VFNMADDPSr132m, TB_ALIGN_16 },<br>
- { X86::VFNMADDPDr132r, X86::VFNMADDPDr132m, TB_ALIGN_16 },<br>
- { X86::VFNMADDPSr213r, X86::VFNMADDPSr213m, TB_ALIGN_16 },<br>
- { X86::VFNMADDPDr213r, X86::VFNMADDPDr213m, TB_ALIGN_16 },<br>
- { X86::VFNMADDPSr231rY, X86::VFNMADDPSr231mY, TB_ALIGN_32 },<br>
- { X86::VFNMADDPDr231rY, X86::VFNMADDPDr231mY, TB_ALIGN_32 },<br>
- { X86::VFNMADDPSr132rY, X86::VFNMADDPSr132mY, TB_ALIGN_32 },<br>
- { X86::VFNMADDPDr132rY, X86::VFNMADDPDr132mY, TB_ALIGN_32 },<br>
- { X86::VFNMADDPSr213rY, X86::VFNMADDPSr213mY, TB_ALIGN_32 },<br>
- { X86::VFNMADDPDr213rY, X86::VFNMADDPDr213mY, TB_ALIGN_32 },<br>
-<br>
- { X86::VFMSUBSSr231r, X86::VFMSUBSSr231m, 0 },<br>
- { X86::VFMSUBSDr231r, X86::VFMSUBSDr231m, 0 },<br>
- { X86::VFMSUBSSr132r, X86::VFMSUBSSr132m, 0 },<br>
- { X86::VFMSUBSDr132r, X86::VFMSUBSDr132m, 0 },<br>
- { X86::VFMSUBSSr213r, X86::VFMSUBSSr213m, 0 },<br>
- { X86::VFMSUBSDr213r, X86::VFMSUBSDr213m, 0 },<br>
-<br>
- { X86::VFMSUBPSr231r, X86::VFMSUBPSr231m, TB_ALIGN_16 },<br>
- { X86::VFMSUBPDr231r, X86::VFMSUBPDr231m, TB_ALIGN_16 },<br>
- { X86::VFMSUBPSr132r, X86::VFMSUBPSr132m, TB_ALIGN_16 },<br>
- { X86::VFMSUBPDr132r, X86::VFMSUBPDr132m, TB_ALIGN_16 },<br>
- { X86::VFMSUBPSr213r, X86::VFMSUBPSr213m, TB_ALIGN_16 },<br>
- { X86::VFMSUBPDr213r, X86::VFMSUBPDr213m, TB_ALIGN_16 },<br>
- { X86::VFMSUBPSr231rY, X86::VFMSUBPSr231mY, TB_ALIGN_32 },<br>
- { X86::VFMSUBPDr231rY, X86::VFMSUBPDr231mY, TB_ALIGN_32 },<br>
- { X86::VFMSUBPSr132rY, X86::VFMSUBPSr132mY, TB_ALIGN_32 },<br>
- { X86::VFMSUBPDr132rY, X86::VFMSUBPDr132mY, TB_ALIGN_32 },<br>
- { X86::VFMSUBPSr213rY, X86::VFMSUBPSr213mY, TB_ALIGN_32 },<br>
- { X86::VFMSUBPDr213rY, X86::VFMSUBPDr213mY, TB_ALIGN_32 },<br>
-<br>
- { X86::VFNMSUBSSr231r, X86::VFNMSUBSSr231m, 0 },<br>
- { X86::VFNMSUBSDr231r, X86::VFNMSUBSDr231m, 0 },<br>
- { X86::VFNMSUBSSr132r, X86::VFNMSUBSSr132m, 0 },<br>
- { X86::VFNMSUBSDr132r, X86::VFNMSUBSDr132m, 0 },<br>
- { X86::VFNMSUBSSr213r, X86::VFNMSUBSSr213m, 0 },<br>
- { X86::VFNMSUBSDr213r, X86::VFNMSUBSDr213m, 0 },<br>
-<br>
- { X86::VFNMSUBPSr231r, X86::VFNMSUBPSr231m, TB_ALIGN_16 },<br>
- { X86::VFNMSUBPDr231r, X86::VFNMSUBPDr231m, TB_ALIGN_16 },<br>
- { X86::VFNMSUBPSr132r, X86::VFNMSUBPSr132m, TB_ALIGN_16 },<br>
- { X86::VFNMSUBPDr132r, X86::VFNMSUBPDr132m, TB_ALIGN_16 },<br>
- { X86::VFNMSUBPSr213r, X86::VFNMSUBPSr213m, TB_ALIGN_16 },<br>
- { X86::VFNMSUBPDr213r, X86::VFNMSUBPDr213m, TB_ALIGN_16 },<br>
- { X86::VFNMSUBPSr231rY, X86::VFNMSUBPSr231mY, TB_ALIGN_32 },<br>
- { X86::VFNMSUBPDr231rY, X86::VFNMSUBPDr231mY, TB_ALIGN_32 },<br>
- { X86::VFNMSUBPSr132rY, X86::VFNMSUBPSr132mY, TB_ALIGN_32 },<br>
- { X86::VFNMSUBPDr132rY, X86::VFNMSUBPDr132mY, TB_ALIGN_32 },<br>
- { X86::VFNMSUBPSr213rY, X86::VFNMSUBPSr213mY, TB_ALIGN_32 },<br>
- { X86::VFNMSUBPDr213rY, X86::VFNMSUBPDr213mY, TB_ALIGN_32 },<br>
-<br>
- { X86::VFMADDSUBPSr231r, X86::VFMADDSUBPSr231m, TB_ALIGN_16 },<br>
- { X86::VFMADDSUBPDr231r, X86::VFMADDSUBPDr231m, TB_ALIGN_16 },<br>
- { X86::VFMADDSUBPSr132r, X86::VFMADDSUBPSr132m, TB_ALIGN_16 },<br>
- { X86::VFMADDSUBPDr132r, X86::VFMADDSUBPDr132m, TB_ALIGN_16 },<br>
- { X86::VFMADDSUBPSr213r, X86::VFMADDSUBPSr213m, TB_ALIGN_16 },<br>
- { X86::VFMADDSUBPDr213r, X86::VFMADDSUBPDr213m, TB_ALIGN_16 },<br>
- { X86::VFMADDSUBPSr231rY, X86::VFMADDSUBPSr231mY, TB_ALIGN_32 },<br>
- { X86::VFMADDSUBPDr231rY, X86::VFMADDSUBPDr231mY, TB_ALIGN_32 },<br>
- { X86::VFMADDSUBPSr132rY, X86::VFMADDSUBPSr132mY, TB_ALIGN_32 },<br>
- { X86::VFMADDSUBPDr132rY, X86::VFMADDSUBPDr132mY, TB_ALIGN_32 },<br>
- { X86::VFMADDSUBPSr213rY, X86::VFMADDSUBPSr213mY, TB_ALIGN_32 },<br>
- { X86::VFMADDSUBPDr213rY, X86::VFMADDSUBPDr213mY, TB_ALIGN_32 },<br>
-<br>
- { X86::VFMSUBADDPSr231r, X86::VFMSUBADDPSr231m, TB_ALIGN_16 },<br>
- { X86::VFMSUBADDPDr231r, X86::VFMSUBADDPDr231m, TB_ALIGN_16 },<br>
- { X86::VFMSUBADDPSr132r, X86::VFMSUBADDPSr132m, TB_ALIGN_16 },<br>
- { X86::VFMSUBADDPDr132r, X86::VFMSUBADDPDr132m, TB_ALIGN_16 },<br>
- { X86::VFMSUBADDPSr213r, X86::VFMSUBADDPSr213m, TB_ALIGN_16 },<br>
- { X86::VFMSUBADDPDr213r, X86::VFMSUBADDPDr213m, TB_ALIGN_16 },<br>
- { X86::VFMSUBADDPSr231rY, X86::VFMSUBADDPSr231mY, TB_ALIGN_32 },<br>
- { X86::VFMSUBADDPDr231rY, X86::VFMSUBADDPDr231mY, TB_ALIGN_32 },<br>
- { X86::VFMSUBADDPSr132rY, X86::VFMSUBADDPSr132mY, TB_ALIGN_32 },<br>
- { X86::VFMSUBADDPDr132rY, X86::VFMSUBADDPDr132mY, TB_ALIGN_32 },<br>
- { X86::VFMSUBADDPSr213rY, X86::VFMSUBADDPSr213mY, TB_ALIGN_32 },<br>
- { X86::VFMSUBADDPDr213rY, X86::VFMSUBADDPDr213mY, TB_ALIGN_32 },<br>
+ { X86::VFMADDSSr231r, X86::VFMADDSSr231m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSDr231r, X86::VFMADDSDr231m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSSr132r, X86::VFMADDSSr132m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSDr132r, X86::VFMADDSDr132m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSSr213r, X86::VFMADDSSr213m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSDr213r, X86::VFMADDSDr213m, TB_ALIGN_NONE },<br>
+<br>
+ { X86::VFMADDPSr231r, X86::VFMADDPSr231m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDPDr231r, X86::VFMADDPDr231m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDPSr132r, X86::VFMADDPSr132m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDPDr132r, X86::VFMADDPDr132m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDPSr213r, X86::VFMADDPSr213m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDPDr213r, X86::VFMADDPDr213m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDPSr231rY, X86::VFMADDPSr231mY, TB_ALIGN_NONE },<br>
+ { X86::VFMADDPDr231rY, X86::VFMADDPDr231mY, TB_ALIGN_NONE },<br>
+ { X86::VFMADDPSr132rY, X86::VFMADDPSr132mY, TB_ALIGN_NONE },<br>
+ { X86::VFMADDPDr132rY, X86::VFMADDPDr132mY, TB_ALIGN_NONE },<br>
+ { X86::VFMADDPSr213rY, X86::VFMADDPSr213mY, TB_ALIGN_NONE },<br>
+ { X86::VFMADDPDr213rY, X86::VFMADDPDr213mY, TB_ALIGN_NONE },<br>
+<br>
+ { X86::VFNMADDSSr231r, X86::VFNMADDSSr231m, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDSDr231r, X86::VFNMADDSDr231m, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDSSr132r, X86::VFNMADDSSr132m, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDSDr132r, X86::VFNMADDSDr132m, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDSSr213r, X86::VFNMADDSSr213m, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDSDr213r, X86::VFNMADDSDr213m, TB_ALIGN_NONE },<br>
+<br>
+ { X86::VFNMADDPSr231r, X86::VFNMADDPSr231m, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDPDr231r, X86::VFNMADDPDr231m, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDPSr132r, X86::VFNMADDPSr132m, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDPDr132r, X86::VFNMADDPDr132m, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDPSr213r, X86::VFNMADDPSr213m, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDPDr213r, X86::VFNMADDPDr213m, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDPSr231rY, X86::VFNMADDPSr231mY, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDPDr231rY, X86::VFNMADDPDr231mY, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDPSr132rY, X86::VFNMADDPSr132mY, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDPDr132rY, X86::VFNMADDPDr132mY, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDPSr213rY, X86::VFNMADDPSr213mY, TB_ALIGN_NONE },<br>
+ { X86::VFNMADDPDr213rY, X86::VFNMADDPDr213mY, TB_ALIGN_NONE },<br>
+<br>
+ { X86::VFMSUBSSr231r, X86::VFMSUBSSr231m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBSDr231r, X86::VFMSUBSDr231m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBSSr132r, X86::VFMSUBSSr132m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBSDr132r, X86::VFMSUBSDr132m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBSSr213r, X86::VFMSUBSSr213m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBSDr213r, X86::VFMSUBSDr213m, TB_ALIGN_NONE },<br>
+<br>
+ { X86::VFMSUBPSr231r, X86::VFMSUBPSr231m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBPDr231r, X86::VFMSUBPDr231m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBPSr132r, X86::VFMSUBPSr132m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBPDr132r, X86::VFMSUBPDr132m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBPSr213r, X86::VFMSUBPSr213m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBPDr213r, X86::VFMSUBPDr213m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBPSr231rY, X86::VFMSUBPSr231mY, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBPDr231rY, X86::VFMSUBPDr231mY, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBPSr132rY, X86::VFMSUBPSr132mY, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBPDr132rY, X86::VFMSUBPDr132mY, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBPSr213rY, X86::VFMSUBPSr213mY, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBPDr213rY, X86::VFMSUBPDr213mY, TB_ALIGN_NONE },<br>
+<br>
+ { X86::VFNMSUBSSr231r, X86::VFNMSUBSSr231m, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBSDr231r, X86::VFNMSUBSDr231m, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBSSr132r, X86::VFNMSUBSSr132m, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBSDr132r, X86::VFNMSUBSDr132m, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBSSr213r, X86::VFNMSUBSSr213m, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBSDr213r, X86::VFNMSUBSDr213m, TB_ALIGN_NONE },<br>
+<br>
+ { X86::VFNMSUBPSr231r, X86::VFNMSUBPSr231m, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBPDr231r, X86::VFNMSUBPDr231m, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBPSr132r, X86::VFNMSUBPSr132m, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBPDr132r, X86::VFNMSUBPDr132m, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBPSr213r, X86::VFNMSUBPSr213m, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBPDr213r, X86::VFNMSUBPDr213m, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBPSr231rY, X86::VFNMSUBPSr231mY, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBPDr231rY, X86::VFNMSUBPDr231mY, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBPSr132rY, X86::VFNMSUBPSr132mY, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBPDr132rY, X86::VFNMSUBPDr132mY, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBPSr213rY, X86::VFNMSUBPSr213mY, TB_ALIGN_NONE },<br>
+ { X86::VFNMSUBPDr213rY, X86::VFNMSUBPDr213mY, TB_ALIGN_NONE },<br>
+<br>
+ { X86::VFMADDSUBPSr231r, X86::VFMADDSUBPSr231m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSUBPDr231r, X86::VFMADDSUBPDr231m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSUBPSr132r, X86::VFMADDSUBPSr132m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSUBPDr132r, X86::VFMADDSUBPDr132m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSUBPSr213r, X86::VFMADDSUBPSr213m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSUBPDr213r, X86::VFMADDSUBPDr213m, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSUBPSr231rY, X86::VFMADDSUBPSr231mY, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSUBPDr231rY, X86::VFMADDSUBPDr231mY, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSUBPSr132rY, X86::VFMADDSUBPSr132mY, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSUBPDr132rY, X86::VFMADDSUBPDr132mY, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSUBPSr213rY, X86::VFMADDSUBPSr213mY, TB_ALIGN_NONE },<br>
+ { X86::VFMADDSUBPDr213rY, X86::VFMADDSUBPDr213mY, TB_ALIGN_NONE },<br>
+<br>
+ { X86::VFMSUBADDPSr231r, X86::VFMSUBADDPSr231m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBADDPDr231r, X86::VFMSUBADDPDr231m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBADDPSr132r, X86::VFMSUBADDPSr132m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBADDPDr132r, X86::VFMSUBADDPDr132m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBADDPSr213r, X86::VFMSUBADDPSr213m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBADDPDr213r, X86::VFMSUBADDPDr213m, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBADDPSr231rY, X86::VFMSUBADDPSr231mY, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBADDPDr231rY, X86::VFMSUBADDPDr231mY, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBADDPSr132rY, X86::VFMSUBADDPSr132mY, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBADDPDr132rY, X86::VFMSUBADDPDr132mY, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBADDPSr213rY, X86::VFMSUBADDPSr213mY, TB_ALIGN_NONE },<br>
+ { X86::VFMSUBADDPDr213rY, X86::VFMSUBADDPDr213mY, TB_ALIGN_NONE },<br>
<br>
// FMA4 foldable patterns<br>
{ X86::VFMADDSS4rr, X86::VFMADDSS4rm, 0 },<br>
@@ -2457,7 +2457,46 @@ X86InstrInfo::commuteInstruction(Machine<br>
NewMI = false;<br>
}<br>
MI->setDesc(get(Opc));<br>
- // Fallthrough intended.<br>
+ return TargetInstrInfo::commuteInstruction(MI, NewMI);<br>
+ }<br>
+ case X86::VFMADDPDr231r:<br>
+ case X86::VFMADDPSr231r:<br>
+ case X86::VFMADDSDr231r:<br>
+ case X86::VFMADDSSr231r:<br>
+ case X86::VFMSUBPDr231r:<br>
+ case X86::VFMSUBPSr231r:<br>
+ case X86::VFMSUBSDr231r:<br>
+ case X86::VFMSUBSSr231r:<br>
+ case X86::VFNMADDPDr231r:<br>
+ case X86::VFNMADDPSr231r:<br>
+ case X86::VFNMADDSDr231r:<br>
+ case X86::VFNMADDSSr231r:<br>
+ case X86::VFNMSUBPDr231r:<br>
+ case X86::VFNMSUBPSr231r:<br>
+ case X86::VFNMSUBSDr231r:<br>
+ case X86::VFNMSUBSSr231r:<br>
+ case X86::VFMADDPDr231rY:<br>
+ case X86::VFMADDPSr231rY:<br>
+ case X86::VFMSUBPDr231rY:<br>
+ case X86::VFMSUBPSr231rY:<br>
+ case X86::VFNMADDPDr231rY:<br>
+ case X86::VFNMADDPSr231rY:<br>
+ case X86::VFNMSUBPDr231rY:<br>
+ case X86::VFNMSUBPSr231rY: {<br>
+ MachineOperand &O2 = MI->getOperand(2);<br>
+ MachineOperand &O3 = MI->getOperand(3);<br>
+ assert(O2.isReg() && O3.isReg() &&<br>
+ "Can't commute memory operands.");<br>
+ unsigned O2Reg = O2.getReg();<br>
+ unsigned O2SubReg = O2.getSubReg();<br>
+ bool O2IsKill = O2.isKill();<br>
+ O2.setReg(O3.getReg());<br>
+ O2.setSubReg(O3.getSubReg());<br>
+ O2.setIsKill(O3.isKill());<br>
+ O3.setReg(O2Reg);<br>
+ O3.setSubReg(O2SubReg);<br>
+ O3.setIsKill(O2IsKill);<br>
+ return MI;<br>
}<br>
default:<br>
return TargetInstrInfo::commuteInstruction(MI, NewMI);<br>
<br>
<br>
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</blockquote></div><br><br clear="all"><div><br></div>-- <br>~Craig
</div>