<div dir="ltr">Note that this breaks one of our internal tests. The debugger shows incorrect parameters passed to a global constructor:<div>SomeType C("a", "longer string", ...);</div><div>The constructor is called with C("longer string", "ger string", ...)</div>
<div>I'm trying to come up with a smaller repro...</div></div><div class="gmail_extra"><br><br><div class="gmail_quote">On Sat, Mar 29, 2014 at 7:26 AM, Rafael Espindola <span dir="ltr"><<a href="mailto:rafael.espindola@gmail.com" target="_blank">rafael.espindola@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: rafael<br>
Date: Sat Mar 29 01:26:49 2014<br>
New Revision: 205076<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=205076&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=205076&view=rev</a><br>
Log:<br>
Completely rewrite ELFObjectWriter::RecordRelocation.<br>
<br>
I started trying to fix a small issue, but this code has seen a small fix too<br>
many.<br>
<br>
The old code was fairly convoluted. Some of the issues it had:<br>
<br>
* It failed to check if a symbol difference was in the some section when<br>
converting a relocation to pcrel.<br>
* It failed to check if the relocation was already pcrel.<br>
* The pcrel value computation was wrong in some cases (relocation-pc.s)<br>
* It was missing quiet a few cases where it should not convert symbol<br>
relocations to section relocations, leaving the backends to patch it up.<br>
* It would not propagate the fact that it had changed a relocation to pcrel,<br>
requiring a quiet nasty work around in ARM.<br>
* It was missing comments.<br>
<br>
Added:<br>
llvm/trunk/test/MC/ELF/bad-expr2.s<br>
llvm/trunk/test/MC/ELF/bad-expr3.s<br>
Modified:<br>
llvm/trunk/include/llvm/MC/MCAsmBackend.h<br>
llvm/trunk/include/llvm/MC/MCAssembler.h<br>
llvm/trunk/include/llvm/MC/MCELFObjectWriter.h<br>
llvm/trunk/include/llvm/MC/MCMachObjectWriter.h<br>
llvm/trunk/include/llvm/MC/MCObjectWriter.h<br>
llvm/trunk/lib/MC/ELFObjectWriter.cpp<br>
llvm/trunk/lib/MC/MCAssembler.cpp<br>
llvm/trunk/lib/MC/MCELFObjectTargetWriter.cpp<br>
llvm/trunk/lib/MC/MachObjectWriter.cpp<br>
llvm/trunk/lib/MC/WinCOFFObjectWriter.cpp<br>
llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp<br>
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp<br>
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp<br>
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h<br>
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp<br>
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp<br>
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp<br>
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h<br>
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h<br>
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp<br>
llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp<br>
llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp<br>
llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp<br>
llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp<br>
llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp<br>
llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp<br>
llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp<br>
llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp<br>
llvm/trunk/test/MC/ARM/arm-elf-symver.s<br>
llvm/trunk/test/MC/ELF/merge.s<br>
llvm/trunk/test/MC/ELF/relocation-386.s<br>
llvm/trunk/test/MC/ELF/relocation-pc.s<br>
<br>
Modified: llvm/trunk/include/llvm/MC/MCAsmBackend.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAsmBackend.h?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAsmBackend.h?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/MC/MCAsmBackend.h (original)<br>
+++ llvm/trunk/include/llvm/MC/MCAsmBackend.h Sat Mar 29 01:26:49 2014<br>
@@ -97,7 +97,7 @@ public:<br>
/// data fragment, at the offset specified by the fixup and following the<br>
/// fixup kind as appropriate.<br>
virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,<br>
- uint64_t Value) const = 0;<br>
+ uint64_t Value, bool IsPCRel) const = 0;<br>
<br>
/// @}<br>
<br>
<br>
Modified: llvm/trunk/include/llvm/MC/MCAssembler.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAssembler.h?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAssembler.h?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/MC/MCAssembler.h (original)<br>
+++ llvm/trunk/include/llvm/MC/MCAssembler.h Sat Mar 29 01:26:49 2014<br>
@@ -979,8 +979,8 @@ private:<br>
/// finishLayout - Finalize a layout, including fragment lowering.<br>
void finishLayout(MCAsmLayout &Layout);<br>
<br>
- uint64_t handleFixup(const MCAsmLayout &Layout,<br>
- MCFragment &F, const MCFixup &Fixup);<br>
+ std::pair<uint64_t, bool> handleFixup(const MCAsmLayout &Layout,<br>
+ MCFragment &F, const MCFixup &Fixup);<br>
<br>
public:<br>
/// Compute the effective fragment size assuming it is laid out at the given<br>
<br>
Modified: llvm/trunk/include/llvm/MC/MCELFObjectWriter.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCELFObjectWriter.h?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCELFObjectWriter.h?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/MC/MCELFObjectWriter.h (original)<br>
+++ llvm/trunk/include/llvm/MC/MCELFObjectWriter.h Sat Mar 29 01:26:49 2014<br>
@@ -20,30 +20,10 @@ class MCAssembler;<br>
class MCFixup;<br>
class MCFragment;<br>
class MCObjectWriter;<br>
+class MCSectionData;<br>
class MCSymbol;<br>
class MCValue;<br>
<br>
-/// @name Relocation Data<br>
-/// @{<br>
-<br>
-struct ELFRelocationEntry {<br>
- // Make these big enough for both 32-bit and 64-bit<br>
- uint64_t r_offset;<br>
- int Index;<br>
- unsigned Type;<br>
- const MCSymbol *Symbol;<br>
- uint64_t r_addend;<br>
- const MCFixup *Fixup;<br>
-<br>
- ELFRelocationEntry()<br>
- : r_offset(0), Index(0), Type(0), Symbol(0), r_addend(0), Fixup(0) {}<br>
-<br>
- ELFRelocationEntry(uint64_t RelocOffset, int Idx, unsigned RelType,<br>
- const MCSymbol *Sym, uint64_t Addend, const MCFixup &Fixup)<br>
- : r_offset(RelocOffset), Index(Idx), Type(RelType), Symbol(Sym),<br>
- r_addend(Addend), Fixup(&Fixup) {}<br>
-};<br>
-<br>
class MCELFObjectTargetWriter {<br>
const uint8_t OSABI;<br>
const uint16_t EMachine;<br>
@@ -73,17 +53,8 @@ public:<br>
<br>
virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,<br>
bool IsPCRel) const = 0;<br>
- virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const;<br>
- virtual const MCSymbol *undefinedExplicitRelSym(const MCValue &Target,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const;<br>
<br>
- virtual void sortRelocs(const MCAssembler &Asm,<br>
- std::vector<ELFRelocationEntry> &Relocs);<br>
+ virtual bool needsRelocateWithSymbol(unsigned Type) const;<br>
<br>
/// @name Accessors<br>
/// @{<br>
<br>
Modified: llvm/trunk/include/llvm/MC/MCMachObjectWriter.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCMachObjectWriter.h?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCMachObjectWriter.h?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/MC/MCMachObjectWriter.h (original)<br>
+++ llvm/trunk/include/llvm/MC/MCMachObjectWriter.h Sat Mar 29 01:26:49 2014<br>
@@ -230,7 +230,8 @@ public:<br>
<br>
void RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout,<br>
const MCFragment *Fragment, const MCFixup &Fixup,<br>
- MCValue Target, uint64_t &FixedValue) override;<br>
+ MCValue Target, bool &IsPCRel,<br>
+ uint64_t &FixedValue) override;<br>
<br>
void BindIndirectSymbols(MCAssembler &Asm);<br>
<br>
<br>
Modified: llvm/trunk/include/llvm/MC/MCObjectWriter.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCObjectWriter.h?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCObjectWriter.h?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/MC/MCObjectWriter.h (original)<br>
+++ llvm/trunk/include/llvm/MC/MCObjectWriter.h Sat Mar 29 01:26:49 2014<br>
@@ -80,6 +80,7 @@ public:<br>
const MCAsmLayout &Layout,<br>
const MCFragment *Fragment,<br>
const MCFixup &Fixup, MCValue Target,<br>
+ bool &IsPCRel,<br>
uint64_t &FixedValue) = 0;<br>
<br>
/// \brief Check whether the difference (A - B) between two symbol<br>
<br>
Modified: llvm/trunk/lib/MC/ELFObjectWriter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/ELFObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/ELFObjectWriter.cpp (original)<br>
+++ llvm/trunk/lib/MC/ELFObjectWriter.cpp Sat Mar 29 01:26:49 2014<br>
@@ -76,6 +76,27 @@ public:<br>
uint8_t other, uint32_t shndx, bool Reserved);<br>
};<br>
<br>
+struct ELFRelocationEntry {<br>
+ uint64_t Offset; // Where is the relocation.<br>
+ bool UseSymbol; // Relocate with a symbol, not the section.<br>
+ union {<br>
+ const MCSymbol *Symbol; // The symbol to relocate with.<br>
+ const MCSectionData *Section; // The section to relocate with.<br>
+ };<br>
+ unsigned Type; // The type of the relocation.<br>
+ uint64_t Addend; // The addend to use.<br>
+<br>
+ ELFRelocationEntry(uint64_t Offset, const MCSymbol *Symbol, unsigned Type,<br>
+ uint64_t Addend)<br>
+ : Offset(Offset), UseSymbol(true), Symbol(Symbol), Type(Type),<br>
+ Addend(Addend) {}<br>
+<br>
+ ELFRelocationEntry(uint64_t Offset, const MCSectionData *Section,<br>
+ unsigned Type, uint64_t Addend)<br>
+ : Offset(Offset), UseSymbol(false), Section(Section), Type(Type),<br>
+ Addend(Addend) {}<br>
+};<br>
+<br>
class ELFObjectWriter : public MCObjectWriter {<br>
FragmentWriter FWriter;<br>
<br>
@@ -125,8 +146,8 @@ class ELFObjectWriter : public MCObjectW<br>
SmallPtrSet<const MCSymbol *, 16> WeakrefUsedInReloc;<br>
DenseMap<const MCSymbol *, const MCSymbol *> Renames;<br>
<br>
- llvm::DenseMap<const MCSectionData*,<br>
- std::vector<ELFRelocationEntry> > Relocations;<br>
+ llvm::DenseMap<const MCSectionData *, std::vector<ELFRelocationEntry>><br>
+ Relocations;<br>
DenseMap<const MCSection*, uint64_t> SectionStringTableIndex;<br>
<br>
/// @}<br>
@@ -153,27 +174,7 @@ class ELFObjectWriter : public MCObjectW<br>
unsigned ShstrtabIndex;<br>
<br>
<br>
- const MCSymbol *SymbolToReloc(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const;<br>
-<br>
// TargetObjectWriter wrappers.<br>
- const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const {<br>
- return TargetObjectWriter->ExplicitRelSym(Asm, Target, F, Fixup, IsPCRel);<br>
- }<br>
- const MCSymbol *undefinedExplicitRelSym(const MCValue &Target,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const {<br>
- return TargetObjectWriter->undefinedExplicitRelSym(Target, Fixup,<br>
- IsPCRel);<br>
- }<br>
-<br>
bool is64Bit() const { return TargetObjectWriter->is64Bit(); }<br>
bool hasRelocationAddend() const {<br>
return TargetObjectWriter->hasRelocationAddend();<br>
@@ -213,9 +214,14 @@ class ELFObjectWriter : public MCObjectW<br>
const MCAsmLayout &Layout,<br>
SectionIndexMapTy &SectionIndexMap);<br>
<br>
+ bool shouldRelocateWithSymbol(const MCSymbolRefExpr *RefA,<br>
+ const MCSymbolData *SD, uint64_t C,<br>
+ unsigned Type) const;<br>
+<br>
void RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout,<br>
const MCFragment *Fragment, const MCFixup &Fixup,<br>
- MCValue Target, uint64_t &FixedValue) override;<br>
+ MCValue Target, bool &IsPCRel,<br>
+ uint64_t &FixedValue) override;<br>
<br>
uint64_t getSymbolIndexInSymbolTable(const MCAssembler &Asm,<br>
const MCSymbol *S);<br>
@@ -716,146 +722,186 @@ void ELFObjectWriter::WriteSymbolTable(M<br>
}<br>
}<br>
<br>
-const MCSymbol *ELFObjectWriter::SymbolToReloc(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const {<br>
- const MCSymbol &Symbol = Target.getSymA()->getSymbol();<br>
- const MCSymbol &ASymbol = Symbol.AliasedSymbol();<br>
- const MCSymbol *Renamed = Renames.lookup(&Symbol);<br>
- const MCSymbolData &SD = Asm.getSymbolData(Symbol);<br>
-<br>
- if (ASymbol.isUndefined()) {<br>
- if (Renamed)<br>
- return Renamed;<br>
- return undefinedExplicitRelSym(Target, Fixup, IsPCRel);<br>
- }<br>
-<br>
- if (SD.isExternal()) {<br>
- if (Renamed)<br>
- return Renamed;<br>
- return &Symbol;<br>
- }<br>
+// It is always valid to create a relocation with a symbol. It is preferable<br>
+// to use a relocation with a section if that is possible. Using the section<br>
+// allows us to omit some local symbols from the symbol table.<br>
+bool ELFObjectWriter::shouldRelocateWithSymbol(const MCSymbolRefExpr *RefA,<br>
+ const MCSymbolData *SD,<br>
+ uint64_t C,<br>
+ unsigned Type) const {<br>
+ // A PCRel relocation to an absolute value has no symbol (or section). We<br>
+ // represent that with a relocation to a null section.<br>
+ if (!RefA)<br>
+ return false;<br>
<br>
- const MCSectionELF &Section =<br>
- static_cast<const MCSectionELF&>(ASymbol.getSection());<br>
- const SectionKind secKind = Section.getKind();<br>
-<br>
- if (secKind.isBSS())<br>
- return ExplicitRelSym(Asm, Target, F, Fixup, IsPCRel);<br>
-<br>
- if (secKind.isThreadLocal()) {<br>
- if (Renamed)<br>
- return Renamed;<br>
- return &Symbol;<br>
+ MCSymbolRefExpr::VariantKind Kind = RefA->getKind();<br>
+ switch (Kind) {<br>
+ default:<br>
+ break;<br>
+ // The .odp creation emits a relocation against the symbol ".TOC." which<br>
+ // create a R_PPC64_TOC relocation. However the relocation symbol name<br>
+ // in final object creation should be NULL, since the symbol does not<br>
+ // really exist, it is just the reference to TOC base for the current<br>
+ // object file. Since the symbol is undefined, returning false results<br>
+ // in a relocation with a null section which is the desired result.<br>
+ case MCSymbolRefExpr::VK_PPC_TOCBASE:<br>
+ return false;<br>
+<br>
+ // These VariantKind cause the relocation to refer to something other than<br>
+ // the symbol itself, like a linker generated table. Since the address of<br>
+ // symbol is not relevant, we cannot replace the symbol with the<br>
+ // section and patch the difference in the addend.<br>
+ case MCSymbolRefExpr::VK_GOT:<br>
+ case MCSymbolRefExpr::VK_PLT:<br>
+ case MCSymbolRefExpr::VK_GOTPCREL:<br>
+ case MCSymbolRefExpr::VK_Mips_GOT:<br>
+ case MCSymbolRefExpr::VK_PPC_GOT_LO:<br>
+ case MCSymbolRefExpr::VK_PPC_GOT_HI:<br>
+ case MCSymbolRefExpr::VK_PPC_GOT_HA:<br>
+ return true;<br>
}<br>
<br>
- MCSymbolRefExpr::VariantKind Kind = Target.getSymA()->getKind();<br>
- const MCSectionELF &Sec2 =<br>
- static_cast<const MCSectionELF&>(F.getParent()->getSection());<br>
-<br>
- if (&Sec2 != &Section &&<br>
- (Kind == MCSymbolRefExpr::VK_PLT ||<br>
- Kind == MCSymbolRefExpr::VK_GOTPCREL ||<br>
- Kind == MCSymbolRefExpr::VK_GOTOFF)) {<br>
- if (Renamed)<br>
- return Renamed;<br>
- return &Symbol;<br>
+ // An undefined symbol is not in any section, so the relocation has to point<br>
+ // to the symbol itself.<br>
+ const MCSymbol &Sym = SD->getSymbol();<br>
+ if (Sym.isUndefined())<br>
+ return true;<br>
+<br>
+ unsigned Binding = MCELF::GetBinding(*SD);<br>
+ switch(Binding) {<br>
+ default:<br>
+ llvm_unreachable("Invalid Binding");<br>
+ case ELF::STB_LOCAL:<br>
+ break;<br>
+ case ELF::STB_WEAK:<br>
+ // If the symbol is weak, it might be overridden by a symbol in another<br>
+ // file. The relocation has to point to the symbol so that the linker<br>
+ // can update it.<br>
+ return true;<br>
+ case ELF::STB_GLOBAL:<br>
+ // Global ELF symbols can be preempted by the dynamic linker. The relocation<br>
+ // has to point to the symbol for a reason analogous to the STB_WEAK case.<br>
+ return true;<br>
}<br>
<br>
- if (Section.getFlags() & ELF::SHF_MERGE) {<br>
- if (Target.getConstant() == 0)<br>
- return ExplicitRelSym(Asm, Target, F, Fixup, IsPCRel);<br>
- if (Renamed)<br>
- return Renamed;<br>
- return &Symbol;<br>
+ // If a relocation points to a mergeable section, we have to be careful.<br>
+ // If the offset is zero, a relocation with the section will encode the<br>
+ // same information. With a non-zero offset, the situation is different.<br>
+ // For example, a relocation can point 42 bytes past the end of a string.<br>
+ // If we change such a relocation to use the section, the linker would think<br>
+ // that it pointed to another string and subtracting 42 at runtime will<br>
+ // produce the wrong value.<br>
+ auto &Sec = cast<MCSectionELF>(Sym.getSection());<br>
+ unsigned Flags = Sec.getFlags();<br>
+ if (Flags & ELF::SHF_MERGE) {<br>
+ if (C != 0)<br>
+ return true;<br>
}<br>
<br>
- return ExplicitRelSym(Asm, Target, F, Fixup, IsPCRel);<br>
+ // Most TLS relocations use a got, so they need the symbol. Even those that<br>
+ // are just an offset (@tpoff), require a symbol in some linkers (gold,<br>
+ // but not bfd ld).<br>
+ if (Flags & ELF::SHF_TLS)<br>
+ return true;<br>
<br>
+ if (TargetObjectWriter->needsRelocateWithSymbol(Type))<br>
+ return true;<br>
+ return false;<br>
}<br>
<br>
-<br>
void ELFObjectWriter::RecordRelocation(const MCAssembler &Asm,<br>
const MCAsmLayout &Layout,<br>
const MCFragment *Fragment,<br>
const MCFixup &Fixup,<br>
MCValue Target,<br>
+ bool &IsPCRel,<br>
uint64_t &FixedValue) {<br>
- int64_t Addend = 0;<br>
- int Index = 0;<br>
- int64_t Value = Target.getConstant();<br>
- const MCSymbol *RelocSymbol = NULL;<br>
-<br>
- bool IsPCRel = isFixupKindPCRel(Asm, Fixup.getKind());<br>
- if (!Target.isAbsolute()) {<br>
- const MCSymbol &Symbol = Target.getSymA()->getSymbol();<br>
- const MCSymbol &ASymbol = Symbol.AliasedSymbol();<br>
- RelocSymbol = SymbolToReloc(Asm, Target, *Fragment, Fixup, IsPCRel);<br>
-<br>
- if (const MCSymbolRefExpr *RefB = Target.getSymB()) {<br>
- const MCSymbol &SymbolB = RefB->getSymbol();<br>
- MCSymbolData &SDB = Asm.getSymbolData(SymbolB);<br>
- IsPCRel = true;<br>
-<br>
- if (!SDB.getFragment())<br>
- Asm.getContext().FatalError(<br>
- Fixup.getLoc(),<br>
- Twine("symbol '") + SymbolB.getName() +<br>
- "' can not be undefined in a subtraction expression");<br>
-<br>
- // Offset of the symbol in the section<br>
- int64_t a = Layout.getSymbolOffset(&SDB);<br>
-<br>
- // Offset of the relocation in the section<br>
- int64_t b = Layout.getFragmentOffset(Fragment) + Fixup.getOffset();<br>
- Value += b - a;<br>
- }<br>
+ const MCSectionData *FixupSection = Fragment->getParent();<br>
+ uint64_t C = Target.getConstant();<br>
+ uint64_t FixupOffset = Layout.getFragmentOffset(Fragment) + Fixup.getOffset();<br>
+<br>
+ if (const MCSymbolRefExpr *RefB = Target.getSymB()) {<br>
+ assert(RefB->getKind() == MCSymbolRefExpr::VK_None &&<br>
+ "Should not have constructed this");<br>
+<br>
+ // Let A, B and C being the components of Target and R be the location of<br>
+ // the fixup. If the fixup is not pcrel, we want to compute (A - B + C).<br>
+ // If it is pcrel, we want to compute (A - B + C - R).<br>
+<br>
+ // In general, ELF has no relocations for -B. It can only represent (A + C)<br>
+ // or (A + C - R). If B = R + K and the relocation is not pcrel, we can<br>
+ // replace B to implement it: (A - R - K + C)<br>
+ if (IsPCRel)<br>
+ Asm.getContext().FatalError(<br>
+ Fixup.getLoc(),<br>
+ "No relocation available to represent this relative expression");<br>
+<br>
+ const MCSymbol &SymB = RefB->getSymbol();<br>
+<br>
+ if (SymB.isUndefined())<br>
+ Asm.getContext().FatalError(<br>
+ Fixup.getLoc(),<br>
+ Twine("symbol '") + SymB.getName() +<br>
+ "' can not be undefined in a subtraction expression");<br>
+<br>
+ assert(!SymB.isAbsolute() && "Should have been folded");<br>
+ const MCSection &SecB = SymB.getSection();<br>
+ if (&SecB != &FixupSection->getSection())<br>
+ Asm.getContext().FatalError(<br>
+ Fixup.getLoc(), "Cannot represent a difference across sections");<br>
+<br>
+ const MCSymbolData &SymBD = Asm.getSymbolData(SymB);<br>
+ uint64_t SymBOffset = Layout.getSymbolOffset(&SymBD);<br>
+ uint64_t K = SymBOffset - FixupOffset;<br>
+ IsPCRel = true;<br>
+ C -= K;<br>
+ }<br>
+<br>
+ // We either rejected the fixup or folded B into C at this point.<br>
+ const MCSymbolRefExpr *RefA = Target.getSymA();<br>
+ const MCSymbol *SymA = RefA ? &RefA->getSymbol() : nullptr;<br>
+ const MCSymbolData *SymAD = SymA ? &Asm.getSymbolData(*SymA) : nullptr;<br>
<br>
- if (!RelocSymbol) {<br>
- MCSymbolData &SD = Asm.getSymbolData(ASymbol);<br>
- MCFragment *F = SD.getFragment();<br>
-<br>
- if (F) {<br>
- Index = F->getParent()->getOrdinal() + 1;<br>
- // Offset of the symbol in the section<br>
- Value += Layout.getSymbolOffset(&SD);<br>
- } else {<br>
- Index = 0;<br>
- }<br>
- } else {<br>
- if (Target.getSymA()->getKind() == MCSymbolRefExpr::VK_WEAKREF)<br>
- WeakrefUsedInReloc.insert(RelocSymbol);<br>
- else<br>
- UsedInReloc.insert(RelocSymbol);<br>
- Index = -1;<br>
- }<br>
- Addend = Value;<br>
- if (hasRelocationAddend())<br>
- Value = 0;<br>
+ unsigned Type = GetRelocType(Target, Fixup, IsPCRel);<br>
+ bool RelocateWithSymbol = shouldRelocateWithSymbol(RefA, SymAD, C, Type);<br>
+ if (!RelocateWithSymbol && SymA && !SymA->isUndefined())<br>
+ C += Layout.getSymbolOffset(SymAD);<br>
+<br>
+ uint64_t Addend = 0;<br>
+ if (hasRelocationAddend()) {<br>
+ Addend = C;<br>
+ C = 0;<br>
}<br>
<br>
- FixedValue = Value;<br>
- unsigned Type = GetRelocType(Target, Fixup, IsPCRel);<br>
- MCSymbolRefExpr::VariantKind Modifier = Target.isAbsolute() ?<br>
- MCSymbolRefExpr::VK_None : Target.getSymA()->getKind();<br>
+ FixedValue = C;<br>
+<br>
+ // FIXME: What is this!?!?<br>
+ MCSymbolRefExpr::VariantKind Modifier =<br>
+ RefA ? RefA->getKind() : MCSymbolRefExpr::VK_None;<br>
if (RelocNeedsGOT(Modifier))<br>
NeedsGOT = true;<br>
<br>
- uint64_t RelocOffset = Layout.getFragmentOffset(Fragment) +<br>
- Fixup.getOffset();<br>
-<br>
- if (!hasRelocationAddend())<br>
- Addend = 0;<br>
+ if (!RelocateWithSymbol) {<br>
+ const MCSection *SecA =<br>
+ (SymA && !SymA->isUndefined()) ? &SymA->getSection() : nullptr;<br>
+ const MCSectionData *SecAD = SecA ? &Asm.getSectionData(*SecA) : nullptr;<br>
+ ELFRelocationEntry Rec(FixupOffset, SecAD, Type, Addend);<br>
+ Relocations[FixupSection].push_back(Rec);<br>
+ return;<br>
+ }<br>
<br>
- if (is64Bit())<br>
- assert(isInt<64>(Addend));<br>
- else<br>
- assert(isInt<32>(Addend));<br>
+ if (SymA) {<br>
+ if (const MCSymbol *R = Renames.lookup(SymA))<br>
+ SymA = R;<br>
<br>
- ELFRelocationEntry ERE(RelocOffset, Index, Type, RelocSymbol, Addend, Fixup);<br>
- Relocations[Fragment->getParent()].push_back(ERE);<br>
+ if (RefA->getKind() == MCSymbolRefExpr::VK_WEAKREF)<br>
+ WeakrefUsedInReloc.insert(SymA);<br>
+ else<br>
+ UsedInReloc.insert(SymA);<br>
+ }<br>
+ ELFRelocationEntry Rec(FixupOffset, SymA, Type, Addend);<br>
+ Relocations[FixupSection].push_back(Rec);<br>
+ return;<br>
}<br>
<br>
<br>
@@ -1154,51 +1200,71 @@ void ELFObjectWriter::WriteSecHdrEntry(u<br>
WriteWord(EntrySize); // sh_entsize<br>
}<br>
<br>
+// ELF doesn't require relocations to be in any order. We sort by the r_offset,<br>
+// just to match gnu as for easier comparison. The use type is an arbitrary way<br>
+// of making the sort deterministic.<br>
+static int cmpRel(const ELFRelocationEntry *AP, const ELFRelocationEntry *BP) {<br>
+ const ELFRelocationEntry &A = *AP;<br>
+ const ELFRelocationEntry &B = *BP;<br>
+ if (A.Offset != B.Offset)<br>
+ return B.Offset - A.Offset;<br>
+ if (B.Type != A.Type)<br>
+ return A.Type - B.Type;<br>
+ llvm_unreachable("ELFRelocs might be unstable!");<br>
+}<br>
+<br>
+static void sortRelocs(const MCAssembler &Asm,<br>
+ std::vector<ELFRelocationEntry> &Relocs) {<br>
+ array_pod_sort(Relocs.begin(), Relocs.end(), cmpRel);<br>
+}<br>
+<br>
void ELFObjectWriter::WriteRelocationsFragment(const MCAssembler &Asm,<br>
MCDataFragment *F,<br>
const MCSectionData *SD) {<br>
std::vector<ELFRelocationEntry> &Relocs = Relocations[SD];<br>
<br>
- // Sort the relocation entries. Most targets just sort by r_offset, but some<br>
- // (e.g., MIPS) have additional constraints.<br>
- TargetObjectWriter->sortRelocs(Asm, Relocs);<br>
+ sortRelocs(Asm, Relocs);<br>
<br>
for (unsigned i = 0, e = Relocs.size(); i != e; ++i) {<br>
- ELFRelocationEntry entry = Relocs[e - i - 1];<br>
+ const ELFRelocationEntry &Entry = Relocs[e - i - 1];<br>
+<br>
+ unsigned Index;<br>
+ if (Entry.UseSymbol) {<br>
+ Index = getSymbolIndexInSymbolTable(Asm, Entry.Symbol);<br>
+ } else {<br>
+ const MCSectionData *Sec = Entry.Section;<br>
+ if (Sec)<br>
+ Index = Sec->getOrdinal() + FileSymbolData.size() +<br>
+ LocalSymbolData.size() + 1;<br>
+ else<br>
+ Index = 0;<br>
+ }<br>
<br>
- if (!entry.Index)<br>
- ;<br>
- // FIXME: this is most likely a bug if index overflows.<br>
- else if (entry.Index < 0)<br>
- entry.Index = getSymbolIndexInSymbolTable(Asm, entry.Symbol);<br>
- else<br>
- entry.Index += FileSymbolData.size() + LocalSymbolData.size();<br>
if (is64Bit()) {<br>
- write(*F, entry.r_offset);<br>
+ write(*F, Entry.Offset);<br>
if (TargetObjectWriter->isN64()) {<br>
- write(*F, uint32_t(entry.Index));<br>
+ write(*F, uint32_t(Index));<br>
<br>
- write(*F, TargetObjectWriter->getRSsym(entry.Type));<br>
- write(*F, TargetObjectWriter->getRType3(entry.Type));<br>
- write(*F, TargetObjectWriter->getRType2(entry.Type));<br>
- write(*F, TargetObjectWriter->getRType(entry.Type));<br>
- }<br>
- else {<br>
+ write(*F, TargetObjectWriter->getRSsym(Entry.Type));<br>
+ write(*F, TargetObjectWriter->getRType3(Entry.Type));<br>
+ write(*F, TargetObjectWriter->getRType2(Entry.Type));<br>
+ write(*F, TargetObjectWriter->getRType(Entry.Type));<br>
+ } else {<br>
struct ELF::Elf64_Rela ERE64;<br>
- ERE64.setSymbolAndType(entry.Index, entry.Type);<br>
+ ERE64.setSymbolAndType(Index, Entry.Type);<br>
write(*F, ERE64.r_info);<br>
}<br>
if (hasRelocationAddend())<br>
- write(*F, entry.r_addend);<br>
+ write(*F, Entry.Addend);<br>
} else {<br>
- write(*F, uint32_t(entry.r_offset));<br>
+ write(*F, uint32_t(Entry.Offset));<br>
<br>
struct ELF::Elf32_Rela ERE32;<br>
- ERE32.setSymbolAndType(entry.Index, entry.Type);<br>
+ ERE32.setSymbolAndType(Index, Entry.Type);<br>
write(*F, ERE32.r_info);<br>
<br>
if (hasRelocationAddend())<br>
- write(*F, uint32_t(entry.r_addend));<br>
+ write(*F, uint32_t(Entry.Addend));<br>
}<br>
}<br>
}<br>
<br>
Modified: llvm/trunk/lib/MC/MCAssembler.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAssembler.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAssembler.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/MCAssembler.cpp (original)<br>
+++ llvm/trunk/lib/MC/MCAssembler.cpp Sat Mar 29 01:26:49 2014<br>
@@ -779,20 +779,22 @@ void MCAssembler::writeSectionData(const<br>
Layout.getSectionAddressSize(SD));<br>
}<br>
<br>
-<br>
-uint64_t MCAssembler::handleFixup(const MCAsmLayout &Layout,<br>
- MCFragment &F,<br>
- const MCFixup &Fixup) {<br>
+std::pair<uint64_t, bool> MCAssembler::handleFixup(const MCAsmLayout &Layout,<br>
+ MCFragment &F,<br>
+ const MCFixup &Fixup) {<br>
// Evaluate the fixup.<br>
MCValue Target;<br>
uint64_t FixedValue;<br>
+ bool IsPCRel = Backend.getFixupKindInfo(Fixup.getKind()).Flags &<br>
+ MCFixupKindInfo::FKF_IsPCRel;<br>
if (!evaluateFixup(Layout, Fixup, &F, Target, FixedValue)) {<br>
// The fixup was unresolved, we need a relocation. Inform the object<br>
// writer of the relocation, and give it an opportunity to adjust the<br>
// fixup value if need be.<br>
- getWriter().RecordRelocation(*this, Layout, &F, Fixup, Target, FixedValue);<br>
+ getWriter().RecordRelocation(*this, Layout, &F, Fixup, Target, IsPCRel,<br>
+ FixedValue);<br>
}<br>
- return FixedValue;<br>
+ return std::make_pair(FixedValue, IsPCRel);<br>
}<br>
<br>
void MCAssembler::Finish() {<br>
@@ -856,9 +858,11 @@ void MCAssembler::Finish() {<br>
for (MCEncodedFragmentWithFixups::fixup_iterator it3 = F->fixup_begin(),<br>
ie3 = F->fixup_end(); it3 != ie3; ++it3) {<br>
MCFixup &Fixup = *it3;<br>
- uint64_t FixedValue = handleFixup(Layout, *F, Fixup);<br>
+ uint64_t FixedValue;<br>
+ bool IsPCRel;<br>
+ std::tie(FixedValue, IsPCRel) = handleFixup(Layout, *F, Fixup);<br>
getBackend().applyFixup(Fixup, F->getContents().data(),<br>
- F->getContents().size(), FixedValue);<br>
+ F->getContents().size(), FixedValue, IsPCRel);<br>
}<br>
}<br>
}<br>
<br>
Modified: llvm/trunk/lib/MC/MCELFObjectTargetWriter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCELFObjectTargetWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCELFObjectTargetWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/MCELFObjectTargetWriter.cpp (original)<br>
+++ llvm/trunk/lib/MC/MCELFObjectTargetWriter.cpp Sat Mar 29 01:26:49 2014<br>
@@ -24,38 +24,6 @@ MCELFObjectTargetWriter::MCELFObjectTarg<br>
IsN64(IsN64_){<br>
}<br>
<br>
-const MCSymbol *MCELFObjectTargetWriter::ExplicitRelSym(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const {<br>
- return NULL;<br>
-}<br>
-<br>
-const MCSymbol *MCELFObjectTargetWriter::undefinedExplicitRelSym(const MCValue &Target,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const {<br>
- const MCSymbol &Symbol = Target.getSymA()->getSymbol();<br>
- return &Symbol.AliasedSymbol();<br>
-}<br>
-<br>
-// ELF doesn't require relocations to be in any order. We sort by the r_offset,<br>
-// just to match gnu as for easier comparison. The use type and index is an<br>
-// arbitrary way of making the sort deterministic.<br>
-static int cmpRel(const ELFRelocationEntry *AP, const ELFRelocationEntry *BP) {<br>
- const ELFRelocationEntry &A = *AP;<br>
- const ELFRelocationEntry &B = *BP;<br>
- if (A.r_offset != B.r_offset)<br>
- return B.r_offset - A.r_offset;<br>
- if (B.Type != A.Type)<br>
- return A.Type - B.Type;<br>
- if (B.Index != A.Index)<br>
- return B.Index - A.Index;<br>
- llvm_unreachable("ELFRelocs might be unstable!");<br>
-}<br>
-<br>
-void<br>
-MCELFObjectTargetWriter::sortRelocs(const MCAssembler &Asm,<br>
- std::vector<ELFRelocationEntry> &Relocs) {<br>
- array_pod_sort(Relocs.begin(), Relocs.end(), cmpRel);<br>
+bool MCELFObjectTargetWriter::needsRelocateWithSymbol(unsigned Type) const {<br>
+ return false;<br>
}<br>
<br>
Modified: llvm/trunk/lib/MC/MachObjectWriter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MachObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MachObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/MachObjectWriter.cpp (original)<br>
+++ llvm/trunk/lib/MC/MachObjectWriter.cpp Sat Mar 29 01:26:49 2014<br>
@@ -417,6 +417,7 @@ void MachObjectWriter::RecordRelocation(<br>
const MCFragment *Fragment,<br>
const MCFixup &Fixup,<br>
MCValue Target,<br>
+ bool &IsPCRel,<br>
uint64_t &FixedValue) {<br>
TargetObjectWriter->RecordRelocation(this, Asm, Layout, Fragment, Fixup,<br>
Target, FixedValue);<br>
<br>
Modified: llvm/trunk/lib/MC/WinCOFFObjectWriter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/WinCOFFObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/WinCOFFObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/MC/WinCOFFObjectWriter.cpp (original)<br>
+++ llvm/trunk/lib/MC/WinCOFFObjectWriter.cpp Sat Mar 29 01:26:49 2014<br>
@@ -172,7 +172,8 @@ public:<br>
<br>
void RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout,<br>
const MCFragment *Fragment, const MCFixup &Fixup,<br>
- MCValue Target, uint64_t &FixedValue) override;<br>
+ MCValue Target, bool &IsPCRel,<br>
+ uint64_t &FixedValue) override;<br>
<br>
void WriteObject(MCAssembler &Asm, const MCAsmLayout &Layout) override;<br>
};<br>
@@ -656,6 +657,7 @@ void WinCOFFObjectWriter::RecordRelocati<br>
const MCFragment *Fragment,<br>
const MCFixup &Fixup,<br>
MCValue Target,<br>
+ bool &IsPCRel,<br>
uint64_t &FixedValue) {<br>
assert(Target.getSymA() != NULL && "Relocation must reference a symbol!");<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp Sat Mar 29 01:26:49 2014<br>
@@ -177,7 +177,7 @@ public:<br>
}<br>
<br>
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,<br>
- uint64_t Value) const {<br>
+ uint64_t Value, bool IsPCRel) const {<br>
unsigned NumBytes = getFixupKindInfo(Fixup.getKind()).TargetSize / 8;<br>
Value = adjustFixupValue(Fixup.getKind(), Value);<br>
if (!Value) return; // Doesn't change encoding.<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp Sat Mar 29 01:26:49 2014<br>
@@ -97,10 +97,6 @@ public:<br>
{ "fixup_arm_movw_lo16", 0, 20, 0 },<br>
{ "fixup_t2_movt_hi16", 0, 20, 0 },<br>
{ "fixup_t2_movw_lo16", 0, 20, 0 },<br>
-{ "fixup_arm_movt_hi16_pcrel", 0, 20, MCFixupKindInfo::FKF_IsPCRel },<br>
-{ "fixup_arm_movw_lo16_pcrel", 0, 20, MCFixupKindInfo::FKF_IsPCRel },<br>
-{ "fixup_t2_movt_hi16_pcrel", 0, 20, MCFixupKindInfo::FKF_IsPCRel },<br>
-{ "fixup_t2_movw_lo16_pcrel", 0, 20, MCFixupKindInfo::FKF_IsPCRel },<br>
};<br>
const static MCFixupKindInfo InfosBE[ARM::NumTargetFixupKinds] = {<br>
// This table *must* be in the order that the fixup_* kinds are defined in<br>
@@ -138,10 +134,6 @@ public:<br>
{ "fixup_arm_movw_lo16", 12, 20, 0 },<br>
{ "fixup_t2_movt_hi16", 12, 20, 0 },<br>
{ "fixup_t2_movw_lo16", 12, 20, 0 },<br>
-{ "fixup_arm_movt_hi16_pcrel", 12, 20, MCFixupKindInfo::FKF_IsPCRel },<br>
-{ "fixup_arm_movw_lo16_pcrel", 12, 20, MCFixupKindInfo::FKF_IsPCRel },<br>
-{ "fixup_t2_movt_hi16_pcrel", 12, 20, MCFixupKindInfo::FKF_IsPCRel },<br>
-{ "fixup_t2_movw_lo16_pcrel", 12, 20, MCFixupKindInfo::FKF_IsPCRel },<br>
};<br>
<br>
if (Kind < FirstTargetFixupKind)<br>
@@ -161,7 +153,7 @@ public:<br>
<br>
<br>
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,<br>
- uint64_t Value) const override;<br>
+ uint64_t Value, bool IsPCRel) const override;<br>
<br>
bool mayNeedRelaxation(const MCInst &Inst) const override;<br>
<br>
@@ -315,7 +307,7 @@ bool ARMAsmBackend::writeNopData(uint64_<br>
}<br>
<br>
static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value,<br>
- MCContext *Ctx = NULL) {<br>
+ bool IsPCRel, MCContext *Ctx) {<br>
unsigned Kind = Fixup.getKind();<br>
switch (Kind) {<br>
default:<br>
@@ -325,11 +317,10 @@ static unsigned adjustFixupValue(const M<br>
case FK_Data_4:<br>
return Value;<br>
case ARM::fixup_arm_movt_hi16:<br>
- Value >>= 16;<br>
+ if (!IsPCRel)<br>
+ Value >>= 16;<br>
// Fallthrough<br>
- case ARM::fixup_arm_movw_lo16:<br>
- case ARM::fixup_arm_movt_hi16_pcrel:<br>
- case ARM::fixup_arm_movw_lo16_pcrel: {<br>
+ case ARM::fixup_arm_movw_lo16: {<br>
unsigned Hi4 = (Value & 0xF000) >> 12;<br>
unsigned Lo12 = Value & 0x0FFF;<br>
// inst{19-16} = Hi4;<br>
@@ -338,12 +329,10 @@ static unsigned adjustFixupValue(const M<br>
return Value;<br>
}<br>
case ARM::fixup_t2_movt_hi16:<br>
- Value >>= 16;<br>
+ if (!IsPCRel)<br>
+ Value >>= 16;<br>
// Fallthrough<br>
- case ARM::fixup_t2_movw_lo16:<br>
- case ARM::fixup_t2_movt_hi16_pcrel: //FIXME: Shouldn't this be shifted like<br>
- // the other hi16 fixup?<br>
- case ARM::fixup_t2_movw_lo16_pcrel: {<br>
+ case ARM::fixup_t2_movw_lo16: {<br>
unsigned Hi4 = (Value & 0xF000) >> 12;<br>
unsigned i = (Value & 0x800) >> 11;<br>
unsigned Mid3 = (Value & 0x700) >> 8;<br>
@@ -629,7 +618,7 @@ void ARMAsmBackend::processFixupValue(co<br>
// Try to get the encoded value for the fixup as-if we're mapping it into<br>
// the instruction. This allows adjustFixupValue() to issue a diagnostic<br>
// if the value aren't invalid.<br>
- (void)adjustFixupValue(Fixup, Value, &Asm.getContext());<br>
+ (void)adjustFixupValue(Fixup, Value, false, &Asm.getContext());<br>
}<br>
<br>
/// getFixupKindNumBytes - The number of bytes the fixup may change.<br>
@@ -670,12 +659,8 @@ static unsigned getFixupKindNumBytes(uns<br>
case ARM::fixup_arm_thumb_blx:<br>
case ARM::fixup_arm_movt_hi16:<br>
case ARM::fixup_arm_movw_lo16:<br>
- case ARM::fixup_arm_movt_hi16_pcrel:<br>
- case ARM::fixup_arm_movw_lo16_pcrel:<br>
case ARM::fixup_t2_movt_hi16:<br>
case ARM::fixup_t2_movw_lo16:<br>
- case ARM::fixup_t2_movt_hi16_pcrel:<br>
- case ARM::fixup_t2_movw_lo16_pcrel:<br>
return 4;<br>
}<br>
}<br>
@@ -720,21 +705,18 @@ static unsigned getFixupKindContainerSiz<br>
case ARM::fixup_arm_thumb_blx:<br>
case ARM::fixup_arm_movt_hi16:<br>
case ARM::fixup_arm_movw_lo16:<br>
- case ARM::fixup_arm_movt_hi16_pcrel:<br>
- case ARM::fixup_arm_movw_lo16_pcrel:<br>
case ARM::fixup_t2_movt_hi16:<br>
case ARM::fixup_t2_movw_lo16:<br>
- case ARM::fixup_t2_movt_hi16_pcrel:<br>
- case ARM::fixup_t2_movw_lo16_pcrel:<br>
// Instruction size is 4 bytes.<br>
return 4;<br>
}<br>
}<br>
<br>
void ARMAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,<br>
- unsigned DataSize, uint64_t Value) const {<br>
+ unsigned DataSize, uint64_t Value,<br>
+ bool IsPCRel) const {<br>
unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());<br>
- Value = adjustFixupValue(Fixup, Value);<br>
+ Value = adjustFixupValue(Fixup, Value, IsPCRel, nullptr);<br>
if (!Value) return; // Doesn't change encoding.<br>
<br>
unsigned Offset = Fixup.getOffset();<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp Sat Mar 29 01:26:49 2014<br>
@@ -36,10 +36,8 @@ namespace {<br>
<br>
unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,<br>
bool IsPCRel) const override;<br>
- const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,<br>
- const MCValue &Target, const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const override;<br>
+<br>
+ bool needsRelocateWithSymbol(unsigned Type) const override;<br>
};<br>
}<br>
<br>
@@ -50,90 +48,18 @@ ARMELFObjectWriter::ARMELFObjectWriter(u<br>
<br>
ARMELFObjectWriter::~ARMELFObjectWriter() {}<br>
<br>
-// In ARM, _MergedGlobals and other most symbols get emitted directly.<br>
-// I.e. not as an offset to a section symbol.<br>
-// This code is an approximation of what ARM/gcc does.<br>
-<br>
-STATISTIC(PCRelCount, "Total number of PIC Relocations");<br>
-STATISTIC(NonPCRelCount, "Total number of non-PIC relocations");<br>
-<br>
-const MCSymbol *ARMELFObjectWriter::ExplicitRelSym(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const {<br>
- const MCSymbol &Symbol = Target.getSymA()->getSymbol().AliasedSymbol();<br>
- bool EmitThisSym = false;<br>
-<br>
- const MCSectionELF &Section =<br>
- static_cast<const MCSectionELF&>(Symbol.getSection());<br>
- bool InNormalSection = true;<br>
- unsigned RelocType = 0;<br>
- RelocType = GetRelocTypeInner(Target, Fixup, IsPCRel);<br>
- assert(!Target.getSymB() ||<br>
- Target.getSymB()->getKind() == MCSymbolRefExpr::VK_None);<br>
-<br>
- DEBUG(<br>
- MCSymbolRefExpr::VariantKind Kind = Fixup.getAccessVariant();<br>
- dbgs() << "considering symbol "<br>
- << Section.getSectionName() << "/"<br>
- << Symbol.getName() << "/"<br>
- << " Rel:" << (unsigned)RelocType<br>
- << " Kind: " << (int)Kind<br>
- << " Tmp:"<br>
- << Symbol.isAbsolute() << "/" << Symbol.isDefined() << "/"<br>
- << Symbol.isVariable() << "/" << Symbol.isTemporary()<br>
- << " Counts:" << PCRelCount << "/" << NonPCRelCount << "\n");<br>
-<br>
- if (IsPCRel) { ++PCRelCount;<br>
- switch (RelocType) {<br>
- default:<br>
- // Most relocation types are emitted as explicit symbols<br>
- InNormalSection =<br>
- StringSwitch<bool>(Section.getSectionName())<br>
- .Case(".data.rel.ro.local", false)<br>
- .Case(".data.rel", false)<br>
- .Case(".bss", false)<br>
- .Default(true);<br>
- EmitThisSym = true;<br>
- break;<br>
- case ELF::R_ARM_ABS32:<br>
- // But things get strange with R_ARM_ABS32<br>
- // In this case, most things that go in .rodata show up<br>
- // as section relative relocations<br>
- InNormalSection =<br>
- StringSwitch<bool>(Section.getSectionName())<br>
- .Case(".data.rel.ro.local", false)<br>
- .Case(".data.rel", false)<br>
- .Case(".rodata", false)<br>
- .Case(".bss", false)<br>
- .Default(true);<br>
- EmitThisSym = false;<br>
- break;<br>
- }<br>
- } else {<br>
- NonPCRelCount++;<br>
- InNormalSection =<br>
- StringSwitch<bool>(Section.getSectionName())<br>
- .Case(".data.rel.ro.local", false)<br>
- .Case(".rodata", false)<br>
- .Case(".data.rel", false)<br>
- .Case(".bss", false)<br>
- .Default(true);<br>
-<br>
- switch (RelocType) {<br>
- default: EmitThisSym = true; break;<br>
- case ELF::R_ARM_ABS32: EmitThisSym = false; break;<br>
- case ELF::R_ARM_PREL31: EmitThisSym = false; break;<br>
- }<br>
- }<br>
-<br>
- if (EmitThisSym)<br>
- return &Symbol;<br>
- if (! Symbol.isTemporary() && InNormalSection) {<br>
- return &Symbol;<br>
+bool ARMELFObjectWriter::needsRelocateWithSymbol(unsigned Type) const {<br>
+ // FIXME: This is extremelly conservative. This really needs to use a<br>
+ // whitelist with a clear explanation for why each realocation needs to<br>
+ // point to the symbol, not to the section.<br>
+ switch (Type) {<br>
+ default:<br>
+ return true;<br>
+<br>
+ case ELF::R_ARM_PREL31:<br>
+ case ELF::R_ARM_ABS32:<br>
+ return false;<br>
}<br>
- return NULL;<br>
}<br>
<br>
// Need to examine the Fixup when determining whether to<br>
@@ -191,19 +117,15 @@ unsigned ARMELFObjectWriter::GetRelocTyp<br>
Type = ELF::R_ARM_THM_JUMP24;<br>
break;<br>
case ARM::fixup_arm_movt_hi16:<br>
- case ARM::fixup_arm_movt_hi16_pcrel:<br>
Type = ELF::R_ARM_MOVT_PREL;<br>
break;<br>
case ARM::fixup_arm_movw_lo16:<br>
- case ARM::fixup_arm_movw_lo16_pcrel:<br>
Type = ELF::R_ARM_MOVW_PREL_NC;<br>
break;<br>
case ARM::fixup_t2_movt_hi16:<br>
- case ARM::fixup_t2_movt_hi16_pcrel:<br>
Type = ELF::R_ARM_THM_MOVT_PREL;<br>
break;<br>
case ARM::fixup_t2_movw_lo16:<br>
- case ARM::fixup_t2_movw_lo16_pcrel:<br>
Type = ELF::R_ARM_THM_MOVW_PREL_NC;<br>
break;<br>
case ARM::fixup_arm_thumb_bl:<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h (original)<br>
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMFixupKinds.h Sat Mar 29 01:26:49 2014<br>
@@ -100,15 +100,6 @@ enum Fixups {<br>
fixup_t2_movt_hi16, // :upper16:<br>
fixup_t2_movw_lo16, // :lower16:<br>
<br>
- // It is possible to create an "immediate" that happens to be pcrel.<br>
- // movw r0, :lower16:Foo-(Bar+8) and movt r0, :upper16:Foo-(Bar+8)<br>
- // result in different reloc tags than the above two.<br>
- // Needed to support ELF::R_ARM_MOVT_PREL and ELF::R_ARM_MOVW_PREL_NC<br>
- fixup_arm_movt_hi16_pcrel, // :upper16:<br>
- fixup_arm_movw_lo16_pcrel, // :lower16:<br>
- fixup_t2_movt_hi16_pcrel, // :upper16:<br>
- fixup_t2_movw_lo16_pcrel, // :lower16:<br>
-<br>
// Marker<br>
LastTargetFixupKind,<br>
NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp Sat Mar 29 01:26:49 2014<br>
@@ -975,19 +975,6 @@ getT2AddrModeImm0_1020s4OpValue(const MC<br>
return (Reg << 8) | Imm8;<br>
}<br>
<br>
-// FIXME: This routine assumes that a binary<br>
-// expression will always result in a PCRel expression<br>
-// In reality, its only true if one or more subexpressions<br>
-// is itself a PCRel (i.e. "." in asm or some other pcrel construct)<br>
-// but this is good enough for now.<br>
-static bool EvaluateAsPCRel(const MCExpr *Expr) {<br>
- switch (Expr->getKind()) {<br>
- default: llvm_unreachable("Unexpected expression type");<br>
- case MCExpr::SymbolRef: return false;<br>
- case MCExpr::Binary: return true;<br>
- }<br>
-}<br>
-<br>
uint32_t<br>
ARMMCCodeEmitter::getHiLo16ImmOpValue(const MCInst &MI, unsigned OpIdx,<br>
SmallVectorImpl<MCFixup> &Fixups,<br>
@@ -1023,24 +1010,12 @@ ARMMCCodeEmitter::getHiLo16ImmOpValue(co<br>
switch (ARM16Expr->getKind()) {<br>
default: llvm_unreachable("Unsupported ARMFixup");<br>
case ARMMCExpr::VK_ARM_HI16:<br>
- if (!isTargetMachO(STI) && EvaluateAsPCRel(E))<br>
- Kind = MCFixupKind(isThumb2(STI)<br>
- ? ARM::fixup_t2_movt_hi16_pcrel<br>
- : ARM::fixup_arm_movt_hi16_pcrel);<br>
- else<br>
- Kind = MCFixupKind(isThumb2(STI)<br>
- ? ARM::fixup_t2_movt_hi16<br>
- : ARM::fixup_arm_movt_hi16);<br>
+ Kind = MCFixupKind(isThumb2(STI) ? ARM::fixup_t2_movt_hi16<br>
+ : ARM::fixup_arm_movt_hi16);<br>
break;<br>
case ARMMCExpr::VK_ARM_LO16:<br>
- if (!isTargetMachO(STI) && EvaluateAsPCRel(E))<br>
- Kind = MCFixupKind(isThumb2(STI)<br>
- ? ARM::fixup_t2_movw_lo16_pcrel<br>
- : ARM::fixup_arm_movw_lo16_pcrel);<br>
- else<br>
- Kind = MCFixupKind(isThumb2(STI)<br>
- ? ARM::fixup_t2_movw_lo16<br>
- : ARM::fixup_arm_movw_lo16);<br>
+ Kind = MCFixupKind(isThumb2(STI) ? ARM::fixup_t2_movw_lo16<br>
+ : ARM::fixup_arm_movw_lo16);<br>
break;<br>
}<br>
Fixups.push_back(MCFixup::Create(0, E, Kind, MI.getLoc()));<br>
@@ -1050,14 +1025,8 @@ ARMMCCodeEmitter::getHiLo16ImmOpValue(co<br>
// it's just a plain immediate expression, and those evaluate to<br>
// the lower 16 bits of the expression regardless of whether<br>
// we have a movt or a movw.<br>
- if (!isTargetMachO(STI) && EvaluateAsPCRel(E))<br>
- Kind = MCFixupKind(isThumb2(STI)<br>
- ? ARM::fixup_t2_movw_lo16_pcrel<br>
- : ARM::fixup_arm_movw_lo16_pcrel);<br>
- else<br>
- Kind = MCFixupKind(isThumb2(STI)<br>
- ? ARM::fixup_t2_movw_lo16<br>
- : ARM::fixup_arm_movw_lo16);<br>
+ Kind = MCFixupKind(isThumb2(STI) ? ARM::fixup_t2_movw_lo16<br>
+ : ARM::fixup_arm_movw_lo16);<br>
Fixups.push_back(MCFixup::Create(0, E, Kind, MI.getLoc()));<br>
return 0;<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp (original)<br>
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp Sat Mar 29 01:26:49 2014<br>
@@ -123,23 +123,19 @@ static bool getARMFixupKindMachOInfo(uns<br>
// 0 - arm instructions<br>
// 1 - thumb instructions<br>
case ARM::fixup_arm_movt_hi16:<br>
- case ARM::fixup_arm_movt_hi16_pcrel:<br>
RelocType = unsigned(MachO::ARM_RELOC_HALF);<br>
Log2Size = 1;<br>
return true;<br>
case ARM::fixup_t2_movt_hi16:<br>
- case ARM::fixup_t2_movt_hi16_pcrel:<br>
RelocType = unsigned(MachO::ARM_RELOC_HALF);<br>
Log2Size = 3;<br>
return true;<br>
<br>
case ARM::fixup_arm_movw_lo16:<br>
- case ARM::fixup_arm_movw_lo16_pcrel:<br>
RelocType = unsigned(MachO::ARM_RELOC_HALF);<br>
Log2Size = 0;<br>
return true;<br>
case ARM::fixup_t2_movw_lo16:<br>
- case ARM::fixup_t2_movw_lo16_pcrel:<br>
RelocType = unsigned(MachO::ARM_RELOC_HALF);<br>
Log2Size = 2;<br>
return true;<br>
@@ -206,7 +202,6 @@ RecordARMScatteredHalfRelocation(MachObj<br>
switch ((unsigned)Fixup.getKind()) {<br>
default: break;<br>
case ARM::fixup_arm_movt_hi16:<br>
- case ARM::fixup_arm_movt_hi16_pcrel:<br>
MovtBit = 1;<br>
// The thumb bit shouldn't be set in the 'other-half' bit of the<br>
// relocation, but it will be set in FixedValue if the base symbol<br>
@@ -215,13 +210,11 @@ RecordARMScatteredHalfRelocation(MachObj<br>
FixedValue &= 0xfffffffe;<br>
break;<br>
case ARM::fixup_t2_movt_hi16:<br>
- case ARM::fixup_t2_movt_hi16_pcrel:<br>
if (A_SD->getFlags() & SF_ThumbFunc)<br>
FixedValue &= 0xfffffffe;<br>
MovtBit = 1;<br>
// Fallthrough<br>
case ARM::fixup_t2_movw_lo16:<br>
- case ARM::fixup_t2_movw_lo16_pcrel:<br>
ThumbBit = 1;<br>
break;<br>
}<br>
@@ -465,15 +458,11 @@ void ARMMachObjectWriter::RecordRelocati<br>
switch ((unsigned)Fixup.getKind()) {<br>
default: break;<br>
case ARM::fixup_arm_movw_lo16:<br>
- case ARM::fixup_arm_movw_lo16_pcrel:<br>
case ARM::fixup_t2_movw_lo16:<br>
- case ARM::fixup_t2_movw_lo16_pcrel:<br>
Value = (FixedValue >> 16) & 0xffff;<br>
break;<br>
case ARM::fixup_arm_movt_hi16:<br>
- case ARM::fixup_arm_movt_hi16_pcrel:<br>
case ARM::fixup_t2_movt_hi16:<br>
- case ARM::fixup_t2_movt_hi16_pcrel:<br>
Value = FixedValue & 0xffff;<br>
break;<br>
}<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp Sat Mar 29 01:26:49 2014<br>
@@ -116,7 +116,8 @@ MCObjectWriter *MipsAsmBackend::createOb<br>
/// data fragment, at the offset specified by the fixup and following the<br>
/// fixup kind as appropriate.<br>
void MipsAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,<br>
- unsigned DataSize, uint64_t Value) const {<br>
+ unsigned DataSize, uint64_t Value,<br>
+ bool IsPCRel) const {<br>
MCFixupKind Kind = Fixup.getKind();<br>
Value = adjustFixupValue(Fixup, Value);<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h (original)<br>
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h Sat Mar 29 01:26:49 2014<br>
@@ -40,7 +40,7 @@ public:<br>
MCObjectWriter *createObjectWriter(raw_ostream &OS) const;<br>
<br>
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,<br>
- uint64_t Value) const;<br>
+ uint64_t Value, bool IsPCRel) const;<br>
<br>
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const;<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h (original)<br>
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h Sat Mar 29 01:26:49 2014<br>
@@ -120,34 +120,6 @@ namespace MipsII {<br>
FormMask = 15<br>
};<br>
}<br>
-<br>
-inline static std::pair<const MCSymbolRefExpr*, int64_t><br>
-MipsGetSymAndOffset(const MCFixup &Fixup) {<br>
- MCFixupKind FixupKind = Fixup.getKind();<br>
-<br>
- if ((FixupKind < FirstTargetFixupKind) ||<br>
- (FixupKind >= MCFixupKind(Mips::LastTargetFixupKind)))<br>
- return std::make_pair((const MCSymbolRefExpr*)0, (int64_t)0);<br>
-<br>
- const MCExpr *Expr = Fixup.getValue();<br>
- MCExpr::ExprKind Kind = Expr->getKind();<br>
-<br>
- if (Kind == MCExpr::Binary) {<br>
- const MCBinaryExpr *BE = static_cast<const MCBinaryExpr*>(Expr);<br>
- const MCExpr *LHS = BE->getLHS();<br>
- const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(BE->getRHS());<br>
-<br>
- if ((LHS->getKind() != MCExpr::SymbolRef) || !CE)<br>
- return std::make_pair((const MCSymbolRefExpr*)0, (int64_t)0);<br>
-<br>
- return std::make_pair(cast<MCSymbolRefExpr>(LHS), CE->getValue());<br>
- }<br>
-<br>
- if (Kind != MCExpr::SymbolRef)<br>
- return std::make_pair((const MCSymbolRefExpr*)0, (int64_t)0);<br>
-<br>
- return std::make_pair(cast<MCSymbolRefExpr>(Expr), 0);<br>
-}<br>
}<br>
<br>
#endif<br>
<br>
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp (original)<br>
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp Sat Mar 29 01:26:49 2014<br>
@@ -21,17 +21,6 @@<br>
using namespace llvm;<br>
<br>
namespace {<br>
- struct RelEntry {<br>
- RelEntry(const ELFRelocationEntry &R, const MCSymbol *S, int64_t O) :<br>
- Reloc(R), Sym(S), Offset(O) {}<br>
- ELFRelocationEntry Reloc;<br>
- const MCSymbol *Sym;<br>
- int64_t Offset;<br>
- };<br>
-<br>
- typedef std::list<RelEntry> RelLs;<br>
- typedef RelLs::iterator RelLsIter;<br>
-<br>
class MipsELFObjectWriter : public MCELFObjectTargetWriter {<br>
public:<br>
MipsELFObjectWriter(bool _is64Bit, uint8_t OSABI,<br>
@@ -41,13 +30,7 @@ namespace {<br>
<br>
unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,<br>
bool IsPCRel) const override;<br>
- virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const;<br>
- virtual void sortRelocs(const MCAssembler &Asm,<br>
- std::vector<ELFRelocationEntry> &Relocs);<br>
+ bool needsRelocateWithSymbol(unsigned Type) const override;<br>
};<br>
}<br>
<br>
@@ -59,21 +42,6 @@ MipsELFObjectWriter::MipsELFObjectWriter<br>
<br>
MipsELFObjectWriter::~MipsELFObjectWriter() {}<br>
<br>
-const MCSymbol *MipsELFObjectWriter::ExplicitRelSym(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const {<br>
- assert(Target.getSymA() && "SymA cannot be 0.");<br>
- const MCSymbol &Sym = Target.getSymA()->getSymbol().AliasedSymbol();<br>
-<br>
- if (Sym.getSection().getKind().isMergeableCString() ||<br>
- Sym.getSection().getKind().isMergeableConst())<br>
- return &Sym;<br>
-<br>
- return NULL;<br>
-}<br>
-<br>
unsigned MipsELFObjectWriter::GetRelocType(const MCValue &Target,<br>
const MCFixup &Fixup,<br>
bool IsPCRel) const {<br>
@@ -229,91 +197,23 @@ unsigned MipsELFObjectWriter::GetRelocTy<br>
return Type;<br>
}<br>
<br>
-// Return true if R is either a GOT16 against a local symbol or HI16.<br>
-static bool NeedsMatchingLo(const MCAssembler &Asm, const RelEntry &R) {<br>
- if (!R.Sym)<br>
- return false;<br>
-<br>
- MCSymbolData &SD = Asm.getSymbolData(R.Sym->AliasedSymbol());<br>
-<br>
- return ((R.Reloc.Type == ELF::R_MIPS_GOT16) && !SD.isExternal()) ||<br>
- (R.Reloc.Type == ELF::R_MIPS_HI16);<br>
-}<br>
+bool<br>
+MipsELFObjectWriter::needsRelocateWithSymbol(unsigned Type) const {<br>
+ // FIXME: This is extremelly conservative. This really needs to use a<br>
+ // whitelist with a clear explanation for why each realocation needs to<br>
+ // point to the symbol, not to the section.<br>
+ switch (Type) {<br>
+ default:<br>
+ return true;<br>
<br>
-static bool HasMatchingLo(const MCAssembler &Asm, RelLsIter I, RelLsIter Last) {<br>
- if (I == Last)<br>
+ case ELF::R_MIPS_26:<br>
+ case ELF::R_MIPS_LO16:<br>
+ case ELF::R_MIPS_HI16:<br>
+ case ELF::R_MIPS_32:<br>
+ case ELF::R_MIPS_64:<br>
+ case ELF::R_MIPS_GPREL16:<br>
return false;<br>
-<br>
- RelLsIter Hi = I++;<br>
-<br>
- return (I->Reloc.Type == ELF::R_MIPS_LO16) && (Hi->Sym == I->Sym) &&<br>
- (Hi->Offset == I->Offset);<br>
-}<br>
-<br>
-static bool HasSameSymbol(const RelEntry &R0, const RelEntry &R1) {<br>
- return R0.Sym == R1.Sym;<br>
-}<br>
-<br>
-static int CompareOffset(const RelEntry &R0, const RelEntry &R1) {<br>
- return (R0.Offset > R1.Offset) ? 1 : ((R0.Offset == R1.Offset) ? 0 : -1);<br>
-}<br>
-<br>
-void MipsELFObjectWriter::sortRelocs(const MCAssembler &Asm,<br>
- std::vector<ELFRelocationEntry> &Relocs) {<br>
- // Call the default function first. Relocations are sorted in descending<br>
- // order of r_offset.<br>
- MCELFObjectTargetWriter::sortRelocs(Asm, Relocs);<br>
-<br>
- RelLs RelocLs;<br>
- std::vector<RelLsIter> Unmatched;<br>
-<br>
- // Fill RelocLs. Traverse Relocs backwards so that relocations in RelocLs<br>
- // are in ascending order of r_offset.<br>
- for (std::vector<ELFRelocationEntry>::reverse_iterator R = Relocs.rbegin();<br>
- R != Relocs.rend(); ++R) {<br>
- std::pair<const MCSymbolRefExpr*, int64_t> P =<br>
- MipsGetSymAndOffset(*R->Fixup);<br>
- RelocLs.push_back(RelEntry(*R, P.first ? &P.first->getSymbol() : 0,<br>
- P.second));<br>
- }<br>
-<br>
- // Get list of unmatched HI16 and GOT16.<br>
- for (RelLsIter R = RelocLs.begin(); R != RelocLs.end(); ++R)<br>
- if (NeedsMatchingLo(Asm, *R) && !HasMatchingLo(Asm, R, --RelocLs.end()))<br>
- Unmatched.push_back(R);<br>
-<br>
- // Insert unmatched HI16 and GOT16 immediately before their matching LO16.<br>
- for (std::vector<RelLsIter>::iterator U = Unmatched.begin();<br>
- U != Unmatched.end(); ++U) {<br>
- RelLsIter LoPos = RelocLs.end(), HiPos = *U;<br>
- bool MatchedLo = false;<br>
-<br>
- for (RelLsIter R = RelocLs.begin(); R != RelocLs.end(); ++R) {<br>
- if ((R->Reloc.Type == ELF::R_MIPS_LO16) && HasSameSymbol(*HiPos, *R) &&<br>
- (CompareOffset(*R, *HiPos) >= 0) &&<br>
- ((LoPos == RelocLs.end()) || ((CompareOffset(*R, *LoPos) < 0)) ||<br>
- (!MatchedLo && !CompareOffset(*R, *LoPos))))<br>
- LoPos = R;<br>
-<br>
- MatchedLo = NeedsMatchingLo(Asm, *R) &&<br>
- HasMatchingLo(Asm, R, --RelocLs.end());<br>
- }<br>
-<br>
- // If a matching LoPos was found, move HiPos and insert it before LoPos.<br>
- // Make the offsets of HiPos and LoPos match.<br>
- if (LoPos != RelocLs.end()) {<br>
- HiPos->Offset = LoPos->Offset;<br>
- RelocLs.insert(LoPos, *HiPos);<br>
- RelocLs.erase(HiPos);<br>
- }<br>
}<br>
-<br>
- // Put the sorted list back in reverse order.<br>
- assert(Relocs.size() == RelocLs.size());<br>
- unsigned I = RelocLs.size();<br>
-<br>
- for (RelLsIter R = RelocLs.begin(); R != RelocLs.end(); ++R)<br>
- Relocs[--I] = R->Reloc;<br>
}<br>
<br>
MCObjectWriter *llvm::createMipsELFObjectWriter(raw_ostream &OS,<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp Sat Mar 29 01:26:49 2014<br>
@@ -110,7 +110,7 @@ public:<br>
}<br>
<br>
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,<br>
- uint64_t Value) const {<br>
+ uint64_t Value, bool IsPCRel) const {<br>
Value = adjustFixupValue(Fixup.getKind(), Value);<br>
if (!Value) return; // Doesn't change encoding.<br>
<br>
<br>
Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp (original)<br>
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp Sat Mar 29 01:26:49 2014<br>
@@ -30,14 +30,6 @@ namespace {<br>
bool IsPCRel) const;<br>
unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,<br>
bool IsPCRel) const override;<br>
- virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const;<br>
- virtual const MCSymbol *undefinedExplicitRelSym(const MCValue &Target,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const;<br>
};<br>
}<br>
<br>
@@ -386,54 +378,6 @@ unsigned PPCELFObjectWriter::GetRelocTyp<br>
return getRelocTypeInner(Target, Fixup, IsPCRel);<br>
}<br>
<br>
-const MCSymbol *PPCELFObjectWriter::ExplicitRelSym(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const {<br>
- assert(Target.getSymA() && "SymA cannot be 0");<br>
- MCSymbolRefExpr::VariantKind Modifier = Fixup.getAccessVariant();<br>
-<br>
- bool EmitThisSym;<br>
- switch (Modifier) {<br>
- // GOT references always need a relocation, even if the<br>
- // target symbol is local.<br>
- case MCSymbolRefExpr::VK_GOT:<br>
- case MCSymbolRefExpr::VK_PPC_GOT_LO:<br>
- case MCSymbolRefExpr::VK_PPC_GOT_HI:<br>
- case MCSymbolRefExpr::VK_PPC_GOT_HA:<br>
- EmitThisSym = true;<br>
- break;<br>
- default:<br>
- EmitThisSym = false;<br>
- break;<br>
- }<br>
-<br>
- if (EmitThisSym)<br>
- return &Target.getSymA()->getSymbol().AliasedSymbol();<br>
- return NULL;<br>
-}<br>
-<br>
-const MCSymbol *PPCELFObjectWriter::undefinedExplicitRelSym(const MCValue &Target,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const {<br>
- assert(Target.getSymA() && "SymA cannot be 0");<br>
- const MCSymbol &Symbol = Target.getSymA()->getSymbol().AliasedSymbol();<br>
-<br>
- unsigned RelocType = getRelocTypeInner(Target, Fixup, IsPCRel);<br>
-<br>
- // The .odp creation emits a relocation against the symbol ".TOC." which<br>
- // create a R_PPC64_TOC relocation. However the relocation symbol name<br>
- // in final object creation should be NULL, since the symbol does not<br>
- // really exist, it is just the reference to TOC base for the current<br>
- // object file.<br>
- bool EmitThisSym = RelocType != ELF::R_PPC64_TOC;<br>
-<br>
- if (EmitThisSym && !Symbol.isTemporary())<br>
- return &Symbol;<br>
- return NULL;<br>
-}<br>
-<br>
MCObjectWriter *llvm::createPPCELFObjectWriter(raw_ostream &OS,<br>
bool Is64Bit,<br>
bool IsLittleEndian,<br>
<br>
Modified: llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/R600/MCTargetDesc/AMDGPUAsmBackend.cpp Sat Mar 29 01:26:49 2014<br>
@@ -27,11 +27,10 @@ public:<br>
const MCAsmLayout &Layout) {<br>
//XXX: Implement if necessary.<br>
}<br>
- virtual void RecordRelocation(const MCAssembler &Asm,<br>
- const MCAsmLayout &Layout,<br>
- const MCFragment *Fragment,<br>
- const MCFixup &Fixup,<br>
- MCValue Target, uint64_t &FixedValue) {<br>
+ void RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout,<br>
+ const MCFragment *Fragment, const MCFixup &Fixup,<br>
+ MCValue Target, bool &IsPCRel,<br>
+ uint64_t &FixedValue) override {<br>
assert(!"Not implemented");<br>
}<br>
<br>
@@ -46,7 +45,7 @@ public:<br>
<br>
virtual unsigned getNumFixupKinds() const { return 0; };<br>
virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,<br>
- uint64_t Value) const;<br>
+ uint64_t Value, bool IsPCRel) const;<br>
virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,<br>
const MCRelaxableFragment *DF,<br>
const MCAsmLayout &Layout) const {<br>
@@ -71,7 +70,8 @@ void AMDGPUMCObjectWriter::WriteObject(M<br>
}<br>
<br>
void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,<br>
- unsigned DataSize, uint64_t Value) const {<br>
+ unsigned DataSize, uint64_t Value,<br>
+ bool IsPCRel) const {<br>
<br>
uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset());<br>
assert(Fixup.getKind() == FK_PCRel_4);<br>
<br>
Modified: llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp Sat Mar 29 01:26:49 2014<br>
@@ -229,7 +229,7 @@ namespace {<br>
SparcAsmBackend(T), OSType(OSType) { }<br>
<br>
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,<br>
- uint64_t Value) const {<br>
+ uint64_t Value, bool IsPCRel) const {<br>
<br>
Value = adjustFixupValue(Fixup.getKind(), Value);<br>
if (!Value) return; // Doesn't change encoding.<br>
<br>
Modified: llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp (original)<br>
+++ llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp Sat Mar 29 01:26:49 2014<br>
@@ -30,12 +30,6 @@ namespace {<br>
protected:<br>
unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,<br>
bool IsPCRel) const override;<br>
-<br>
- virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const;<br>
};<br>
}<br>
<br>
@@ -110,23 +104,6 @@ unsigned SparcELFObjectWriter::GetRelocT<br>
return ELF::R_SPARC_NONE;<br>
}<br>
<br>
-const MCSymbol *SparcELFObjectWriter::ExplicitRelSym(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const {<br>
-<br>
- if (!Target.getSymA())<br>
- return NULL;<br>
- switch((unsigned)Fixup.getKind()) {<br>
- default: break;<br>
- case Sparc::fixup_sparc_got22:<br>
- case Sparc::fixup_sparc_got10:<br>
- return &Target.getSymA()->getSymbol().AliasedSymbol();<br>
- }<br>
- return NULL;<br>
-}<br>
-<br>
MCObjectWriter *llvm::createSparcELFObjectWriter(raw_ostream &OS,<br>
bool Is64Bit,<br>
uint8_t OSABI) {<br>
<br>
Modified: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp Sat Mar 29 01:26:49 2014<br>
@@ -48,7 +48,7 @@ public:<br>
}<br>
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;<br>
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,<br>
- uint64_t Value) const override;<br>
+ uint64_t Value, bool IsPCRel) const override;<br>
bool mayNeedRelaxation(const MCInst &Inst) const override {<br>
return false;<br>
}<br>
@@ -85,7 +85,8 @@ SystemZMCAsmBackend::getFixupKindInfo(MC<br>
}<br>
<br>
void SystemZMCAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,<br>
- unsigned DataSize, uint64_t Value) const {<br>
+ unsigned DataSize, uint64_t Value,<br>
+ bool IsPCRel) const {<br>
MCFixupKind Kind = Fixup.getKind();<br>
unsigned Offset = Fixup.getOffset();<br>
unsigned Size = (getFixupKindInfo(Kind).TargetSize + 7) / 8;<br>
<br>
Modified: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp (original)<br>
+++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp Sat Mar 29 01:26:49 2014<br>
@@ -26,9 +26,6 @@ protected:<br>
// Override MCELFObjectTargetWriter.<br>
unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,<br>
bool IsPCRel) const override;<br>
- const MCSymbol *ExplicitRelSym(const MCAssembler &Asm, const MCValue &Target,<br>
- const MCFragment &F, const MCFixup &Fixup,<br>
- bool IsPCRel) const override;<br>
};<br>
} // end anonymous namespace<br>
<br>
@@ -111,21 +108,6 @@ unsigned SystemZObjectWriter::GetRelocTy<br>
}<br>
}<br>
<br>
-const MCSymbol *SystemZObjectWriter::ExplicitRelSym(const MCAssembler &Asm,<br>
- const MCValue &Target,<br>
- const MCFragment &F,<br>
- const MCFixup &Fixup,<br>
- bool IsPCRel) const {<br>
- // The addend in a PC-relative R_390_* relocation is always applied to<br>
- // the PC-relative part of the address. If some kind of indirection<br>
- // is applied to the symbol first, we can't use an addend there too.<br>
- if (!Target.isAbsolute() &&<br>
- Target.getSymA()->getKind() != MCSymbolRefExpr::VK_None &&<br>
- IsPCRel)<br>
- return &Target.getSymA()->getSymbol().AliasedSymbol();<br>
- return NULL;<br>
-}<br>
-<br>
MCObjectWriter *llvm::createSystemZObjectWriter(raw_ostream &OS,<br>
uint8_t OSABI) {<br>
MCELFObjectTargetWriter *MOTW = new SystemZObjectWriter(OSABI);<br>
<br>
Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp Sat Mar 29 01:26:49 2014<br>
@@ -100,7 +100,7 @@ public:<br>
}<br>
<br>
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,<br>
- uint64_t Value) const override {<br>
+ uint64_t Value, bool IsPCRel) const override {<br>
unsigned Size = 1 << getFixupKindLog2Size(Fixup.getKind());<br>
<br>
assert(Fixup.getOffset() + Size <= DataSize &&<br>
<br>
Modified: llvm/trunk/test/MC/ARM/arm-elf-symver.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/arm-elf-symver.s?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/arm-elf-symver.s?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ARM/arm-elf-symver.s (original)<br>
+++ llvm/trunk/test/MC/ARM/arm-elf-symver.s Sat Mar 29 01:26:49 2014<br>
@@ -24,16 +24,16 @@ global1:<br>
<br>
@ CHECK: Relocations [<br>
@ CHECK-NEXT: Section (2) .rel.text {<br>
-@ CHECK-NEXT: 0x0 R_ARM_ABS32 defined1 0x0<br>
+@ CHECK-NEXT: 0x0 R_ARM_ABS32 .text 0x0<br>
@ CHECK-NEXT: 0x4 R_ARM_ABS32 bar2@zed 0x0<br>
-@ CHECK-NEXT: 0x8 R_ARM_ABS32 defined2 0x0<br>
-@ CHECK-NEXT: 0xC R_ARM_ABS32 defined3 0x0<br>
+@ CHECK-NEXT: 0x8 R_ARM_ABS32 .text 0x0<br>
+@ CHECK-NEXT: 0xC R_ARM_ABS32 .text 0x0<br>
@ CHECK-NEXT: 0x10 R_ARM_ABS32 bar6@zed 0x0<br>
@ CHECK-NEXT: }<br>
@ CHECK-NEXT: ]<br>
<br>
@ CHECK: Symbol {<br>
-@ CHECK: Name: bar1@zed (28)<br>
+@ CHECK: Name: bar1@zed<br>
@ CHECK-NEXT: Value: 0x0<br>
@ CHECK-NEXT: Size: 0<br>
@ CHECK-NEXT: Binding: Local (0x0)<br>
@@ -42,7 +42,7 @@ global1:<br>
@ CHECK-NEXT: Section: .text (0x1)<br>
@ CHECK-NEXT: }<br>
@ CHECK-NEXT: Symbol {<br>
-@ CHECK-NEXT: Name: bar3@@zed (46)<br>
+@ CHECK-NEXT: Name: bar3@@zed<br>
@ CHECK-NEXT: Value: 0x0<br>
@ CHECK-NEXT: Size: 0<br>
@ CHECK-NEXT: Binding: Local (0x0)<br>
@@ -51,7 +51,7 @@ global1:<br>
@ CHECK-NEXT: Section: .text (0x1)<br>
@ CHECK-NEXT: }<br>
@ CHECK-NEXT: Symbol {<br>
-@ CHECK-NEXT: Name: bar5@@zed (56)<br>
+@ CHECK-NEXT: Name: bar5@@zed<br>
@ CHECK-NEXT: Value: 0x0<br>
@ CHECK-NEXT: Size: 0<br>
@ CHECK-NEXT: Binding: Local (0x0)<br>
@@ -60,7 +60,7 @@ global1:<br>
@ CHECK-NEXT: Section: .text (0x1)<br>
@ CHECK-NEXT: }<br>
@ CHECK-NEXT: Symbol {<br>
-@ CHECK-NEXT: Name: defined1 (1)<br>
+@ CHECK-NEXT: Name: defined1<br>
@ CHECK-NEXT: Value: 0x0<br>
@ CHECK-NEXT: Size: 0<br>
@ CHECK-NEXT: Binding: Local (0x0)<br>
@@ -69,16 +69,7 @@ global1:<br>
@ CHECK-NEXT: Section: .text (0x1)<br>
@ CHECK-NEXT: }<br>
@ CHECK-NEXT: Symbol {<br>
-@ CHECK-NEXT: Name: defined2 (10)<br>
-@ CHECK-NEXT: Value: 0x0<br>
-@ CHECK-NEXT: Size: 0<br>
-@ CHECK-NEXT: Binding: Local (0x0)<br>
-@ CHECK-NEXT: Type: None (0x0)<br>
-@ CHECK-NEXT: Other: 0<br>
-@ CHECK-NEXT: Section: .text (0x1)<br>
-@ CHECK-NEXT: }<br>
-@ CHECK-NEXT: Symbol {<br>
-@ CHECK-NEXT: Name: defined3 (19)<br>
+@ CHECK-NEXT: Name: defined2<br>
@ CHECK-NEXT: Value: 0x0<br>
@ CHECK-NEXT: Size: 0<br>
@ CHECK-NEXT: Binding: Local (0x0)<br>
@@ -114,7 +105,7 @@ global1:<br>
@ CHECK-NEXT: Section: .bss (0x4)<br>
@ CHECK-NEXT: }<br>
@ CHECK-NEXT: Symbol {<br>
-@ CHECK-NEXT: Name: g1@@zed (88)<br>
+@ CHECK-NEXT: Name: g1@@zed<br>
@ CHECK-NEXT: Value: 0x14<br>
@ CHECK-NEXT: Size: 0<br>
@ CHECK-NEXT: Binding: Global (0x1)<br>
@@ -123,7 +114,7 @@ global1:<br>
@ CHECK-NEXT: Section: .text (0x1)<br>
@ CHECK-NEXT: }<br>
@ CHECK-NEXT: Symbol {<br>
-@ CHECK-NEXT: Name: global1 (80)<br>
+@ CHECK-NEXT: Name: global1<br>
@ CHECK-NEXT: Value: 0x14<br>
@ CHECK-NEXT: Size: 0<br>
@ CHECK-NEXT: Binding: Global (0x1)<br>
@@ -132,7 +123,7 @@ global1:<br>
@ CHECK-NEXT: Section: .text (0x1)<br>
@ CHECK-NEXT: }<br>
@ CHECK-NEXT: Symbol {<br>
-@ CHECK-NEXT: Name: bar2@zed (37)<br>
+@ CHECK-NEXT: Name: bar2@zed<br>
@ CHECK-NEXT: Value: 0x0<br>
@ CHECK-NEXT: Size: 0<br>
@ CHECK-NEXT: Binding: Global (0x1)<br>
@@ -141,7 +132,7 @@ global1:<br>
@ CHECK-NEXT: Section: Undefined (0x0)<br>
@ CHECK-NEXT: }<br>
@ CHECK-NEXT: Symbol {<br>
-@ CHECK-NEXT: Name: bar6@zed (66)<br>
+@ CHECK-NEXT: Name: bar6@zed<br>
@ CHECK-NEXT: Value: 0x0<br>
@ CHECK-NEXT: Size: 0<br>
@ CHECK-NEXT: Binding: Global (0x1)<br>
<br>
Added: llvm/trunk/test/MC/ELF/bad-expr2.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/bad-expr2.s?rev=205076&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/bad-expr2.s?rev=205076&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ELF/bad-expr2.s (added)<br>
+++ llvm/trunk/test/MC/ELF/bad-expr2.s Sat Mar 29 01:26:49 2014<br>
@@ -0,0 +1,12 @@<br>
+// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o /dev/null \<br>
+// RUN: 2>&1 | FileCheck %s<br>
+<br>
+// CHECK: No relocation available to represent this relative expression<br>
+// CHECK: call foo - bar<br>
+<br>
+<br>
+ call foo - bar<br>
+ .section .foo<br>
+foo:<br>
+ .section .bar<br>
+bar:<br>
<br>
Added: llvm/trunk/test/MC/ELF/bad-expr3.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/bad-expr3.s?rev=205076&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/bad-expr3.s?rev=205076&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ELF/bad-expr3.s (added)<br>
+++ llvm/trunk/test/MC/ELF/bad-expr3.s Sat Mar 29 01:26:49 2014<br>
@@ -0,0 +1,10 @@<br>
+// RUN: not llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o /dev/null \<br>
+// RUN: 2>&1 | FileCheck %s<br>
+<br>
+// CHECK: Cannot represent a difference across sections<br>
+<br>
+ .long foo - bar<br>
+ .section .zed<br>
+foo:<br>
+ .section .bah<br>
+bar:<br>
<br>
Modified: llvm/trunk/test/MC/ELF/merge.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/merge.s?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/merge.s?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ELF/merge.s (original)<br>
+++ llvm/trunk/test/MC/ELF/merge.s Sat Mar 29 01:26:49 2014<br>
@@ -1,10 +1,7 @@<br>
// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -r | FileCheck %s<br>
<br>
-// Test that PIC relocations with local symbols in a mergeable section are done<br>
-// with a reference to the symbol. Not sure if this is a linker limitation,<br>
-// but this matches the behavior of gas.<br>
-<br>
-// Non-PIC relocations with 0 offset don't use the symbol.<br>
+// Test that relocations with local symbols in a mergeable section are done<br>
+// with a reference to the symbol if the offset is non zero.<br>
<br>
<br>
movsd .Lfoo(%rip), %xmm1<br>
@@ -13,6 +10,7 @@<br>
jmp foo@PLT<br>
movq foo@GOTPCREL, %rax<br>
movq zed, %rax<br>
+ movsd .Lfoo+4(%rip), %xmm1<br>
<br>
.section .sec1,"aM",@progbits,16<br>
.Lfoo:<br>
@@ -30,5 +28,6 @@ foo:<br>
// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_PLT32 foo 0x{{[^ ]+}}<br>
// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_GOTPCREL foo 0x{{[^ ]+}}<br>
// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_32S zed 0x{{[^ ]+}}<br>
+// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_PC32 .sec1 0x{{[^ ]+}}<br>
// CHECK-NEXT: }<br>
// CHECK-NEXT: ]<br>
<br>
Modified: llvm/trunk/test/MC/ELF/relocation-386.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-386.s?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-386.s?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ELF/relocation-386.s (original)<br>
+++ llvm/trunk/test/MC/ELF/relocation-386.s Sat Mar 29 01:26:49 2014<br>
@@ -5,7 +5,7 @@<br>
<br>
// CHECK: Relocations [<br>
// CHECK-NEXT: Section (2) .rel.text {<br>
-// CHECK-NEXT: 0x2 R_386_GOTOFF .Lfoo 0x0<br>
+// CHECK-NEXT: 0x2 R_386_GOTOFF .rodata.str1.16 0x0<br>
// CHECK-NEXT: 0x{{[^ ]+}} R_386_PLT32 bar2 0x0<br>
// CHECK-NEXT: 0x{{[^ ]+}} R_386_GOTPC _GLOBAL_OFFSET_TABLE_ 0x0<br>
// Relocation 3 (bar3@GOTOFF) is done with symbol 7 (bss)<br>
@@ -67,7 +67,7 @@<br>
<br>
// Symbol 4 is zed<br>
// CHECK: Symbol {<br>
-// CHECK: Name: zed (53)<br>
+// CHECK: Name: zed<br>
// CHECK-NEXT: Value: 0x0<br>
// CHECK-NEXT: Size: 0<br>
// CHECK-NEXT: Binding: Local<br>
<br>
Modified: llvm/trunk/test/MC/ELF/relocation-pc.s<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-pc.s?rev=205076&r1=205075&r2=205076&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/relocation-pc.s?rev=205076&r1=205075&r2=205076&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/MC/ELF/relocation-pc.s (original)<br>
+++ llvm/trunk/test/MC/ELF/relocation-pc.s Sat Mar 29 01:26:49 2014<br>
@@ -26,7 +26,7 @@<br>
// CHECK-NEXT: AddressAlignment: 8<br>
// CHECK-NEXT: EntrySize: 24<br>
// CHECK-NEXT: Relocations [<br>
-// CHECK-NEXT: 0x1 R_X86_64_PC8 - 0x0<br>
-// CHECK-NEXT: 0x3 R_X86_64_PC32 - 0x0<br>
+// CHECK-NEXT: 0x1 R_X86_64_PC8 - 0xFFFFFFFFFFFFFFFF<br>
+// CHECK-NEXT: 0x3 R_X86_64_PC32 - 0xFFFFFFFFFFFFFEFC<br>
// CHECK-NEXT: ]<br>
// CHECK-NEXT: }<br>
<br>
<br>
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</blockquote></div><br></div>