<div dir="ltr"><div class="gmail_default" style="font-family:arial,helvetica,sans-serif;font-size:small">CC mail list ...</div><br><div class="gmail_quote">---------- Forwarded message ----------<br>From: <b class="gmail_sendername">Jiangning Liu</b> <span dir="ltr"><<a href="mailto:liujiangning1@gmail.com">liujiangning1@gmail.com</a>></span><br>
Date: 2014-04-01 15:40 GMT+08:00<br>Subject: Re: [LLVMdev] 3.4.1 Release Plans<br>To: Tom Stellard <<a href="mailto:tom@stellard.net">tom@stellard.net</a>><br>Cc: <a href="mailto:llvmdev@cs.uiuc.edu">llvmdev@cs.uiuc.edu</a>, Ben Pope <<a href="mailto:benpope81@gmail.com">benpope81@gmail.com</a>>, Erik Verbruggen <<a href="mailto:erik.verbruggen@me.com">erik.verbruggen@me.com</a>><br>
<br><br><div dir="ltr"><div style="font-family:arial,helvetica,sans-serif;font-size:small">Hi Tom,</div><div style="font-family:arial,helvetica,sans-serif;font-size:small"><br></div><div style="font-family:arial,helvetica,sans-serif;font-size:small">
We want the following patches go into release 3.4.1.</div><div style="font-family:arial,helvetica,sans-serif;font-size:small"><br></div><div style="font-family:arial,helvetica,sans-serif;font-size:small">
Clang:<br></div><div style="font-family:arial,helvetica,sans-serif;font-size:small"><br></div><div><div><font face="arial, helvetica, sans-serif">196750<span style="white-space:pre-wrap"> </span>[AArch64]Add missing pair intrinsics such as: int32_t vminv_s32(int32x2_t a)</font></div>
<div><font face="arial, helvetica, sans-serif">196834<span style="white-space:pre-wrap"> </span>[AArch64] Remove q and non-q intrinsic definitions from the NEON scalar reduce pairwise implementation, using an overloaded definition instead.</font></div>
<div><font face="arial, helvetica, sans-serif">196835<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the NEON scalar reduce pairwise front-end codegen to remove unnecessary patterns in tablegen.</font></div>
<div><font face="arial, helvetica, sans-serif">196836<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the NEON scalar reduce pairwise intrinsics so that they use float/double rather than the vector equivalents when appropriate.</font></div>
<div><font face="arial, helvetica, sans-serif">196888<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Support poly128_t and implement relevant intrinsic.</font></div><div>
<font face="arial, helvetica, sans-serif">196927<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the Neon vector/scalar floating-point convert implementation. Specifically, reuse the ARM intrinsics when possible.</font></div>
<div><font face="arial, helvetica, sans-serif">196931<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the Neon vector/scalar floating-point convert intrinsics so that they use float/double rather than the vector equivalents when appropriate.</font></div>
<div><font face="arial, helvetica, sans-serif">196936<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the redundant code in the EmitAArch64ScalarBuiltinExpr() function. No functional change intended.</font></div>
<div><font face="arial, helvetica, sans-serif">196966<span style="white-space:pre-wrap"> </span>[AArch64] Overload NEON signed/unsigned integer convert to floating-point LLVM AArch64 intrinsics.</font></div>
<div><font face="arial, helvetica, sans-serif">196967<span style="white-space:pre-wrap"> </span>[AArch64] Overload NEON signed/unsigned floating-point convert to fixed-point and fixed-point convert to floating-point LLVM AArch64 intrinsics.</font></div>
<div><font face="arial, helvetica, sans-serif">196968<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the NEON signed/unsigned floating-point convert to fixed-point LLVM AArch64 intrinsics to use f32/f64, rather than their vector equivalents.</font></div>
<div><font face="arial, helvetica, sans-serif">196969<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the NEON floating-point absolute difference LLVM AArch64 intrinsic to use f32/f64 types, rather than their vector equivalents.</font></div>
<div><font face="arial, helvetica, sans-serif">197069<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the NEON scalar floating-point reciprocal estimate, floating-point reciprocal exponent, and floating-point reciprocal square root estimate</font></div>
<div><font face="arial, helvetica, sans-serif">197070<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the NEON scalar floating-point reciprocal step and floating-point reciprocal square root step LLVM AArch64 intrinsics to</font></div>
<div><font face="arial, helvetica, sans-serif">197071<span style="white-space:pre-wrap"> </span>[AArch64] Add NEON scalar floating-point compare LLVM AArch64 intrinsics that use f32/f64 types, rather than their vector equivalents.</font></div>
<div><font face="arial, helvetica, sans-serif">197091<span style="white-space:pre-wrap"> </span>[AArch64] Refactor NEON floating-point Max/Min/Maxnm/Minnm across vector AArch64 intrinsics to use f32 types, rather than their vector equivalents.</font></div>
<div><font face="arial, helvetica, sans-serif">197112<span style="white-space:pre-wrap"> </span>[AArch64] Fix Incorrect CHECK message [0-31]+ in test case.</font></div><div>
<font face="arial, helvetica, sans-serif">197403<span style="white-space:pre-wrap"> </span>[AArch64] Fix v1fx patterns for Floating-point Multiply Extend and Floating-point Compare to Zero.</font></div><div>
<font face="arial, helvetica, sans-serif">197898<span style="white-space:pre-wrap"> </span>[AArch64] The compare to zero intrinsics should be implemented by 'icmp/fcmp' and 'sext' not 'zext'. Modify the implementation by replacing zext with sext.</font></div>
<div><font face="arial, helvetica, sans-serif">197994<span style="white-space:pre-wrap"> </span>[AArch64] Add some missing test cases for ACLE intrinsics of AArch64 NEON.</font></div><div>
<font face="arial, helvetica, sans-serif">198195<span style="white-space:pre-wrap"> </span>[AArch64] For AArch64 Neon, simplify scalar dup by lane0 for fp.</font></div><div><font face="arial, helvetica, sans-serif">198741<span style="white-space:pre-wrap"> </span>[AArch64] For AArch64, support builtin neon vector type with 'long' as base element type.</font></div>
<div><font face="arial, helvetica, sans-serif">199866<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Fix a bug about vcles_f32 and vcled_f64.</font></div><div><font face="arial, helvetica, sans-serif">200114<span style="white-space:pre-wrap"> </span>[AArch64] For AArch64 Neon, fix intrinsics implementation using nested macros.</font></div>
<div><font face="arial, helvetica, sans-serif">200470<span style="white-space:pre-wrap"> </span>ARM & AArch64: share the BI__builtin_neon enum defs.</font></div><div><font face="arial, helvetica, sans-serif">200471<span style="white-space:pre-wrap"> </span>ARM & AArch64: fully share NEON implementation of permutation intrinsics</font></div>
<div><font face="arial, helvetica, sans-serif">200472<span style="white-space:pre-wrap"> </span>ARM & AArch64: extend shared NEON implementation to first block.</font></div><div>
<font face="arial, helvetica, sans-serif">200524<span style="white-space:pre-wrap"> </span>ARM & AArch64: merge another NEON block completely.</font></div><div><font face="arial, helvetica, sans-serif">200525<span style="white-space:pre-wrap"> </span>ARM & AArch64: more instructions into common block</font></div>
<div><font face="arial, helvetica, sans-serif">200526<span style="white-space:pre-wrap"> </span>ARM & AArch64: move shared vld/vst intrinsics to common implementation.</font></div><div>
<font face="arial, helvetica, sans-serif">200527<span style="white-space:pre-wrap"> </span>ARM & AArch64: another block of miscellaneous NEON sharing.</font></div><div><font face="arial, helvetica, sans-serif">200528<span style="white-space:pre-wrap"> </span>ARM & AArch64: unify the rest of the completely shared NEON implementations</font></div>
<div><font face="arial, helvetica, sans-serif">200707<span style="white-space:pre-wrap"> </span>[AArch64] AArch64: use new non-polymorphic crypto intrinsics This was caused by r200708 which enabled the crypto feature for these cores.</font></div>
<div><font face="arial, helvetica, sans-serif">200708<span style="white-space:pre-wrap"> </span>ARM: implement support for crypto intrinsics in arm_neon.h</font></div><div><font face="arial, helvetica, sans-serif">200769<span style="white-space:pre-wrap"> </span>ARM & AArch64: combine implementation of vcaXYZ intrinsics</font></div>
<div><font face="arial, helvetica, sans-serif">201112<span style="white-space:pre-wrap"> </span>[AArch64] Fixed vget/vset_lane_f16 implementation</font></div><div><font face="arial, helvetica, sans-serif">201384<span style="white-space:pre-wrap"> </span>[AArch64] Enable AArch64 NEON by default.</font></div>
<div><font face="arial, helvetica, sans-serif">202004<span style="white-space:pre-wrap"> </span>[AArch64] Change int64_t from 'long long int' to 'long int' for AArch64 target.</font></div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small"><br></div><div style="font-family:arial,helvetica,sans-serif;font-size:small">LLVM:</div><div style="font-family:arial,helvetica,sans-serif;font-size:small">
<br></div><div><div><font face="arial, helvetica, sans-serif">196748<span style="white-space:pre-wrap"> </span>[AArch64]Pattern match failures for truncate store and extend load</font></div><div><font face="arial, helvetica, sans-serif">196749<span style="white-space:pre-wrap"> </span>[AArch64]Add missing pair intrinsics such as: int32_t vminv_s32(int32x2_t a)</font></div>
<div><font face="arial, helvetica, sans-serif">196831<span style="white-space:pre-wrap"> </span>[AArch64] Remove q and non-q intrinsic definitions in the NEON scalar reduce pairwise implementation, using an overloaded definition instead.</font></div>
<div><font face="arial, helvetica, sans-serif">196832<span style="white-space:pre-wrap"> </span>[AArch64] Refactor NEON scalar reduce pairwise front-end codegen to remove unnecessary patterns in tablegen.</font></div>
<div><font face="arial, helvetica, sans-serif">196833<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the NEON scalar reduce pairwise intrinsics, so that they use float/double rather than the vector equivalents when appropriate.</font></div>
<div><font face="arial, helvetica, sans-serif">196887<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Support poly128_t and implement relevant intrinsic.</font></div><div><font face="arial, helvetica, sans-serif">196889<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Replace fpimm with fpz32 for floating compare with zero. This is a small change to be strict. Just want get pattern safer.</font></div>
<div><font face="arial, helvetica, sans-serif">196926<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the Neon vector/scalar floating-point convert implementation. Specifically, reuse the ARM intrinsics when possible.</font></div>
<div><font face="arial, helvetica, sans-serif">196930<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the Neon vector/scalar floating-point convert intrinsics so that they use float/double rather than the vector equivalents when appropriate.</font></div>
<div><font face="arial, helvetica, sans-serif">196962<span style="white-space:pre-wrap"> </span>[AArch64] Overload NEON signed/unsigned integer convert to floating-point LLVM AArch64 intrinsics.</font></div><div><font face="arial, helvetica, sans-serif">196963<span style="white-space:pre-wrap"> </span>[AArch64] Overload NEON signed/unsigned floating-point convert to fixed-point and fixed-point convert to floating-point LLVM AArch64 intrinsics.</font></div>
<div><font face="arial, helvetica, sans-serif">196964<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the NEON signed/unsigned floating-point convert to fixed-point LLVM AArch64 intrinsics to use f32/f64, rather than their vector equivalents.</font></div>
<div><font face="arial, helvetica, sans-serif">196965<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the NEON floating-point absolute difference LLVM AArch64 intrinsic to use f32/f64 types, rather than their vector equivalents.</font></div>
<div><font face="arial, helvetica, sans-serif">196998<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Get instruction BSL matched to VSELECT.</font></div><div><font face="arial, helvetica, sans-serif">197066<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the NEON scalar floating-point reciprocal estimate, floating- point reciprocal exponent, and floating-point reciprocal square root estimate</font></div>
<div><font face="arial, helvetica, sans-serif">197067<span style="white-space:pre-wrap"> </span>[AArch64] Refactor the NEON scalar floating-point reciprocal step and floating-point reciprocal square root step LLVM AArch64 intrinsics to</font></div>
<div><font face="arial, helvetica, sans-serif">197068<span style="white-space:pre-wrap"> </span>[AArch64] Add NEON scalar floating-point compare LLVM AArch64 intrinsics that use f32/f64 types, rather than their vector equivalents.</font></div>
<div><font face="arial, helvetica, sans-serif">197090<span style="white-space:pre-wrap"> </span>[AArch64] Refactor NEON floating-point Max/Min/Maxnm/Minnm across vector AArch64 intrinsics to use f32 types, rather than their vector equivalents.</font></div>
<div><font face="arial, helvetica, sans-serif">197113<span style="white-space:pre-wrap"> </span>Fix Incorrect CHECK message [0-31]+ in test case. In regular expression, [0-31]+ equals to [0-3]+, not the number from</font></div>
<div><font face="arial, helvetica, sans-serif">197135<span style="white-space:pre-wrap"> </span>[AArch64]Fix the problem that AArch64 backend fails to select scalar_to_vector of vector types having more than one element.</font></div>
<div><font face="arial, helvetica, sans-serif">197159<span style="white-space:pre-wrap"> </span>[AArch64] Removed unnecessary copy patterns with v1fx types.</font></div><div><font face="arial, helvetica, sans-serif">197250<span style="white-space:pre-wrap"> </span>[AArch64] Simplify the Neon Scalar3Same patterns for floating-point reciprocal step, floating-point reciprocal square root step, floating-point absolute</font></div>
<div><font face="arial, helvetica, sans-serif">197361<span style="white-space:pre-wrap"> </span>[AArch64]Fix the pattern match failure for v1i8/v1i16/v1i32 types. Currently we have such types as legal vector types. The DAG combiner may generate some DAG nodes having such types but we don't have patterns to match them.</font></div>
<div><font face="arial, helvetica, sans-serif">197402<span style="white-space:pre-wrap"> </span>[AArch64] Fix v1fx patterns for Floating-point Multiply Extend and Floating-point Compare to Zero.</font></div><div><font face="arial, helvetica, sans-serif">197551<span style="white-space:pre-wrap"> </span>[AArch64 NEON]Implment loading vector constant form constant pool.</font></div>
<div><font face="arial, helvetica, sans-serif">197897<span style="white-space:pre-wrap"> </span>[AArch64]The compare to zero intrinsics should be implemented by 'icmp/fcmp' and 'sext' not 'zext'. Modify the test cases.</font></div>
<div><font face="arial, helvetica, sans-serif">197928<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Fixed fused multiply negate add/sub patterns</font></div><div><font face="arial, helvetica, sans-serif">197929<span style="white-space:pre-wrap"> </span>[AArch64] Check fmul node single use in fused multiply patterns</font></div>
<div><font face="arial, helvetica, sans-serif">197966<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Fix a pattern match failure with NEON_VDUP.</font></div><div><font face="arial, helvetica, sans-serif">197967<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Fix a bug when lowering BUILD_VECTOR.</font></div>
<div><font face="arial, helvetica, sans-serif">197969<span style="white-space:pre-wrap"> </span>[AArch64]Add patterns to match normal shift nodes: shl, sra and srl.</font></div><div><font face="arial, helvetica, sans-serif">197993<span style="white-space:pre-wrap"> </span>Add missing pattern matches to support ACLE intrinsics of AArch64 NEON.</font></div>
<div><font face="arial, helvetica, sans-serif">198001<span style="white-space:pre-wrap"> </span>[AArch64]Fix a problem that the register order of fmls/fmla by element is incorrect.</font></div><div><font face="arial, helvetica, sans-serif">198084<span style="white-space:pre-wrap"> </span>Teach DAGCombiner how to fold a SIGN_EXTEND_INREG of a BUILD_VECTOR of ConstantSDNodes (or UNDEFs) into a simple BUILD_VECTOR.</font></div>
<div><font face="arial, helvetica, sans-serif">198188<span style="white-space:pre-wrap"> </span>[AArch64]Fix the problem that can't select mul of v1i64/v2i64 types.</font></div><div><font face="arial, helvetica, sans-serif">198190<span style="white-space:pre-wrap"> </span>Fix a bug in DAGcombiner about zero-extend after setcc.</font></div>
<div><font face="arial, helvetica, sans-serif">198192<span style="white-space:pre-wrap"> </span>[AArch64]Can't select shift left 0 of type v1i64</font></div><div><font face="arial, helvetica, sans-serif">198193<span style="white-space:pre-wrap"> </span>[AArch64]Add code to spill/fill Q register tuples such as QPair/QTriple/QQuad.</font></div>
<div><font face="arial, helvetica, sans-serif">198194<span style="white-space:pre-wrap"> </span>For AArch64 Neon, simplify scalar dup by lane0 for fp.</font></div><div><font face="arial, helvetica, sans-serif">198437<span style="white-space:pre-wrap"> </span>[AArch64][NEON] Added SXTL and SXTL2 instruction aliases</font></div>
<div><font face="arial, helvetica, sans-serif">198675<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Fixed incorrect immediate used in BIC instruction.</font></div><div><font face="arial, helvetica, sans-serif">198682<span style="white-space:pre-wrap"> </span>[AArch64]Add support to copy D tuples such as DPair/DTriple/DQuad and Q tuples such as QPair/QTriple/QQuad. There is no test case for D tuple as the original test cases are too large. As the copy of the D tuple is similar to the Q tuple, the correctness can be guaranteed.</font></div>
<div><font face="arial, helvetica, sans-serif">198684<span style="white-space:pre-wrap"> </span>[AArch64]Add support to spill/fill D tuples such as DPair/DTriple/DQuad. There is no test cases for D tuple as the original test cases are too large. As the spill/fill of the D tuple is similar to the Q tuple, the correctness can be guaranteed.</font></div>
<div><font face="arial, helvetica, sans-serif">198730<span style="white-space:pre-wrap"> </span>Fix a bug about generating undef operand when optimising shuffle vector and insert element in instruction combine.</font></div>
<div><font face="arial, helvetica, sans-serif">198743<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Fix generating incorrect value type of NEON_VDUPLANE when lower build_vector if result value type mismatch with operand</font></div>
<div><font face="arial, helvetica, sans-serif">198791<span style="white-space:pre-wrap"> </span>[AArch64][NEON] Added UXTL and UXTL2 instruction aliases</font></div><div><font face="arial, helvetica, sans-serif">198937<span style="white-space:pre-wrap"> </span>Make sure -use-init-array has intended effect on all AArch64 ELF targets, not just linux.</font></div>
<div><font face="arial, helvetica, sans-serif">198941<span style="white-space:pre-wrap"> </span>Silence unused variable warning for non-asserting builds that was introduced in r198937.</font></div><div><font face="arial, helvetica, sans-serif">199069<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Add more scenarios to use perm instructions when lowering shuffle_vector</font></div>
<div><font face="arial, helvetica, sans-serif">199070<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Add missing patterns for bitcast from or to v1f64</font></div><div><font face="arial, helvetica, sans-serif">199242<span style="white-space:pre-wrap"> </span>[AArch64] Added vselect patterns with float and double types</font></div>
<div><font face="arial, helvetica, sans-serif">199296<span style="white-space:pre-wrap"> </span>For AArch64, lowering sext_inreg and generate optimized code by using SXTL.</font></div><div><font face="arial, helvetica, sans-serif">199369<span style="white-space:pre-wrap"> </span>For ARM, fix assertuib failures for some ld/st 3/4 instruction with wirteback.</font></div>
<div><font face="arial, helvetica, sans-serif">199461<span style="white-space:pre-wrap"> </span>[AArch64]Fix the problem can't select concat_vectors of two v1i32 types. Also fix the problem can't select scalar_to_vector from f32 to v2f32/v4f32.</font></div>
<div><font face="arial, helvetica, sans-serif">199462<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Custom lower conversion between vector integer and vector floating point if element bit-width doesn't match.</font></div>
<div><font face="arial, helvetica, sans-serif">199463<span style="white-space:pre-wrap"> </span>[AArch64]Fix the problem can't select f16_to_f32 and f32_to_f16. Also add copy support for FPR16.</font></div><div><font face="arial, helvetica, sans-serif">199485<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Expand vector for UDIV/SDIV/UREM/SREM/FREM as neon doesn't support these operations.</font></div>
<div><font face="arial, helvetica, sans-serif">199621<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Accept both #0.0 and #0 for comparing with floating point zero in asm parser.</font></div><div><font face="arial, helvetica, sans-serif">199628<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.</font></div>
<div><font face="arial, helvetica, sans-serif">199631<span style="white-space:pre-wrap"> </span>Revert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT."</font></div><div><font face="arial, helvetica, sans-serif">199791<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SHUFFLE_VECTOR.</font></div>
<div><font face="arial, helvetica, sans-serif">199858<span style="white-space:pre-wrap"> </span>fix some spell mistakes around 'ConcatVector' and 'ShuffleVector' in AArch64 backend.</font></div><div><font face="arial, helvetica, sans-serif">199861<span style="white-space:pre-wrap"> </span>[AArch64]Add CHECK for two test cases testing scalar_to_vector committed in r199461.</font></div>
<div><font face="arial, helvetica, sans-serif">199978<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Fix a bug in implementing register copy bwtween FPR16.</font></div><div><font face="arial, helvetica, sans-serif">200109<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Fix pattern match failed on FP_ROUND from v1f128 to v1f64.</font></div>
<div><font face="arial, helvetica, sans-serif">200110<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Add test case for vector FP_ROUND.</font></div><div><font face="arial, helvetica, sans-serif">200111<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Add patterns for concat_vector on v2i32.</font></div>
<div><font face="arial, helvetica, sans-serif">200113<span style="white-space:pre-wrap"> </span>Implement pattern match from v1xx to v1xx for AArch64 Neon.</font></div><div><font face="arial, helvetica, sans-serif">200119<span style="white-space:pre-wrap"> </span>Improve pattern match from v1i8 to v1i32 for AArch64 Neon.</font></div>
<div><font face="arial, helvetica, sans-serif">200179<span style="white-space:pre-wrap"> </span>Revert r199791.</font></div><div><font face="arial, helvetica, sans-serif">200180<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Try to generate CONCAT_VECTOR when lowering BUILD_VECTOR or SHUFFLE_VECTOR.</font></div>
<div><font face="arial, helvetica, sans-serif">200365<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Lower SELECT_CC with vector operand.</font></div><div><font face="arial, helvetica, sans-serif">200491<span style="white-space:pre-wrap"> </span>[AArch64] Custom lower concat_vector patterns with v4i16, v4i32, v8i8, v8i16, v16i8 types.</font></div>
<div><font face="arial, helvetica, sans-serif">200706<span style="white-space:pre-wrap"> </span>AArch64 & ARM: refactor crypto intrinsics to take scalars</font></div><div><font face="arial, helvetica, sans-serif">200768<span style="white-space:pre-wrap"> </span>ARM & AArch64: merge NEON absolute compare intrinsics</font></div>
<div><font face="arial, helvetica, sans-serif">201061<span style="white-space:pre-wrap"> </span>[AArch64]Implement the copy of two FPR8 registers by using FMOVss of two FPR32 registers in copyPhysReg.</font></div><div>
<font face="arial, helvetica, sans-serif">201091<span style="white-space:pre-wrap"> </span>[AArch64] Handle aliases of conditional branches without b.pred form.</font></div><div><font face="arial, helvetica, sans-serif">201287<span style="white-space:pre-wrap"> </span>[AArch64]Add support for spilling FPR8/FPR16.</font></div>
<div><font face="arial, helvetica, sans-serif">201298<span style="white-space:pre-wrap"> </span>[AArch64]Fix the problems that can't select mul/add/sub of v1i8/v1i16/v1i32 types. As this problems are similar to shl/sra/srl, also add patterns for shift nodes.</font></div>
<div><font face="arial, helvetica, sans-serif">201381<span style="white-space:pre-wrap"> </span>[AArch64]Fix the assertion failure caused by "v1i1 SETCC" DAG node. As v1i1 is illegal, the type legalizer tries to scalarize such node. But if the type operands of SETCC is legal, the scalarization algorithm will cause an assertion failure.</font></div>
<div><font face="arial, helvetica, sans-serif">201385<span style="white-space:pre-wrap"> </span>Enable AArch64 NEON by default.</font></div><div><font face="arial, helvetica, sans-serif">201395<span style="white-space:pre-wrap"> </span>[AArch64 NEON] Fix a bug to avoid using floating type as condition type in lowering SELECT_CC.</font></div>
<div><font face="arial, helvetica, sans-serif">201541<span style="white-space:pre-wrap"> </span>Fix a typo about lowering AArch64 va_copy.</font></div><div><font face="arial, helvetica, sans-serif">201793<span style="white-space:pre-wrap"> </span>[AArch64] Add support for TargetTransformInfo Analysis.</font></div>
<div><font face="arial, helvetica, sans-serif">201841<span style="white-space:pre-wrap"> </span>[AArch64] Add register constraints to avoid generating STLXR and STXR with unpredictable behavior.</font></div><div><font face="arial, helvetica, sans-serif">202775<span style="white-space:pre-wrap"> </span>[AArch64]Fix improper diagnostics about offset range of load/store instructions.</font></div>
<div><font face="arial, helvetica, sans-serif">204304<span style="white-space:pre-wrap"> </span>[ARM]Fix an assertion failure in A15SDOptimizer about DPair reg class by treating DPair as QPR.</font></div><div><font face="arial, helvetica, sans-serif">204424<span style="white-space:pre-wrap"> </span>[AArch64] Remove .data_region directive from AArch64.</font></div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small"><br></div></div><div><div style="font-family:arial,helvetica,sans-serif;font-size:small">I know the patch list is little bit longer, we have the following reasons,</div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small">1) Last year, when branch 3.4 was created, actually we didn't really have time to complete all AArch64 neon work. So branch 3.4 is actually at the middle stage of aarch64 neon implementation. Now the patches I'm requesting intends to give a complete AArch64 NEON feature.</div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small">2) There are several critical bug fixes solving compiler crash issue, and our end-user really want them to be fixed in new release, and end-user can't wait until release 3.5.</div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small">3) A lot of patches are interleaved and have dependence one another, so it's easy to introduce bug if do cherry picking only for some of them.</div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small"><br></div><div style="font-family:arial,helvetica,sans-serif;font-size:small">The patches I listed are in time ordering, so it's easy for you to apply them to branch 3.4. There are only the following failures, but it's easy to be fixed,</div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small">1) 200708: Only need to manually add line "Features["crypto"] = true;" after line 5924 of file lib/Basic/Targets.cpp</div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small">2) 201384: Manually add two lines below after line 7135 of file lib/Driver/Tools.cpp</div><div style="font-family:arial,helvetica,sans-serif;font-size:small">
else<br></div><div><div><font face="arial, helvetica, sans-serif"> Features.push_back("+neon");</font></div><div style="font-family:arial,helvetica,sans-serif;font-size:small">
3) 202004: Insert into line 3353 of file test/Preprocessor/init.c. Remove the part around AARCH64-NETBSD, and remove line below as well,</div><div><font face="arial, helvetica, sans-serif">// AARCH64:#define __ALIGNOF_MAX_ALIGN_T__ 16</font><br>
</div></div><div style="font-family:arial,helvetica,sans-serif;font-size:small"><br></div><div style="font-family:arial,helvetica,sans-serif;font-size:small">Please simply remove file "CodeGen/aarch64-neon-crypto.c", because it is renamed to be CodeGen/neon-crypto.c. I also attached two monolithic patches for your reference.</div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small"><br></div><div style="font-family:arial,helvetica,sans-serif;font-size:small">To minimize your effort, I already did initial test.</div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small">The tests I did cover the followings, and all can pass.</div><div style="font-family:arial,helvetica,sans-serif;font-size:small">
1) LLVM regression test. "make check-all"</div><div style="font-family:arial,helvetica,sans-serif;font-size:small">2) ARM internal emperor random test</div><div style="font-family:arial,helvetica,sans-serif;font-size:small">
3) Spec2000 test.</div><div style="font-family:arial,helvetica,sans-serif;font-size:small"><br></div><div style="font-family:arial,helvetica,sans-serif;font-size:small">Finally, those patches could bring the followings to release 3.4.1,</div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small">1) Complete AArch64 NEON feature:</div><div style="font-family:arial,helvetica,sans-serif;font-size:small">* support all intrinsics as required by ACLE2.0, and enable AArch64 NEON as default.</div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small">* fixed all pattern match issues for AArch64 NEON back-end.</div><div style="font-family:arial,helvetica,sans-serif;font-size:small">
2) Bug fixes:</div><div style="font-family:arial,helvetica,sans-serif">* Change 64-bit integer type int64_t mapping from "long long" to "long" and it potentially affects binary compatibility.</div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small">* va_copy run-time behavior failure for AArch64.</div><div style="font-family:arial,helvetica,sans-serif;font-size:small">
* Fix a silent codegen fault for atomic operations (e.g. __sync_... Intrinsics).</div><div><font face="arial, helvetica, sans-serif">* Fix an assertion failure in A15 SDOptimizer about DPair reg class by treating DPair as QPR.</font><br>
</div><div><font face="arial, helvetica, sans-serif">* Fix ARM back-end ld/st for v1i64 vector list failure around writeback mode.</font></div><div style="font-family:arial,helvetica,sans-serif;font-size:small">
<br></div><div style="font-family:arial,helvetica,sans-serif;font-size:small">Let me know if you want more info, please! Appreciate your kindly help in advance!</div><div style="font-family:arial,helvetica,sans-serif;font-size:small">
<br></div><div style="font-family:arial,helvetica,sans-serif;font-size:small">Thanks,<br></div><div style="font-family:arial,helvetica,sans-serif;font-size:small">-Jiangning</div>
<div style="font-family:arial,helvetica,sans-serif;font-size:small"><br></div></div><div style="font-family:arial,helvetica,sans-serif;font-size:small"><br></div></div></div><div class="gmail_extra">
<br><br><div class="gmail_quote">2014-03-27 0:10 GMT+08:00 Tom Stellard <span dir="ltr"><<a href="mailto:tom@stellard.net" target="_blank">tom@stellard.net</a>></span>:<div><div class="h5"><br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Hi,<br>
<br>
We are now about halfway between the 3.4 and 3.5 releases, and I would<br>
like to start preparing for a 3.4.1 release. Here is my proposed release<br>
schedule:<br>
<br>
Mar 26 - April 9: Identify and backport additional bug fixes to the 3.4 branch.<br>
April 9 - April 18: Testing Phase<br>
April 18: 3.4.1 Release<br>
<br>
How you can help:<br>
<br>
- If you have any bug fixes you think should be included to 3.4.1, send<br>
me an email with the SVN revision in trunk and also cc the code owner<br>
and llvm-commits (or cfe-commits if it is a clang patch).<br>
<br>
- Start integrating the 3.4 branch into your project or OS distribution<br>
to and check for any issues.<br>
<br>
- Volunteer as a tester for the testing phase.<br>
<br>
Thank you,<br>
<br>
Tom<br>
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</blockquote></div></div></div><span class="HOEnZb"><font color="#888888"><br><br clear="all"><div><br></div>-- <br><div dir="ltr"><font face="courier new, monospace">Thanks,</font><div><font face="courier new, monospace">-Jiangning</font></div>
</div>
</font></span></div>
</div><br><br clear="all"><div><br></div>-- <br><div dir="ltr"><font face="courier new, monospace">Thanks,</font><div><font face="courier new, monospace">-Jiangning</font></div></div>
</div>