<div dir="ltr">Can this be applied to most of the _Int instructions in X86InstrSSE.td?</div><div class="gmail_extra"><br><br><div class="gmail_quote">On Fri, Jan 31, 2014 at 1:29 PM, Lang Hames <span dir="ltr"><<a href="mailto:lhames@gmail.com" target="_blank">lhames@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: lhames<br>
Date: Fri Jan 31 15:29:19 2014<br>
New Revision: 200577<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=200577&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=200577&view=rev</a><br>
Log:<br>
Replace X86 FMA intrinsic pseduo-instructions with def pats.<br>
<br>
It looks like these pseudos were only used for pattern matching. Def pats are<br>
the appropriate way to do that. As a bonus, these intrinsics will now have<br>
memory operands folded properly, and better FMA3 variants selected where<br>
appropriate (see r199933).<br>
<br>
<rdar://problem/15611947><br>
<br>
<br>
Modified:<br>
llvm/trunk/lib/Target/X86/X86InstrFMA.td<br>
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp<br>
llvm/trunk/test/CodeGen/X86/fma3-intrinsics.ll<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86InstrFMA.td<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFMA.td?rev=200577&r1=200576&r2=200577&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFMA.td?rev=200577&r1=200576&r2=200577&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86InstrFMA.td (original)<br>
+++ llvm/trunk/lib/Target/X86/X86InstrFMA.td Fri Jan 31 15:29:19 2014<br>
@@ -125,6 +125,7 @@ multiclass fma3s_rm<bits<8> opc, string<br>
"\t{$src3, $src2, $dst|$dst, $src2, $src3}"),<br>
[(set RC:$dst,<br>
(OpVT (OpNode RC:$src2, RC:$src1, RC:$src3)))]>;<br>
+<br>
let mayLoad = 1 in<br>
def m : FMA3<opc, MRMSrcMem, (outs RC:$dst),<br>
(ins RC:$src1, RC:$src2, x86memop:$src3),<br>
@@ -134,30 +135,10 @@ multiclass fma3s_rm<bits<8> opc, string<br>
(OpVT (OpNode RC:$src2, RC:$src1,<br>
(mem_frag addr:$src3))))]>;<br>
}<br>
-<br>
-multiclass fma3s_rm_int<bits<8> opc, string OpcodeStr, Operand memop,<br>
- ComplexPattern mem_cpat, Intrinsic IntId,<br>
- RegisterClass RC> {<br>
- let isCodeGenOnly = 1 in {<br>
- let isCommutable = 1 in<br>
- def r_Int : FMA3<opc, MRMSrcReg, (outs VR128:$dst),<br>
- (ins VR128:$src1, VR128:$src2, VR128:$src3),<br>
- !strconcat(OpcodeStr,<br>
- "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),<br>
- [(set VR128:$dst, (IntId VR128:$src2, VR128:$src1,<br>
- VR128:$src3))]>;<br>
- def m_Int : FMA3<opc, MRMSrcMem, (outs VR128:$dst),<br>
- (ins VR128:$src1, VR128:$src2, memop:$src3),<br>
- !strconcat(OpcodeStr,<br>
- "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),<br>
- [(set VR128:$dst,<br>
- (IntId VR128:$src2, VR128:$src1, mem_cpat:$src3))]>;<br>
- } // isCodeGenOnly<br>
-}<br>
} // Constraints = "$src1 = $dst"<br>
<br>
multiclass fma3s_forms<bits<8> opc132, bits<8> opc213, bits<8> opc231,<br>
- string OpStr, string PackTy, Intrinsic Int,<br>
+ string OpStr, string PackTy, string PT2, Intrinsic Int,<br>
SDNode OpNode, RegisterClass RC, ValueType OpVT,<br>
X86MemOperand x86memop, Operand memop, PatFrag mem_frag,<br>
ComplexPattern mem_cpat> {<br>
@@ -169,18 +150,32 @@ let neverHasSideEffects = 1 in {<br>
}<br>
<br>
defm r213 : fma3s_rm<opc213, !strconcat(OpStr, "213", PackTy),<br>
- x86memop, RC, OpVT, mem_frag, OpNode>,<br>
- fma3s_rm_int<opc213, !strconcat(OpStr, "213", PackTy),<br>
- memop, mem_cpat, Int, RC>;<br>
+ x86memop, RC, OpVT, mem_frag, OpNode>;<br>
}<br>
<br>
multiclass fma3s<bits<8> opc132, bits<8> opc213, bits<8> opc231,<br>
string OpStr, Intrinsic IntF32, Intrinsic IntF64,<br>
SDNode OpNode> {<br>
- defm SS : fma3s_forms<opc132, opc213, opc231, OpStr, "ss", IntF32, OpNode,<br>
+ defm SS : fma3s_forms<opc132, opc213, opc231, OpStr, "ss", "SS", IntF32, OpNode,<br>
FR32, f32, f32mem, ssmem, loadf32, sse_load_f32>;<br>
- defm SD : fma3s_forms<opc132, opc213, opc231, OpStr, "sd", IntF64, OpNode,<br>
+ defm SD : fma3s_forms<opc132, opc213, opc231, OpStr, "sd", "PD", IntF64, OpNode,<br>
FR64, f64, f64mem, sdmem, loadf64, sse_load_f64>, VEX_W;<br>
+<br>
+ def : Pat<(IntF32 VR128:$src1, VR128:$src2, VR128:$src3),<br>
+ (COPY_TO_REGCLASS<br>
+ (!cast<Instruction>(NAME#"SSr213r")<br>
+ (COPY_TO_REGCLASS $src2, FR32),<br>
+ (COPY_TO_REGCLASS $src1, FR32),<br>
+ (COPY_TO_REGCLASS $src3, FR32)),<br>
+ VR128)>;<br>
+<br>
+ def : Pat<(IntF64 VR128:$src1, VR128:$src2, VR128:$src3),<br>
+ (COPY_TO_REGCLASS<br>
+ (!cast<Instruction>(NAME#"SDr213r")<br>
+ (COPY_TO_REGCLASS $src2, FR64),<br>
+ (COPY_TO_REGCLASS $src1, FR64),<br>
+ (COPY_TO_REGCLASS $src3, FR64)),<br>
+ VR128)>;<br>
}<br>
<br>
defm VFMADD : fma3s<0x99, 0xA9, 0xB9, "vfmadd", int_x86_fma_vfmadd_ss,<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=200577&r1=200576&r2=200577&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=200577&r1=200576&r2=200577&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Fri Jan 31 15:29:19 2014<br>
@@ -1274,8 +1274,6 @@ X86InstrInfo::X86InstrInfo(X86TargetMach<br>
{ X86::VFMADDSDr132r, X86::VFMADDSDr132m, 0 },<br>
{ X86::VFMADDSSr213r, X86::VFMADDSSr213m, 0 },<br>
{ X86::VFMADDSDr213r, X86::VFMADDSDr213m, 0 },<br>
- { X86::VFMADDSSr213r_Int, X86::VFMADDSSr213m_Int, 0 },<br>
- { X86::VFMADDSDr213r_Int, X86::VFMADDSDr213m_Int, 0 },<br>
<br>
{ X86::VFMADDPSr231r, X86::VFMADDPSr231m, TB_ALIGN_16 },<br>
{ X86::VFMADDPDr231r, X86::VFMADDPDr231m, TB_ALIGN_16 },<br>
@@ -1296,8 +1294,6 @@ X86InstrInfo::X86InstrInfo(X86TargetMach<br>
{ X86::VFNMADDSDr132r, X86::VFNMADDSDr132m, 0 },<br>
{ X86::VFNMADDSSr213r, X86::VFNMADDSSr213m, 0 },<br>
{ X86::VFNMADDSDr213r, X86::VFNMADDSDr213m, 0 },<br>
- { X86::VFNMADDSSr213r_Int, X86::VFNMADDSSr213m_Int, 0 },<br>
- { X86::VFNMADDSDr213r_Int, X86::VFNMADDSDr213m_Int, 0 },<br>
<br>
{ X86::VFNMADDPSr231r, X86::VFNMADDPSr231m, TB_ALIGN_16 },<br>
{ X86::VFNMADDPDr231r, X86::VFNMADDPDr231m, TB_ALIGN_16 },<br>
@@ -1318,8 +1314,6 @@ X86InstrInfo::X86InstrInfo(X86TargetMach<br>
{ X86::VFMSUBSDr132r, X86::VFMSUBSDr132m, 0 },<br>
{ X86::VFMSUBSSr213r, X86::VFMSUBSSr213m, 0 },<br>
{ X86::VFMSUBSDr213r, X86::VFMSUBSDr213m, 0 },<br>
- { X86::VFMSUBSSr213r_Int, X86::VFMSUBSSr213m_Int, 0 },<br>
- { X86::VFMSUBSDr213r_Int, X86::VFMSUBSDr213m_Int, 0 },<br>
<br>
{ X86::VFMSUBPSr231r, X86::VFMSUBPSr231m, TB_ALIGN_16 },<br>
{ X86::VFMSUBPDr231r, X86::VFMSUBPDr231m, TB_ALIGN_16 },<br>
@@ -1340,8 +1334,6 @@ X86InstrInfo::X86InstrInfo(X86TargetMach<br>
{ X86::VFNMSUBSDr132r, X86::VFNMSUBSDr132m, 0 },<br>
{ X86::VFNMSUBSSr213r, X86::VFNMSUBSSr213m, 0 },<br>
{ X86::VFNMSUBSDr213r, X86::VFNMSUBSDr213m, 0 },<br>
- { X86::VFNMSUBSSr213r_Int, X86::VFNMSUBSSr213m_Int, 0 },<br>
- { X86::VFNMSUBSDr213r_Int, X86::VFNMSUBSDr213m_Int, 0 },<br>
<br>
{ X86::VFNMSUBPSr231r, X86::VFNMSUBPSr231m, TB_ALIGN_16 },<br>
{ X86::VFNMSUBPDr231r, X86::VFNMSUBPDr231m, TB_ALIGN_16 },<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/fma3-intrinsics.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fma3-intrinsics.ll?rev=200577&r1=200576&r2=200577&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fma3-intrinsics.ll?rev=200577&r1=200576&r2=200577&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/fma3-intrinsics.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/fma3-intrinsics.ll Fri Jan 31 15:29:19 2014<br>
@@ -3,7 +3,7 @@<br>
; RUN: llc < %s -mcpu=bdver2 -mtriple=x86_64-pc-win32 -mattr=-fma4 | FileCheck %s<br>
<br>
define <4 x float> @test_x86_fmadd_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {<br>
- ; CHECK: fmadd213ss %xmm<br>
+ ; CHECK: fmadd213ss (%r8), %xmm<br>
%res = call <4 x float> @llvm.x86.fma.vfmadd.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind<br>
ret <4 x float> %res<br>
}<br>
@@ -24,7 +24,7 @@ define <8 x float> @test_x86_fmadd_ps_y(<br>
declare <8 x float> @llvm.x86.fma.vfmadd.ps.256(<8 x float>, <8 x float>, <8 x float>) nounwind readnone<br>
<br>
define <4 x float> @test_x86_fnmadd_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) {<br>
- ; CHECK: fnmadd213ss %xmm<br>
+ ; CHECK: fnmadd213ss (%r8), %xmm<br>
%res = call <4 x float> @llvm.x86.fma.vfnmadd.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind<br>
ret <4 x float> %res<br>
}<br>
<br>
<br>
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</blockquote></div><br><br clear="all"><div><br></div>-- <br>~Craig
</div>