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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='color:#1F497D'>Pinging reviewers…<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='color:#1F497D'>I guess everyone is ok with the bug fix for fnmadd/fnmsub.<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='color:#1F497D'>Do we all also agree with the patterns with multiply operation single use to avoid performance issues when generating fused instructions?<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='color:#1F497D'>Let me know and I will merge both changes.<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><br>Thanks,<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'>Ana.<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><div><div style='border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> llvm-commits-bounces@cs.uiuc.edu [mailto:llvm-commits-bounces@cs.uiuc.edu] <b>On Behalf Of </b>Ana Pazos<br><b>Sent:</b> Wednesday, December 18, 2013 11:57 AM<br><b>To:</b> llvm-commits@cs.uiuc.edu; tnorthover@apple.com<br><b>Subject:</b> [PATCH][AARCH64] Fixed fused multiply add/sub patterns<o:p></o:p></span></p></div></div><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Hello Tim and reviewers,<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoListParagraph style='text-indent:-.25in;mso-list:l1 level1 lfo2'><![if !supportLists]><span style='mso-list:Ignore'>1)<span style='font:7.0pt "Times New Roman"'> </span></span><![endif]>Bug issue: <span style='font-size:10.0pt;font-family:"Courier New";color:black'>fnmadd and fnmsub patterns are switched in the current code in AArch64InstInfo.td<o:p></o:p></span></p><p class=MsoListParagraph><span style='font-size:10.0pt;font-family:"Courier New";color:black'><o:p> </o:p></span></p><p class=MsoListParagraph style='margin-left:63.6pt;text-indent:-.25in;mso-list:l0 level1 lfo4;background:white'><![if !supportLists]><span style='font-size:10.0pt;font-family:"Courier New";color:black'><span style='mso-list:Ignore'>-<span style='font:7.0pt "Times New Roman"'> </span></span></span><![endif]><span style='font-size:10.0pt;font-family:"Courier New";color:black'>fnmadd is (-Ra) + (-Rn)*Rm which should be matched as:<o:p></o:p></span></p><p class=MsoNormal style='background:white'><span style='font-size:10.0pt;font-family:"Courier New";color:black'> <o:p></o:p></span></p><p class=MsoNormal style='background:white'><span style='font-size:10.0pt;font-family:"Courier New";color:black'> fma (fneg node:$Rn), node:$Rm, (fneg node:$Ra) and as<o:p></o:p></span></p><p class=MsoNormal style='background:white'><span style='font-size:10.0pt;font-family:"Courier New";color:black'><o:p> </o:p></span></p><pre style='background:white'><span style='color:black'> (f32 (fsub (f32 (fneg FPR32:$Ra)), (f32 (fmul_su FPR32:$Rn, FPR32:$Rm))))<o:p></o:p></span></pre><p class=MsoNormal style='background:white'><span style='font-size:10.0pt;font-family:"Courier New";color:black'><o:p> </o:p></span></p><p class=MsoListParagraph style='margin-left:63.6pt;text-indent:-.25in;mso-list:l0 level1 lfo4;background:white'><![if !supportLists]><span style='font-size:10.0pt;font-family:"Courier New";color:black'><span style='mso-list:Ignore'>-<span style='font:7.0pt "Times New Roman"'> </span></span></span><![endif]><span style='font-size:10.0pt;font-family:"Courier New";color:black'>fnmsub is (-Ra) + Rn*Rm which should be matched as <o:p></o:p></span></p><p class=MsoListParagraph style='margin-left:63.6pt;background:white'><span style='font-size:10.0pt;font-family:"Courier New";color:black'><o:p> </o:p></span></p><p class=MsoNormal style='margin-left:63.6pt;background:white'><span style='font-size:10.0pt;font-family:"Courier New";color:black'> fma node:$Rn, node:$Rm, (fneg node:$Ra) and as<o:p></o:p></span></p><p class=MsoNormal style='margin-left:63.6pt;background:white'><span style='font-size:10.0pt;font-family:"Courier New";color:black'><o:p> </o:p></span></p><pre style='background:white'><span style='color:black'> (f32 (fsub (f32 (fmul_su FPR32:$Rn, FPR32:$Rm)), FPR32:$Ra))))<o:p></o:p></span></pre><p class=MsoNormal style='margin-left:63.6pt;background:white'><span style='font-size:10.0pt;font-family:"Courier New";color:black'><o:p> </o:p></span></p><p class=MsoNormal style='background:white'><span style='font-size:10.0pt;font-family:"Courier New";color:black'><o:p> </o:p></span></p><p class=MsoListParagraph style='text-indent:-.25in;mso-list:l1 level1 lfo2'><![if !supportLists]><span style='mso-list:Ignore'>2)<span style='font:7.0pt "Times New Roman"'> </span></span><![endif]>Performance issue: In the current code we allow matching patterns like (fadd(fmul)) to create fused multiply add/sub instructions.<o:p></o:p></p><p class=MsoListParagraph>In ARM we saw that this caused the multiply operation to be repeated many times which affected performance.<o:p></o:p></p><p class=MsoListParagraph>So in ARM the pattern is only matched if fmul has a single use.<o:p></o:p></p><p class=MsoListParagraph>AArch64 targets most probably have one MAC pipe and this will be a performance issue as well.<o:p></o:p></p><p class=MsoListParagraph><o:p> </o:p></p><p class=MsoNormal>Let me know if you agree with both changes.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Thanks,<o:p></o:p></p><p class=MsoNormal>Ana.<o:p></o:p></p></div></body></html>