Nice. :)<br><br><div>On Thu Dec 19 2013 at 10:37:41 AM, Quentin Colombet <<a href="mailto:qcolombet@apple.com">qcolombet@apple.com</a>> wrote:</div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Author: qcolombet<br>
Date: Thu Dec 19 12:32:04 2013<br>
New Revision: 197712<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=197712&view=rev" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project?rev=197712&view=rev</a><br>
Log:<br>
[X86][fast-isel] Fix select lowering.<br>
The condition in selects is supposed to be i1.<br>
Make sure we are just reading the less significant bit<br>
of the 8 bits width value to match this constraint.<br>
<br>
<rdar://problem/15651765><br>
<br>
Added:<br>
    llvm/trunk/test/CodeGen/X86/<u></u>fast-isel-select.ll<br>
Modified:<br>
    llvm/trunk/lib/Target/X86/<u></u>X86FastISel.cpp<br>
<br>
Modified: llvm/trunk/lib/Target/X86/<u></u>X86FastISel.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FastISel.cpp?rev=197712&r1=197711&r2=197712&view=diff" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/lib/Target/<u></u>X86/X86FastISel.cpp?rev=<u></u>197712&r1=197711&r2=197712&<u></u>view=diff</a><br>

==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/lib/Target/X86/<u></u>X86FastISel.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/<u></u>X86FastISel.cpp Thu Dec 19 12:32:04 2013<br>
@@ -1508,8 +1508,13 @@ bool X86FastISel::X86SelectSelect(<u></u>const<br>
   unsigned Op2Reg = getRegForValue(I->getOperand(<u></u>2));<br>
   if (Op2Reg == 0) return false;<br>
<br>
-  BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::TEST8rr))<br>
-    .addReg(Op0Reg).addReg(Op0Reg)<u></u>;<br>
+  // Selects operate on i1, however, Op0Reg is 8 bits width and may contain<br>
+  // garbage. Indeed, only the less significant bit is supposed to be accurate.<br>
+  // If we read more than the lsb, we may see non-zero values whereas lsb<br>
+  // is zero. Therefore, we have to truncate Op0Reg to i1 for the select.<br>
+  // This is acheived by performing TEST against 1.<br>
+  BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(X86::TEST8ri))<br>
+    .addReg(Op0Reg).addImm(1);<br>
   unsigned ResultReg = createResultReg(RC);<br>
   BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(Opc), ResultReg)<br>
     .addReg(Op1Reg).addReg(Op2Reg)<u></u>;<br>
<br>
Added: llvm/trunk/test/CodeGen/X86/<u></u>fast-isel-select.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-select.ll?rev=197712&view=auto" target="_blank">http://llvm.org/viewvc/llvm-<u></u>project/llvm/trunk/test/<u></u>CodeGen/X86/fast-isel-select.<u></u>ll?rev=197712&view=auto</a><br>

==============================<u></u>==============================<u></u>==================<br>
--- llvm/trunk/test/CodeGen/X86/<u></u>fast-isel-select.ll (added)<br>
+++ llvm/trunk/test/CodeGen/X86/<u></u>fast-isel-select.ll Thu Dec 19 12:32:04 2013<br>
@@ -0,0 +1,16 @@<br>
+; RUN: llc -mtriple x86_64-apple-darwin -O0 -o - < %s | FileCheck %s<br>
+; Make sure we only use the less significant bit of the value that feeds the<br>
+; select. Otherwise, we may account for a non-zero value whereas the<br>
+; lsb is zero.<br>
+; <rdar://problem/15651765><br>
+<br>
+; CHECK-LABEL: fastisel_select:<br>
+; CHECK: subb {{%[a-z0-9]+}}, [[RES:%[a-z0-9]+]]<br>
+; CHECK: testb $1, [[RES]]<br>
+; CHECK: cmovel<br>
+define i32 @fastisel_select(i1 %exchSub2211_, i1 %trunc_8766) {<br>
+  %shuffleInternal15257_8932 = sub i1 %exchSub2211_, %trunc_8766<br>
+  %counter_diff1345 = select i1 %shuffleInternal15257_8932, i32 1204476887, i32 0<br>
+  ret i32 %counter_diff1345<br>
+}<br>
+<br>
<br>
<br>
______________________________<u></u>_________________<br>
llvm-commits mailing list<br>
<a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank">llvm-commits@cs.uiuc.edu</a><br>
<a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank">http://lists.cs.uiuc.edu/<u></u>mailman/listinfo/llvm-commits</a><br>
</blockquote>