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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Hi Jiangning,<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>In the example you mentioned the dup instruction is the best pattern because the test case simply returns the result of vget intrinsic as a float.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>But we cannot guarantee that vset/vget will use the preferred mapping from the ARM manual nor that the preferred mapping is the best code always, because it depends on how the half-precision FP value is used before or after the vget/vset intrinsics calls (which may cause other patterns like UMOV, INS to be applied).<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>What I decided to do: <o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>I added a couple of additional patterns that include fp16_to_f32 operation in the vector extract/insert and vector copy expressions. This way I can optimize the test case you mentioned and a couple more cases I could think of.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>See the updated patches attached.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Thanks,<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Ana.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> Jiangning Liu [mailto:liujiangning1@gmail.com] <br><b>Sent:</b> Wednesday, December 04, 2013 1:21 AM<br><b>To:</b> Ana Pazos<br><b>Cc:</b> llvm-commits; cfe-commits@cs.uiuc.edu; Tim Northover<br><b>Subject:</b> Re: [PATCH]{AArch64] Implemented half-precision vget/vset_lane_f16 intrinsics<o:p></o:p></span></p><p class=MsoNormal><o:p> </o:p></p><div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'>Hi Ana,<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'><o:p> </o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'>Can we generate more optimized code by using instruction </span><span style='font-size:13.5pt;color:black'>DUP Hd,Vn.H[lane]</span><span style='font-family:"Arial","sans-serif"'> directly.<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'><o:p> </o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'>With your patch we are generating two instructions like,<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'><o:p> </o:p></span></p></div><div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'> umov w0, v0.h[3]</span><o:p></o:p></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'> fmov s0, w0</span><o:p></o:p></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'><o:p> </o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'>Actually they can be combined to a single "dup h0, v0.h[3]". This is what we want for this intrinsic function.<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'><o:p> </o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'>What you need to do is by adding one more pattern to match this case.<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'><o:p> </o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'>Thanks,<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'>-Jiangning<o:p></o:p></span></p></div><div><p class=MsoNormal><span style='font-family:"Arial","sans-serif"'><o:p> </o:p></span></p></div></div></div><div><p class=MsoNormal style='margin-bottom:12.0pt'><o:p> </o:p></p><div><p class=MsoNormal>2013/12/4 Ana Pazos <<a href="mailto:apazos@codeaurora.org" target="_blank">apazos@codeaurora.org</a>><o:p></o:p></p><div><div><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>Hi Tim and reviewers,<o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>I followed Tim’s suggestion to use macros to handle the float16_t storage type.<o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>Notes:<o:p></o:p></p><p>1)<span style='font-size:7.0pt'> </span>Since the vget/vset_lane_f16 intrinsics read and write 16 bit data (no FP arithmetic performed), I simply reinterpreted float16_t and the vector of float16_t as i16 data.<o:p></o:p></p><p>See the operators defined in NeonEmitter.<o:p></o:p></p><p>2)<span style='font-size:7.0pt'> </span>With this change vget/vset_lane_f16 use to vget/vset_lane_i16 implementation.<o:p></o:p></p><p>3)<span style='font-size:7.0pt'> </span>I added f16_to_f32 pattern because in the vset_lane case the i16 data is moved from GPR to a FP register, and hence the need for this pattern.<o:p></o:p></p><p>4)<span style='font-size:7.0pt'> </span>I added test cases that define float16_t variable in the function body, but do not return such value type as it is not allowed. Let me know if these tests are satisfactory.<o:p></o:p></p><p>5)<span style='font-size:7.0pt'> </span>I did not try to enforce the recommended intrinsic->instruction map from the ARM document. <o:p></o:p></p><p>To force those instructions I would have to use builtins and v1i16 type casts so I can create the pattern.<o:p></o:p></p><p>Even doing that, in some cases the UMOV, INS patterns defined earlier can prevail over.<o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'> <o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>Thanks,<o:p></o:p></p><p class=MsoNormal style='mso-margin-top-alt:auto;mso-margin-bottom-alt:auto'>Ana.<o:p></o:p></p></div></div><p class=MsoNormal style='margin-bottom:12.0pt'><br>_______________________________________________<br>cfe-commits mailing list<br><a href="mailto:cfe-commits@cs.uiuc.edu">cfe-commits@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits</a><o:p></o:p></p></div><p class=MsoNormal><br><br clear=all><o:p></o:p></p><div><p class=MsoNormal><o:p> </o:p></p></div><p class=MsoNormal>-- <o:p></o:p></p><div><p class=MsoNormal><span style='font-family:"Courier New"'>Thanks,</span><o:p></o:p></p><div><p class=MsoNormal><span style='font-family:"Courier New"'>-Jiangning</span><o:p></o:p></p></div></div></div></div></body></html>