<div dir="ltr">I think the pattern that matches what the docs says since that's what a user would be likely to write in C.<div><br></div><div>As far as the flags goes. We would need to do something if we wanted to optimize for particular branch conditions after these instructions. Since the flags are marked as Def on these instructions and no special code exists in X86ISelLowering for these instruction the default behavior will be to just not consume the flags at all.</div>
</div><div class="gmail_extra"><br><br><div class="gmail_quote">On Tue, Oct 1, 2013 at 9:51 AM, Kay Tiong Khoo <span dir="ltr"><<a href="mailto:kkhoo@perfwizard.com" target="_blank">kkhoo@perfwizard.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr"><div><div>Yes, the AMD doc (24594_APM_v3, Rev 3.20 May 2013, P. 91) says:<br>
<div>
<p><span style="font-size:12pt;font-family:'TimesNewRomanPSMT'">"The BLCI instruction effectively performs a bit-wise logical </span><span style="font-size:12pt;font-family:'CourierNewPSMT'">or </span><span style="font-size:12pt;font-family:'TimesNewRomanPSMT'">of the source operand and the inverse
of the result of incrementing the source operand by 1, and stores the result to the destination register:
</span></p>
<pre><span style="font-size:10pt;font-family:'CourierNewPSMT'"> add tmp, src, 1
not tmp, tmp
or dest, tmp, src
</span>"<br></pre></div><br></div>They also specify:<br>"<span style="font-size:12pt;font-family:'TimesNewRomanPSMT'">The value of the carry flag of rFLAGS is generated according to the result of the </span><span style="font-size:12pt;font-family:'CourierNewPSMT'">add </span><span style="font-size:12pt;font-family:'TimesNewRomanPSMT'">pseudo-
instruction and the remaining arithmetic flags are generated by the </span><span style="font-size:12pt;font-family:'CourierNewPSMT'">or </span><span style="font-size:12pt;font-family:'TimesNewRomanPSMT'">pseudo-instruction."<br>
</span></div><div><span style="font-size:12pt;font-family:'TimesNewRomanPSMT'"> <br></span></div><div><span style="font-size:12pt;font-family:'TimesNewRomanPSMT'">Does that need to be encoded in the definition somehow?<br>
</span></div><span style="font-size:12pt;font-family:'TimesNewRomanPSMT'"><br>
</span><div>
<div><br><br></div></div></div><div class="gmail_extra"><br><br><div class="gmail_quote"><div><div class="h5">On Mon, Sep 30, 2013 at 9:19 PM, Craig Topper <span dir="ltr"><<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>></span> wrote:<br>
</div></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div class="h5"><br>
While this probably mathematically correct.<br>
<br>
def : Pat<(or GR32:$src, (sub -2, GR32:$src)),<br>
(BLCI_32rr GR32:$src)>;<br>
def : Pat<(or GR64:$src, (sub -2, GR64:$src)),<br>
(BLCI_64rr GR64:$src)>;<br>
<br>
Don't the docs from AMD say something that would be (or GR64:$src, (not (add GR64:$src, 1)))?<br>
</div></div><div><div><br>
<a href="http://llvm-reviews.chandlerc.com/D1788" target="_blank">http://llvm-reviews.chandlerc.com/D1788</a><br>
_______________________________________________<br>
llvm-commits mailing list<br>
<a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank">llvm-commits@cs.uiuc.edu</a><br>
<a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br>
</div></div></blockquote></div><br></div>
<br>_______________________________________________<br>
llvm-commits mailing list<br>
<a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br>
<a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br>
<br></blockquote></div><br><br clear="all"><div><br></div>-- <br>~Craig
</div>