<div dir="ltr">I wonder whether this is the best approach.<div><br></div><div>Specifically, this is trading off register pressure for code size. I think it is probably the correct call in many cases, but perhaps not in all cases. Also, it has nothing to do with memset, and everything to do with any sequence of immediate operand movs.</div>
<div><br></div><div>I think this would be done somewhat better as an MI peephole that takes into account register pressure and how many mov instructions share the immediate to tradeoff the register pressure and potential instructions to materialize the constant into a register against the shrink of immediate operand movs.</div>
<div><br></div><div>But yes, Nadav or Andy would have more insights here...</div></div><div class="gmail_extra"><br><br><div class="gmail_quote">On Mon, Sep 16, 2013 at 10:00 AM, Serge Pavlov <span dir="ltr"><<a href="mailto:sepavloff@gmail.com" target="_blank">sepavloff@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Friendly ping.</div><div class="gmail_extra"><div><div class="h5"><br><br><div class="gmail_quote">2013/9/10 Serge Pavlov <span dir="ltr"><<a href="mailto:sepavloff@gmail.com" target="_blank">sepavloff@gmail.com</a>></span><br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"> Cosmetical update to the patch<br>
If block size is small, the size of largest move chunk may be smaller than the<br>
natural register width and target may not have resisters of such width. Example<br>
is 32-bit target that does not have 16-bit registers. Avoid allocation such<br>
illegal registers.<br>
<br>
Hi bkramer, nadav,<br>
<br>
<a href="http://llvm-reviews.chandlerc.com/D1484" target="_blank">http://llvm-reviews.chandlerc.com/D1484</a><br>
<br>
CHANGE SINCE LAST DIFF<br>
<a href="http://llvm-reviews.chandlerc.com/D1484?vs=3692&id=4161#toc" target="_blank">http://llvm-reviews.chandlerc.com/D1484?vs=3692&id=4161#toc</a><br>
<div><div><br>
Files:<br>
include/llvm/Target/TargetLowering.h<br>
lib/CodeGen/SelectionDAG/SelectionDAG.cpp<br>
lib/Target/X86/X86ISelLowering.cpp<br>
lib/Target/X86/X86ISelLowering.h<br>
test/CodeGen/X86/memset-sse-stack-realignment.ll<br>
test/CodeGen/X86/memset.ll<br>
test/CodeGen/X86/tlv-1.ll<br>
</div></div></blockquote></div><br><br clear="all"><div><br></div></div></div><span class="HOEnZb"><font color="#888888">-- <br>Thanks,<br>--Serge<br>
</font></span></div>
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