<div dir="ltr"><br><div class="gmail_extra"><br><br><div class="gmail_quote">On Mon, Sep 16, 2013 at 4:29 PM, Adrian Prantl <span dir="ltr"><<a href="mailto:aprantl@apple.com" target="_blank">aprantl@apple.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: adrian<br>
Date: Mon Sep 16 18:29:03 2013<br>
New Revision: 190821<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=190821&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=190821&view=rev</a><br>
Log:<br>
Debug info: Fix PR16736 and rdar://problem/14990587.<br>
A DBG_VALUE is register-indirect iff the first operand is a register<br>
_and_ the second operand is an immediate.<br>
<br>
Added:<br>
llvm/trunk/test/DebugInfo/ARM/<br>
llvm/trunk/test/DebugInfo/ARM/PR16736.ll<br>
Modified:<br>
llvm/trunk/include/llvm/CodeGen/MachineInstr.h<br>
llvm/trunk/lib/CodeGen/InlineSpiller.cpp<br>
llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp<br>
llvm/trunk/lib/CodeGen/RegAllocFast.cpp<br>
llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp<br>
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp<br>
<br>
Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=190821&r1=190820&r2=190821&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=190821&r1=190820&r2=190821&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original)<br>
+++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Mon Sep 16 18:29:03 2013<br>
@@ -637,6 +637,13 @@ public:<br>
bool isEHLabel() const { return getOpcode() == TargetOpcode::EH_LABEL; }<br>
bool isGCLabel() const { return getOpcode() == TargetOpcode::GC_LABEL; }<br>
bool isDebugValue() const { return getOpcode() == TargetOpcode::DBG_VALUE; }<br>
+ /// A DBG_VALUE is indirect iff the first operand is a register and<br>
+ /// the second operand is an immediate.<br>
+ bool isIndirectDebugValue() const {<br>
+ return (getOpcode() == TargetOpcode::DBG_VALUE)<br></blockquote><div><br></div><div>Perhaps just call isDebugValue() here?</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+ && getOperand(0).isReg()<br>
+ && getOperand(1).isImm();<br>
+ }<br>
<br>
bool isPHI() const { return getOpcode() == TargetOpcode::PHI; }<br>
bool isKill() const { return getOpcode() == TargetOpcode::KILL; }<br>
<br>
Modified: llvm/trunk/lib/CodeGen/InlineSpiller.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=190821&r1=190820&r2=190821&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/InlineSpiller.cpp?rev=190821&r1=190820&r2=190821&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/InlineSpiller.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/InlineSpiller.cpp Mon Sep 16 18:29:03 2013<br>
@@ -1191,7 +1191,7 @@ void InlineSpiller::spillAroundUses(unsi<br>
// Debug values are not allowed to affect codegen.<br>
if (MI->isDebugValue()) {<br>
// Modify DBG_VALUE now that the value is in a spill slot.<br>
- bool IsIndirect = MI->getOperand(1).isImm();<br>
+ bool IsIndirect = MI->isIndirectDebugValue();<br>
uint64_t Offset = IsIndirect ? MI->getOperand(1).getImm() : 0;<br>
const MDNode *MDPtr = MI->getOperand(2).getMetadata();<br>
DebugLoc DL = MI->getDebugLoc();<br>
<br>
Modified: llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp?rev=190821&r1=190820&r2=190821&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp?rev=190821&r1=190820&r2=190821&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/LiveDebugVariables.cpp Mon Sep 16 18:29:03 2013<br>
@@ -457,9 +457,10 @@ bool LDVImpl::handleDebugValue(MachineIn<br>
}<br>
<br>
// Get or create the UserValue for (variable,offset).<br>
- bool IsIndirect = MI->getOperand(1).isImm();<br>
+ bool IsIndirect = MI->isIndirectDebugValue();<br>
unsigned Offset = IsIndirect ? MI->getOperand(1).getImm() : 0;<br>
const MDNode *Var = MI->getOperand(2).getMetadata();<br>
+ //here.<br>
UserValue *UV = getUserValue(Var, Offset, IsIndirect, MI->getDebugLoc());<br>
UV->addDef(Idx, MI->getOperand(0));<br>
return true;<br>
<br>
Modified: llvm/trunk/lib/CodeGen/RegAllocFast.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocFast.cpp?rev=190821&r1=190820&r2=190821&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocFast.cpp?rev=190821&r1=190820&r2=190821&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/RegAllocFast.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/RegAllocFast.cpp Mon Sep 16 18:29:03 2013<br>
@@ -298,7 +298,7 @@ void RAFast::spillVirtReg(MachineBasicBl<br>
for (unsigned li = 0, le = LRIDbgValues.size(); li != le; ++li) {<br>
MachineInstr *DBG = LRIDbgValues[li];<br>
const MDNode *MDPtr = DBG->getOperand(2).getMetadata();<br>
- bool IsIndirect = DBG->getOperand(1).isImm(); // Register-indirect value?<br>
+ bool IsIndirect = DBG->isIndirectDebugValue();<br>
uint64_t Offset = IsIndirect ? DBG->getOperand(1).getImm() : 0;<br>
DebugLoc DL;<br>
if (MI == MBB->end()) {<br>
@@ -856,7 +856,7 @@ void RAFast::AllocateBasicBlock() {<br>
}<br>
else {<br>
// Modify DBG_VALUE now that the value is in a spill slot.<br>
- bool IsIndirect = MI->getOperand(1).isImm();<br>
+ bool IsIndirect = MI->isIndirectDebugValue();<br>
uint64_t Offset = IsIndirect ? MI->getOperand(1).getImm() : 0;<br>
const MDNode *MDPtr =<br>
MI->getOperand(MI->getNumOperands()-1).getMetadata();<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=190821&r1=190820&r2=190821&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=190821&r1=190820&r2=190821&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Mon Sep 16 18:29:03 2013<br>
@@ -688,6 +688,7 @@ bool FastISel::SelectCall(const User *I)<br>
.addFPImm(CF).addImm(DI->getOffset())<br>
.addMetadata(DI->getVariable());<br>
} else if (unsigned Reg = lookUpRegForValue(V)) {<br>
+ // FIXME: This does not handle register-indirect values at offset 0.<br>
bool IsIndirect = DI->getOffset() != 0;<br>
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, II, IsIndirect,<br>
Reg, DI->getOffset(), DI->getVariable());<br>
<br>
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=190821&r1=190820&r2=190821&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=190821&r1=190820&r2=190821&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)<br>
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Mon Sep 16 18:29:03 2013<br>
@@ -422,7 +422,7 @@ bool SelectionDAGISel::runOnMachineFunct<br>
MachineBasicBlock::iterator InsertPos = Def;<br>
const MDNode *Variable =<br>
MI->getOperand(MI->getNumOperands()-1).getMetadata();<br>
- bool IsIndirect = MI->getOperand(1).isImm();<br>
+ bool IsIndirect = MI->isIndirectDebugValue();<br>
unsigned Offset = IsIndirect ? MI->getOperand(1).getImm() : 0;<br>
// Def is never a terminator here, so it is ok to increment InsertPos.<br>
BuildMI(*EntryMBB, ++InsertPos, MI->getDebugLoc(),<br>
<br>
Added: llvm/trunk/test/DebugInfo/ARM/PR16736.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/ARM/PR16736.ll?rev=190821&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/ARM/PR16736.ll?rev=190821&view=auto</a><br>
==============================================================================<br>
--- llvm/trunk/test/DebugInfo/ARM/PR16736.ll (added)<br>
+++ llvm/trunk/test/DebugInfo/ARM/PR16736.ll Mon Sep 16 18:29:03 2013<br>
@@ -0,0 +1,63 @@<br>
+; RUN: llc -filetype=asm < %s | FileCheck %s<br>
+; CHECK: @DEBUG_VALUE: h:x <- [R{{.*}}+{{.*}}]<br>
+; generated from:<br></blockquote><div><br></div><div>Could you mention the command line required? I seem to recall I had to use at least -O1 or -Oz or something to reproduce this problem (ie: it doesn't reproduce at -O0?).</div>
<div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
+;<br>
+; int f();<br>
+; void g(float);<br>
+; void h(int, int, int, int, float x) {<br>
+; g(x = f());<br>
+; }<br>
+;<br>
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:32-n32-S64"<br>
+target triple = "thumbv7-apple-ios"<br>
+<br>
+; Function Attrs: nounwind<br>
+define arm_aapcscc void @_Z1hiiiif(i32, i32, i32, i32, float %x) #0 {<br>
+entry:<br>
+ tail call void @llvm.dbg.value(metadata !{i32 %0}, i64 0, metadata !12), !dbg !18<br>
+ tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !13), !dbg !18<br>
+ tail call void @llvm.dbg.value(metadata !{i32 %2}, i64 0, metadata !14), !dbg !18<br>
+ tail call void @llvm.dbg.value(metadata !{i32 %3}, i64 0, metadata !15), !dbg !18<br>
+ tail call void @llvm.dbg.value(metadata !{float %x}, i64 0, metadata !16), !dbg !18<br>
+ %call = tail call arm_aapcscc i32 @_Z1fv() #3, !dbg !19<br>
+ %conv = sitofp i32 %call to float, !dbg !19<br>
+ tail call void @llvm.dbg.value(metadata !{float %conv}, i64 0, metadata !16), !dbg !19<br>
+ tail call arm_aapcscc void @_Z1gf(float %conv) #3, !dbg !19<br>
+ ret void, !dbg !20<br>
+}<br>
+<br>
+declare arm_aapcscc void @_Z1gf(float)<br>
+<br>
+declare arm_aapcscc i32 @_Z1fv()<br>
+<br>
+; Function Attrs: nounwind readnone<br>
+declare void @llvm.dbg.value(metadata, i64, metadata) #2<br>
+<br>
+attributes #0 = { nounwind }<br>
+attributes #2 = { nounwind readnone }<br>
+attributes #3 = { nounwind }<br>
+<br>
+!<a href="http://llvm.dbg.cu" target="_blank">llvm.dbg.cu</a> = !{!0}<br>
+!llvm.module.flags = !{!17}<br>
+<br>
+!0 = metadata !{i32 786449, metadata !1, i32 4, metadata !"clang version 3.4 (trunk 190804) (llvm/trunk 190797)", i1 true, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2, metadata !""} ; [ DW_TAG_compile_unit ] [//<unknown>] [DW_LANG_C_plus_plus]<br>
+!1 = metadata !{metadata !"/<unknown>", metadata !""}<br>
+!2 = metadata !{i32 0}<br>
+!3 = metadata !{metadata !4}<br>
+!4 = metadata !{i32 786478, metadata !5, metadata !6, metadata !"h", metadata !"h", metadata !"_Z1hiiiif", i32 3, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, void (i32, i32, i32, i32, float)* @_Z1hiiiif, null, null, metadata !11, i32 3} ; [ DW_TAG_subprogram ] [line 3] [def] [h]<br>
+!5 = metadata !{metadata !"/arm.cpp", metadata !""}<br>
+!6 = metadata !{i32 786473, metadata !5} ; [ DW_TAG_file_type ] [//arm.cpp]<br>
+!7 = metadata !{i32 786453, i32 0, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, null, null, null} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]<br>
+!8 = metadata !{null, metadata !9, metadata !9, metadata !9, metadata !9, metadata !10}<br>
+!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]<br>
+!10 = metadata !{i32 786468, null, null, metadata !"float", i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] [float] [line 0, size 32, align 32, offset 0, enc DW_ATE_float]<br>
+!11 = metadata !{metadata !12, metadata !13, metadata !14, metadata !15, metadata !16}<br>
+!12 = metadata !{i32 786689, metadata !4, metadata !"", metadata !6, i32 16777219, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [line 3]<br>
+!13 = metadata !{i32 786689, metadata !4, metadata !"", metadata !6, i32 33554435, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [line 3]<br>
+!14 = metadata !{i32 786689, metadata !4, metadata !"", metadata !6, i32 50331651, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [line 3]<br>
+!15 = metadata !{i32 786689, metadata !4, metadata !"", metadata !6, i32 67108867, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [line 3]<br>
+!16 = metadata !{i32 786689, metadata !4, metadata !"x", metadata !6, i32 83886083, metadata !10, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [x] [line 3]<br>
+!17 = metadata !{i32 2, metadata !"Dwarf Version", i32 4}<br>
+!18 = metadata !{i32 3, i32 0, metadata !4, null}<br>
+!19 = metadata !{i32 4, i32 0, metadata !4, null}<br>
+!20 = metadata !{i32 5, i32 0, metadata !4, null}<br>
<br>
<br>
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</blockquote></div><br></div></div>