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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Yes, that’s my next step.
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">This patch committed as r190754.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Ben<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Craig Topper [mailto:craig.topper@gmail.com]
<br>
<b>Sent:</b> Saturday, September 14, 2013 11:27 AM<br>
<b>To:</b> reviews+D1663+public+238ef3f1c2db68b0@llvm-reviews.chandlerc.com<br>
<b>Cc:</b> Langmuir, Ben; llvm-commits@cs.uiuc.edu; Nadav Rotem<br>
<b>Subject:</b> Re: [PATCH] Finish assembly support for Intel SHA Extensions<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Do you plan to add the intrinsics as well?<br>
<br>
On Friday, September 13, 2013, Craig Topper wrote:<o:p></o:p></p>
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<p class="MsoNormal">No % sign on the right most xmm0 in the aliases. Intel syntax doens't use it. Otherwise LGTM.<o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt"><o:p> </o:p></p>
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<p class="MsoNormal">On Fri, Sep 13, 2013 at 10:46 AM, Ben Langmuir <<a href="mailto:ben.langmuir@intel.com">ben.langmuir@intel.com</a>> wrote:<o:p></o:p></p>
<p class="MsoNormal"> SHA256RNDS2 aliases with explicit xmm0<br>
<br>
Hi craig.topper,<br>
<br>
<a href="http://llvm-reviews.chandlerc.com/D1663" target="_blank">http://llvm-reviews.chandlerc.com/D1663</a><br>
<br>
CHANGE SINCE LAST DIFF<br>
<a href="http://llvm-reviews.chandlerc.com/D1663?vs=4242&id=4287#toc" target="_blank">
http://llvm-reviews.chandlerc.com/D1663?vs=4242&id=4287#toc</a><o:p></o:p></p>
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<p class="MsoNormal"><br>
Files:<br>
lib/Target/X86/X86InstrSSE.td<br>
test/MC/Disassembler/X86/x86-64.txt<br>
test/MC/X86/x86_64-encoding.s<br>
<br>
Index: lib/Target/X86/X86InstrSSE.td<br>
===================================================================<br>
--- lib/Target/X86/X86InstrSSE.td<br>
+++ lib/Target/X86/X86InstrSSE.td<br>
@@ -7324,6 +7324,17 @@<br>
// SHA-NI Instructions<br>
//===----------------------------------------------------------------------===//<br>
<br>
+multiclass SHAI_binop<bits<8> Opc, string OpcodeStr> {<br>
+ def rr : I<Opc, MRMSrcReg, (outs VR128:$dst),<br>
+ (ins VR128:$src1, VR128:$src2),<br>
+ !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), []>, T8;<br>
+<br>
+ let mayLoad = 1 in<br>
+ def rm : I<Opc, MRMSrcMem, (outs VR128:$dst),<br>
+ (ins VR128:$src1, i128mem:$src2),<br>
+ !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), []>, T8;<br>
+}<br>
+<br>
let Constraints = "$src1 = $dst", hasSideEffects = 0, Predicates = [HasSHA] in {<br>
def SHA1RNDS4rri : Ii8<0xCC, MRMSrcReg, (outs VR128:$dst),<br>
(ins VR128:$src1, VR128:$src2, i8imm:$src3),<o:p></o:p></p>
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<p class="MsoNormal">@@ -7334,8 +7345,24 @@<o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt"> (ins VR128:$src1, i128mem:$src2, i8imm:$src3),<br>
"sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",<br>
[]>, TA;<br>
+<br>
+ defm SHA1NEXTE : SHAI_binop<0xC8, "sha1nexte">;<br>
+ defm SHA1MSG1 : SHAI_binop<0xC9, "sha1msg1">;<br>
+ defm SHA1MSG2 : SHAI_binop<0xCA, "sha1msg2">;<br>
+<br>
+ let Uses=[XMM0] in<br>
+ defm SHA256RNDS2 : SHAI_binop<0xCB, "sha256rnds2">;<br>
+<br>
+ defm SHA256MSG1 : SHAI_binop<0xCC, "sha256msg1">;<br>
+ defm SHA256MSG2 : SHAI_binop<0xCD, "sha256msg2">;<br>
}<o:p></o:p></p>
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<p class="MsoNormal">+// Aliases with explicit %xmm0<br>
+def : InstAlias<"sha256rnds2\t{%xmm0, $src2, $dst|$dst, $src2, %xmm0}",<br>
+ (SHA256RNDS2rr VR128:$dst, VR128:$src2)>;<br>
+def : InstAlias<"sha256rnds2\t{%xmm0, $src2, $dst|$dst, $src2, %xmm0}",<br>
+ (SHA256RNDS2rm VR128:$dst, i128mem:$src2)>;<br>
+<br>
//===----------------------------------------------------------------------===//<br>
// AES-NI Instructions<o:p></o:p></p>
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<p class="MsoNormal"> //===----------------------------------------------------------------------===//<br>
Index: test/MC/Disassembler/X86/x86-64.txt<br>
===================================================================<br>
--- test/MC/Disassembler/X86/x86-64.txt<br>
+++ test/MC/Disassembler/X86/x86-64.txt<br>
@@ -162,4 +162,40 @@<br>
0x0f 0x3a 0xcc 0xd1 0x01<br>
<br>
# CHECK: sha1rnds4 $1, (%rax), %xmm2<br>
-0x0f 0x3a 0xcc 0x10 0x01<br>
\ No newline at end of file<br>
+0x0f 0x3a 0xcc 0x10 0x01<br>
+<br>
+# CHECK: sha1nexte %xmm1, %xmm2<br>
+0x0f 0x38 0xc8 0xd1<br>
+<br>
+# CHECK: sha1nexte (%rax), %xmm2<br>
+0x0f 0x38 0xc8 0x10<br>
+<br>
+# CHECK: sha1msg1 %xmm1, %xmm2<br>
+0x0f 0x38 0xc9 0xd1<br>
+<br>
+# CHECK: sha1msg1 (%rax), %xmm2<br>
+0x0f 0x38 0xc9 0x10<br>
+<br>
+# CHECK: sha1msg2 %xmm1, %xmm2<br>
+0x0f 0x38 0xca 0xd1<br>
+<br>
+# CHECK: sha1msg2 (%rax), %xmm2<br>
+0x0f 0x38 0xca 0x10<br>
+<br>
+# CHECK: sha256rnds2 (%rax), %xmm2<br>
+0x0f 0x38 0xcb 0x10<br>
+<br>
+# CHECK: sha256rnds2 %xmm1, %xmm2<br>
+0x0f 0x38 0xcb 0xd1<br>
+<br>
+# CHECK: sha256msg1 %xmm1, %xmm2<br>
+0x0f 0x38 0xcc 0xd1<br>
+<br>
+# CHECK: sha256msg1 (%rax), %xmm2<br>
+0x0f 0x38 0xcc 0x10<br>
+<br>
+# CHECK: sha256msg2 %xmm1, %xmm2<br>
+0x0f 0x38 0xcd 0xd1<br>
+<br>
+# CHECK: sha256msg2 (%rax), %xmm2<br>
+0x0f 0x38 0xcd 0x10<br>
\ No newline at end of file<br>
Index: test/MC/X86/x86_64-encoding.s<br>
===================================================================<br>
--- test/MC/X86/x86_64-encoding.s<br>
+++ test/MC/X86/x86_64-encoding.s<o:p></o:p></p>
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<p class="MsoNormal">@@ -128,6 +128,58 @@<o:p></o:p></p>
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<p class="MsoNormal"> // CHECK: encoding: [0x0f,0x3a,0xcc,0x10,0x01]<br>
sha1rnds4 $1, (%rax), %xmm2<br>
<br>
+// CHECK: sha1nexte %xmm1, %xmm2<br>
+// CHECK: encoding: [0x0f,0x38,0xc8,0xd1]<br>
+sha1nexte %xmm1, %xmm2<br>
+<br>
+// CHECK: sha1msg1 %xmm<o:p></o:p></p>
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<p class="MsoNormal">-- <br>
~Craig <o:p></o:p></p>
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<p class="MsoNormal"><br>
<br>
-- <br>
~Craig<o:p></o:p></p>
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