Oops you're right I missed that. Sorry!<span></span><br><br>On Friday, September 13, 2013, Langmuir, Ben wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">I thought that having the defm for the new instructions inside the same let block as sha1rnds4 would suffice. Is that not the case? That seems to be how the
AES instructions are set up just below this.<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Thanks for the tip about blendvpd – I’ll look at adding InstAliases.<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Ben<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Craig Topper [mailto:<a href="javascript:_e({}, 'cvml', 'craig.topper@gmail.com');" target="_blank">craig.topper@gmail.com</a>]
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<b>Sent:</b> Thursday, September 12, 2013 11:34 PM<br>
<b>To:</b> <a href="javascript:_e({}, 'cvml', 'reviews%2BD1663%2Bpublic%2B238ef3f1c2db68b0@llvm-reviews.chandlerc.com');" target="_blank">reviews+D1663+public+238ef3f1c2db68b0@llvm-reviews.chandlerc.com</a><br>
<b>Cc:</b> Langmuir, Ben; <a href="javascript:_e({}, 'cvml', 'llvm-commits@cs.uiuc.edu');" target="_blank">llvm-commits@cs.uiuc.edu</a>; Nadav Rotem<br>
<b>Subject:</b> Re: [PATCH] Finish assembly support for Intel SHA Extensions<u></u><u></u></span></p>
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<p><u></u> <u></u></p>
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<p>I think you're missing <span style="font-size:10.0pt;font-family:"Arial","sans-serif""> let Constraints = "$src1 = $dst", hasSideEffects = 0, Predicates = [HasSHA] on the new instructions aren't you?</span><u></u><u></u></p>
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<p><u></u> <u></u></p>
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<p><span style="font-size:10.0pt;font-family:"Arial","sans-serif"">Also please add InstAliases for the SHA256RNDS2 instruction so that users can specify the implicit xmm0 operand. See the aliases for </span><span style="font-family:"Arial","sans-serif"">blendvpd
for an example.</span><u></u><u></u></p>
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<p><u></u> <u></u></p>
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<p style="margin-bottom:12.0pt"><u></u> <u></u></p>
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<p>2013/9/12 Ben Langmuir <<a>ben.langmuir@intel.com</a>><u></u><u></u></p>
<p>Hi craig.topper,<br>
<br>
Add the remaining Intel SHA instructions and tests. All of these instructions<br>
seem to have the same form, except that sha256rnds2 has an implicit read<br>
dependency on xmm0.<br>
<br>
<a href="http://llvm-reviews.chandlerc.com/D1663" target="_blank">http://llvm-reviews.chandlerc.com/D1663</a><br>
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Files:<br>
lib/Target/X86/X86InstrSSE.td<br>
test/MC/Disassembler/X86/x86-64.txt<br>
test/MC/X86/x86_64-encoding.s<br>
<br>
Index: lib/Target/X86/X86InstrSSE.td<br>
===================================================================<br>
--- lib/Target/X86/X86InstrSSE.td<br>
+++ lib/Target/X86/X86InstrSSE.td<br>
@@ -7324,6 +7324,17 @@<br>
// SHA-NI Instructions<br>
//===----------------------------------------------------------------------===//<br>
<br>
+multiclass SHAI_binop<bits<8> Opc, string OpcodeStr> {<br>
+ def rr : I<Opc, MRMSrcReg, (outs VR128:$dst),<br>
+ (ins VR128:$src1, VR128:$src2),<br>
+ !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), []>, T8;<br>
+<br>
+ let mayLoad = 1 in<br>
+ def rm : I<Opc, MRMSrcMem, (outs VR128:$dst),<br>
+ (ins VR128:$src1, i128mem:$src2),<br>
+ !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"), []>, T8;<br>
+}<br>
+<br>
let Constraints = "$src1 = $dst", hasSideEffects = 0, Predicates = [HasSHA] in {<br>
def SHA1RNDS4rri : Ii8<0xCC, MRMSrcReg, (outs VR128:$dst),<br>
(ins VR128:$src1, VR128:$src2, i8imm:$src3),<br>
@@ -7334,6 +7345,16 @@<br>
(ins VR128:$src1, i128mem:$src2, i8imm:$src3),<br>
"sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",<br>
[]>, TA;<br>
+<br>
+ defm SHA1NEXTE : SHAI_binop<0xC8, "sha1nexte">;<br>
+ defm SHA1MSG1 : SHAI_binop<0xC9, "sha1msg1">;<br>
+ defm SHA1MSG2 : SHAI_binop<0xCA, "sha1msg2">;<br>
+<br>
+ let Uses=[XMM0] in<br>
+ defm SHA256RNDS2 : SHAI_binop<0xCB, "sha256rnds2">;<br>
+<br>
+ defm SHA256MSG1 : SHAI_binop<0xCC, "sha256msg1">;<br>
+ defm SHA256MSG2 : SHAI_binop<0xCD, "sha256msg2">;<br>
}<br>
<br>
//===----------------------------------------------------------------------===//<br>
Index: test/MC/Disassembler/X86/x86-64.txt<br>
===================================================================<br>
--- test/MC/Disassembler/X86/x86-64.txt<br>
+++ test/MC/Disassembler/X86/x86-64.txt<br>
@@ -162,4 +162,40 @@<br>
0x0f 0x3a 0xcc 0xd1 0x01<br>
<br>
# CHECK: sha1rnds4 $1, (%rax), %xmm2<br>
-0x0f 0x3a 0xcc 0x10 0x01<br>
\ No newline at end of file<br>
+0x0f 0x3a 0xcc 0x10 0x01<br>
+<br>
+# CHECK: sha1nexte %xmm1, %xmm2<br>
+0x0f 0x38 0xc8 0xd1<br>
+<br>
+# CHECK: sha1nexte (%rax), %xmm2<br>
+0x0f 0x38 0xc8 0x10<br>
+<br>
+# CHECK: sha1msg1 %xmm1, %xmm2<br>
+0x0f 0x38 0xc9 0xd1<br>
+<br>
+# CHECK: sha1msg1 (%rax), %xmm2<br>
+0x0f 0x38 0xc9 0x10<br>
+<br>
+# CHECK: sha1msg2 %xmm1, %xmm2<br>
+0x0f 0x38 0xca 0xd1<br>
+<br>
+# CHECK: sha1msg2 (%rax), %xmm2<br>
+0x0f 0x38 0xca 0x10<br>
+<br>
+# CHECK: sha256rnds2 (%rax), %xmm2<br>
+0x0f 0x38 0xcb 0x10<br>
+<br>
+# CHECK: sha256rnds2 %xmm1, %xmm2<br>
+0x0f 0x38 0xcb 0xd1<br>
+<br>
+# CHECK: sha256msg1 %xmm1, %xmm2<br>
+0x0f 0x38 0xcc 0xd1<br>
+<br>
+# CHECK: sha256msg1 (%rax), %xmm2<br>
+0x0f 0x38 0xcc 0x10<br>
+<br>
+# CHECK: sha256msg2 %xmm1, %xmm2<br>
+0x0f 0x38 0xcd 0xd1<br>
+<br>
+# CHECK: sha256msg2 (%rax), %xmm2<br>
+0x0f 0x38 0xcd 0x10<br>
\ No newline at end of file<br>
Index: test/MC/X86/x86_64-encoding.s<br>
===================================================================<br>
--- test/MC/X86/x86_64-encoding.s<br>
+++ test/MC/X86/x86_64-encoding.s<br>
@@ -128,6 +128,50 @@<br>
// CHECK: encoding: [0x0f,0x3a,0xcc,0x10,0x01]<br>
sha1rnds4 $1, (%rax), %xmm2</p></div></div></div>
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</blockquote><br><br>-- <br>~Craig<br>