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</o:shapelayout></xml><![endif]--></head><body lang=EN-GB link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Thanks Zonr! Sorry I missed that.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Committed as r190602.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><div style='border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0cm 0cm 0cm'><p class=MsoNormal><b><span lang=EN-US style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span lang=EN-US style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> Zonr Chang [mailto:zonr.xchg@gmail.com] <br><b>Sent:</b> 12 September 2013 13:32<br><b>To:</b> Joey Gouly<br><b>Cc:</b> llvm-commits<br><b>Subject:</b> Re: [llvm] r190598 - Add an instruction deprecation feature to TableGen.<o:p></o:p></span></p></div><p class=MsoNormal><o:p> </o:p></p><div><p class=MsoNormal>Attachment contains the patch I used to fix the build break in tools/lto/LTOModule.cpp. Please review and commit if ok.<o:p></o:p></p></div><div><p class=MsoNormal>Zonr<o:p></o:p></p></div><div><p class=MsoNormal> <o:p></o:p></p></div><div><p class=MsoNormal>On Thu, Sep 12, 2013 at 6:41 PM, Joey Gouly <<a href="mailto:Joey.Gouly@arm.com" target="_blank">Joey.Gouly@arm.com</a>> wrote:<o:p></o:p></p><p class=MsoNormal>Hi Timur,<br><br>Sorry, just about to commit the clang side of the patch.<br><br>Thanks,<br>Joey<br><br>________________________________________<br>From: Timur Iskhodzhanov [<a href="mailto:timurrrr@google.com" target="_blank">timurrrr@google.com</a>]<br>Sent: 12 September 2013 11:40<br>To: Joey Gouly<br>Cc: llvm-commits<br>Subject: Re: [llvm] r190598 - Add an instruction deprecation feature to TableGen.<o:p></o:p></p><div><p class=MsoNormal style='margin-bottom:12.0pt'><br>This seems to break build on Windows<br><br>llvm\tools\clang\lib\Parse\ParseStmt.cpp(2110) : error C2660: 'llvm::Target::createMCAsmParser' : function does not take 2 arguments<br><br>Can you please take a look?<br><br><o:p></o:p></p></div><p class=MsoNormal>2013/9/12 Joey Gouly <<a href="mailto:joey.gouly@arm.com" target="_blank">joey.gouly@arm.com</a><mailto:<a href="mailto:joey.gouly@arm.com" target="_blank">joey.gouly@arm.com</a>>><o:p></o:p></p><div><div><p class=MsoNormal>Author: joey<br>Date: Thu Sep 12 05:28:05 2013<br>New Revision: 190598<br><br>URL: <a href="http://llvm.org/viewvc/llvm-project?rev=190598&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=190598&view=rev</a><br>Log:<br>Add an instruction deprecation feature to TableGen.<br><br>The 'Deprecated' class allows you to specify a SubtargetFeature that the<br>instruction is deprecated on.<br><br>The 'ComplexDeprecationPredicate' class allows you to define a custom<br>predicate that is called to check for deprecation.<br>For example:<br>  ComplexDeprecationPredicate<"MCR"><br><br>would mean you would have to define the following function:<br>  bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,<br>                             std::string &Info)<br><br>Which returns 'false' for not deprecated, and 'true' for deprecated<br>and store the warning message in 'Info'.<br><br>The MCTargetAsmParser constructor was chaned to take an extra argument of<br>the MCInstrInfo class, so out-of-tree targets will need to be changed.<br><br><br>Modified:<br>    llvm/trunk/include/llvm/CodeGen/AsmPrinter.h<br>    llvm/trunk/include/llvm/MC/MCInstrDesc.h<br>    llvm/trunk/include/llvm/Support/TargetRegistry.h<br>    llvm/trunk/include/llvm/Target/Target.td<br>    llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp<br>    llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp<br>    llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp<br>    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td<br>    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp<br>    llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp<br>    llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp<br>    llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp<br>    llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp<br>    llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp<br>    llvm/trunk/test/MC/ARM/deprecated-v8.s<br>    llvm/trunk/tools/llvm-mc/llvm-mc.cpp<br>    llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp<br>    llvm/trunk/utils/TableGen/CodeGenInstruction.cpp<br>    llvm/trunk/utils/TableGen/CodeGenInstruction.h<br>    llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp<br><br>Modified: llvm/trunk/include/llvm/CodeGen/AsmPrinter.h<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/AsmPrinter.h?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/include/llvm/CodeGen/AsmPrinter.h (original)<br>+++ llvm/trunk/include/llvm/CodeGen/AsmPrinter.h Thu Sep 12 05:28:05 2013<br>@@ -41,6 +41,7 @@ namespace llvm {<br>   class MCAsmInfo;<br>   class MCCFIInstruction;<br>   class MCContext;<br>+  class MCInstrInfo;<br>   class MCSection;<br>   class MCStreamer;<br>   class MCSymbol;<br>@@ -64,6 +65,7 @@ namespace llvm {<br>     ///<br>     const MCAsmInfo *MAI;<br><br>+    const MCInstrInfo *MII;<br>     /// OutContext - This is the context for the output file that we are<br>     /// streaming.  This owns all of the global MC-related objects for the<br>     /// generated translation unit.<br><br>Modified: llvm/trunk/include/llvm/MC/MCInstrDesc.h<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCInstrDesc.h?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCInstrDesc.h?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/include/llvm/MC/MCInstrDesc.h (original)<br>+++ llvm/trunk/include/llvm/MC/MCInstrDesc.h Thu Sep 12 05:28:05 2013<br>@@ -17,6 +17,7 @@<br><br> #include "llvm/MC/MCInst.h"<br> #include "llvm/MC/MCRegisterInfo.h"<br>+#include "llvm/MC/MCSubtargetInfo.h"<br> #include "llvm/Support/DataTypes.h"<br><br> namespace llvm {<br>@@ -145,6 +146,10 @@ public:<br>   const uint16_t *ImplicitUses;  // Registers implicitly read by this instr<br>   const uint16_t *ImplicitDefs;  // Registers implicitly defined by this instr<br>   const MCOperandInfo *OpInfo;   // 'NumOperands' entries about operands<br>+  uint64_t DeprecatedFeatureMask;// Feature bits that this is deprecated on, if any<br>+  // A complex method to determine is a certain is deprecated or not, and return<br>+  // the reason for deprecation.<br>+  bool (*ComplexDeprecationInfo)(MCInst &, MCSubtargetInfo &, std::string &);<br><br>   /// \brief Returns the value of the specific constraint if<br>   /// it is set. Returns -1 if it is not set.<br>@@ -158,6 +163,20 @@ public:<br>     return -1;<br>   }<br><br>+  /// \brief Returns true if a certain instruction is deprecated and if so<br>+  /// returns the reason in \p Info.<br>+  bool getDeprecatedInfo(MCInst &MI, MCSubtargetInfo &STI,<br>+                         std::string &Info) const {<br>+    if (ComplexDeprecationInfo)<br>+      return ComplexDeprecationInfo(MI, STI, Info);<br>+    if (DeprecatedFeatureMask != 0) {<br>+      // FIXME: it would be nice to include the subtarget feature here.<br>+      Info = "deprecated";<br>+      return true;<br>+    }<br>+    return false;<br>+  }<br>+<br>   /// \brief Return the opcode number for this descriptor.<br>   unsigned getOpcode() const {<br>     return Opcode;<br><br>Modified: llvm/trunk/include/llvm/Support/TargetRegistry.h<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetRegistry.h?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/TargetRegistry.h?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/include/llvm/Support/TargetRegistry.h (original)<br>+++ llvm/trunk/include/llvm/Support/TargetRegistry.h Thu Sep 12 05:28:05 2013<br>@@ -108,7 +108,8 @@ namespace llvm {<br>                                                 StringRef TT,<br>                                                 StringRef CPU);<br>     typedef MCTargetAsmParser *(*MCAsmParserCtorTy)(MCSubtargetInfo &STI,<br>-                                                    MCAsmParser &P);<br>+                                                    MCAsmParser &P,<br>+                                                    const MCInstrInfo &MII);<br>     typedef MCDisassembler *(*MCDisassemblerCtorTy)(const Target &T,<br>                                                     const MCSubtargetInfo &STI);<br>     typedef MCInstPrinter *(*MCInstPrinterCtorTy)(const Target &T,<br>@@ -386,10 +387,11 @@ namespace llvm {<br>     /// \param Parser The target independent parser implementation to use for<br>     /// parsing and lexing.<br>     MCTargetAsmParser *createMCAsmParser(MCSubtargetInfo &STI,<br>-                                         MCAsmParser &Parser) const {<br>+                                         MCAsmParser &Parser,<br>+                                         const MCInstrInfo &MII) const {<br>       if (!MCAsmParserCtorFn)<br>         return 0;<br>-      return MCAsmParserCtorFn(STI, Parser);<br>+      return MCAsmParserCtorFn(STI, Parser, MII);<br>     }<br><br>     /// createAsmPrinter - Create a target specific assembly printer pass.  This<br>@@ -1142,8 +1144,9 @@ namespace llvm {<br>     }<br><br>   private:<br>-    static MCTargetAsmParser *Allocator(MCSubtargetInfo &STI, MCAsmParser &P) {<br>-      return new MCAsmParserImpl(STI, P);<br>+    static MCTargetAsmParser *Allocator(MCSubtargetInfo &STI, MCAsmParser &P,<br>+                                        const MCInstrInfo &MII) {<br>+      return new MCAsmParserImpl(STI, P, MII);<br>     }<br>   };<br><br><br>Modified: llvm/trunk/include/llvm/Target/Target.td<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/Target.td?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/include/llvm/Target/Target.td (original)<br>+++ llvm/trunk/include/llvm/Target/Target.td Thu Sep 12 05:28:05 2013<br>@@ -1010,6 +1010,17 @@ class SubtargetFeature<string n, string<br>   list<SubtargetFeature> Implies = i;<br> }<br><br>+/// Specifies a Subtarget feature that this instruction is deprecated on.<br>+class Deprecated<SubtargetFeature dep> {<br>+  SubtargetFeature DeprecatedFeatureMask = dep;<br>+}<br>+<br>+/// A custom predicate used to determine if an instruction is<br>+/// deprecated or not.<br>+class ComplexDeprecationPredicate<string dep> {<br>+  string ComplexDeprecationPredicate = dep;<br>+}<br>+<br> //===----------------------------------------------------------------------===//<br> // Processor chip sets - These values represent each of the chip sets supported<br> // by the scheduler.  Each Processor definition requires corresponding<br><br>Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (original)<br>+++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinter.cpp Thu Sep 12 05:28:05 2013<br>@@ -94,7 +94,7 @@ static unsigned getGVAlignmentLog2(const<br><br> AsmPrinter::AsmPrinter(TargetMachine &tm, MCStreamer &Streamer)<br>   : MachineFunctionPass(ID),<br>-    TM(tm), MAI(tm.getMCAsmInfo()),<br>+    TM(tm), MAI(tm.getMCAsmInfo()), MII(tm.getInstrInfo()),<br>     OutContext(Streamer.getContext()),<br>     OutStreamer(Streamer),<br>     LastMI(0), LastFn(0), Counter(~0U), SetCounter(0) {<br><br>Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp (original)<br>+++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Thu Sep 12 05:28:05 2013<br>@@ -123,7 +123,7 @@ void AsmPrinter::EmitInlineAsm(StringRef<br>                                              TM.getTargetCPU(),<br>                                              TM.getTargetFeatureString()));<br>   OwningPtr<MCTargetAsmParser><br>-    TAP(TM.getTarget().createMCAsmParser(*STI, *Parser));<br>+    TAP(TM.getTarget().createMCAsmParser(*STI, *Parser, *MII));<br>   if (!TAP)<br>     report_fatal_error("Inline asm not supported by this streamer because"<br>                        " we don't have an asm parser for this target\n");<br><br>Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (original)<br>+++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Thu Sep 12 05:28:05 2013<br>@@ -54,8 +54,9 @@ public:<br> #include "AArch64GenAsmMatcher.inc"<br>   };<br><br>-  AArch64AsmParser(MCSubtargetInfo &_STI, MCAsmParser &_Parser)<br>-    : MCTargetAsmParser(), STI(_STI), Parser(_Parser) {<br>+  AArch64AsmParser(MCSubtargetInfo &_STI, MCAsmParser &_Parser,<br>+                   const MCInstrInfo &MII)<br>+      : MCTargetAsmParser(), STI(_STI), Parser(_Parser) {<br>     MCAsmParserExtension::Initialize(_Parser);<br><br>     // Initialize the set of available features.<br><br>Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)<br>+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Thu Sep 12 05:28:05 2013<br>@@ -1840,7 +1840,7 @@ defm PLDW : APreLoad<0, 1, "pldw">, Requ<br> defm PLI  : APreLoad<1, 0, "pli">,  Requires<[IsARM,HasV7]>;<br><br> def SETEND : AXI<(outs), (ins setend_op:$end), MiscFrm, NoItinerary,<br>-                 "setend\t$end", []>, Requires<[IsARM]> {<br>+                 "setend\t$end", []>, Requires<[IsARM]>, Deprecated<HasV8Ops> {<br>   bits<1> end;<br>   let Inst{31-10} = 0b1111000100000001000000;<br>   let Inst{9} = end;<br>@@ -4772,7 +4772,8 @@ def MCR : MovRCopro<"mcr", 0 /* from ARM<br>                     (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,<br>                          c_imm:$CRm, imm0_7:$opc2),<br>                     [(int_arm_mcr imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn,<br>-                                  imm:$CRm, imm:$opc2)]>;<br>+                                  imm:$CRm, imm:$opc2)]>,<br>+                    ComplexDeprecationPredicate<"MCR">;<br> def : ARMInstAlias<"mcr${p} $cop, $opc1, $Rt, $CRn, $CRm",<br>                    (MCR p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn,<br>                         c_imm:$CRm, 0, pred:$p)>;<br><br>Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)<br>+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Thu Sep 12 05:28:05 2013<br>@@ -24,6 +24,7 @@<br> #include "llvm/MC/MCExpr.h"<br> #include "llvm/MC/MCInst.h"<br> #include "llvm/MC/MCInstrDesc.h"<br>+#include "llvm/MC/MCInstrInfo.h"<br> #include "llvm/MC/MCParser/MCAsmLexer.h"<br> #include "llvm/MC/MCParser/MCAsmParser.h"<br> #include "llvm/MC/MCParser/MCParsedAsmOperand.h"<br>@@ -47,6 +48,7 @@ enum VectorLaneTy { NoLanes, AllLanes, I<br> class ARMAsmParser : public MCTargetAsmParser {<br>   MCSubtargetInfo &STI;<br>   MCAsmParser &Parser;<br>+  const MCInstrInfo &MII;<br>   const MCRegisterInfo *MRI;<br><br>   // Unwind directives state<br>@@ -232,8 +234,6 @@ class ARMAsmParser : public MCTargetAsmP<br>                               SmallVectorImpl<MCParsedAsmOperand*> &Operands);<br>   bool shouldOmitPredicateOperand(StringRef Mnemonic,<br>                               SmallVectorImpl<MCParsedAsmOperand*> &Operands);<br>-  bool isDeprecated(MCInst &Inst, StringRef &Info);<br>-<br> public:<br>   enum ARMMatchResultTy {<br>     Match_RequiresITBlock = FIRST_TARGET_MATCH_RESULT_TY,<br>@@ -245,8 +245,9 @@ public:<br><br>   };<br><br>-  ARMAsmParser(MCSubtargetInfo &_STI, MCAsmParser &_Parser)<br>-    : MCTargetAsmParser(), STI(_STI), Parser(_Parser), FPReg(-1) {<br>+  ARMAsmParser(MCSubtargetInfo &_STI, MCAsmParser &_Parser,<br>+               const MCInstrInfo &MII)<br>+      : MCTargetAsmParser(), STI(_STI), Parser(_Parser), MII(MII), FPReg(-1) {<br>     MCAsmParserExtension::Initialize(_Parser);<br><br>     // Cache the MCRegisterInfo.<br>@@ -4972,14 +4973,6 @@ bool ARMAsmParser::shouldOmitPredicateOp<br>   return false;<br> }<br><br>-bool ARMAsmParser::isDeprecated(MCInst &Inst, StringRef &Info) {<br>-  if (hasV8Ops() && Inst.getOpcode() == ARM::SETEND) {<br>-    Info = "armv8";<br>-    return true;<br>-  }<br>-  return false;<br>-}<br>-<br> static bool isDataTypeToken(StringRef Tok) {<br>   return Tok == ".8" || Tok == ".16" || Tok == ".32" || Tok == ".64" ||<br>     Tok == ".i8" || Tok == ".i16" || Tok == ".i32" || Tok == ".i64" ||<br>@@ -5296,16 +5289,6 @@ static bool listContainsReg(MCInst &Inst<br>   return false;<br> }<br><br>-// FIXME: We would really prefer to have MCInstrInfo (the wrapper around<br>-// the ARMInsts array) instead. Getting that here requires awkward<br>-// API changes, though. Better way?<br>-namespace llvm {<br>-extern const MCInstrDesc ARMInsts[];<br>-}<br>-static const MCInstrDesc &getInstDesc(unsigned Opcode) {<br>-  return ARMInsts[Opcode];<br>-}<br>-<br> // Return true if instruction has the interesting property of being<br> // allowed in IT blocks, but not being predicable.<br> static bool instIsBreakpoint(const MCInst &Inst) {<br>@@ -5320,7 +5303,7 @@ static bool instIsBreakpoint(const MCIns<br> bool ARMAsmParser::<br> validateInstruction(MCInst &Inst,<br>                     const SmallVectorImpl<MCParsedAsmOperand*> &Operands) {<br>-  const MCInstrDesc &MCID = getInstDesc(Inst.getOpcode());<br>+  const MCInstrDesc &MCID = MII.get(Inst.getOpcode());<br>   SMLoc Loc = Operands[0]->getStartLoc();<br><br>   // Check the IT block state first.<br>@@ -5513,10 +5496,6 @@ validateInstruction(MCInst &Inst,<br>   }<br>   }<br><br>-  StringRef DepInfo;<br>-  if (isDeprecated(Inst, DepInfo))<br>-    Warning(Loc, "deprecated on " + DepInfo);<br>-<br>   return false;<br> }<br><br>@@ -7553,7 +7532,7 @@ unsigned ARMAsmParser::checkTargetMatchP<br>   // 16-bit thumb arithmetic instructions either require or preclude the 'S'<br>   // suffix depending on whether they're in an IT block or not.<br>   unsigned Opc = Inst.getOpcode();<br>-  const MCInstrDesc &MCID = getInstDesc(Opc);<br>+  const MCInstrDesc &MCID = MII.get(Opc);<br>   if (MCID.TSFlags & ARMII::ThumbArithFlagSetting) {<br>     assert(MCID.hasOptionalDef() &&<br>            "optionally flag setting instruction missing optional def operand");<br><br>Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp (original)<br>+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp Thu Sep 12 05:28:05 2013<br>@@ -26,16 +26,32 @@<br> #include "llvm/Support/ErrorHandling.h"<br> #include "llvm/Support/TargetRegistry.h"<br><br>+using namespace llvm;<br>+<br> #define GET_REGINFO_MC_DESC<br> #include "ARMGenRegisterInfo.inc"<br><br>+static bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,<br>+                                  std::string &Info) {<br>+  // Checks for the deprecated CP15ISB encoding:<br>+  // mcr pX, #0, rX, c7, c5, #4<br>+  if (STI.getFeatureBits() & llvm::ARM::HasV8Ops &&<br>+      (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) &&<br>+      (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7) &&<br>+      (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) &&<br>+      (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) {<br>+    Info = "deprecated on armv8";<br>+    return true;<br>+  }<br>+  return false;<br>+}<br>+<br> #define GET_INSTRINFO_MC_DESC<br> #include "ARMGenInstrInfo.inc"<br><br> #define GET_SUBTARGETINFO_MC_DESC<br> #include "ARMGenSubtargetInfo.inc"<br><br>-using namespace llvm;<br><br> std::string ARM_MC::ParseARMTriple(StringRef TT, StringRef CPU) {<br>   Triple triple(TT);<br><br>Modified: llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp (original)<br>+++ llvm/trunk/lib/Target/Mips/AsmParser/MipsAsmParser.cpp Thu Sep 12 05:28:05 2013<br>@@ -24,6 +24,10 @@<br><br> using namespace llvm;<br><br>+namespace llvm {<br>+class MCInstrInfo;<br>+}<br>+<br> namespace {<br> class MipsAssemblerOptions {<br> public:<br>@@ -201,8 +205,10 @@ class MipsAsmParser : public MCTargetAsm<br>   bool processInstruction(MCInst &Inst, SMLoc IDLoc,<br>                         SmallVectorImpl<MCInst> &Instructions);<br> public:<br>-  MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser)<br>-    : MCTargetAsmParser(), STI(sti), Parser(parser), hasConsumedDollar(false) {<br>+  MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser,<br>+                const MCInstrInfo &MII)<br>+      : MCTargetAsmParser(), STI(sti), Parser(parser),<br>+        hasConsumedDollar(false) {<br>     // Initialize the set of available features.<br>     setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));<br>   }<br><br>Modified: llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp (original)<br>+++ llvm/trunk/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp Thu Sep 12 05:28:05 2013<br>@@ -218,8 +218,9 @@ class PPCAsmParser : public MCTargetAsmP<br><br><br> public:<br>-  PPCAsmParser(MCSubtargetInfo &_STI, MCAsmParser &_Parser)<br>-    : MCTargetAsmParser(), STI(_STI), Parser(_Parser) {<br>+  PPCAsmParser(MCSubtargetInfo &_STI, MCAsmParser &_Parser,<br>+               const MCInstrInfo &MII)<br>+      : MCTargetAsmParser(), STI(_STI), Parser(_Parser) {<br>     // Check for 64-bit vs. 32-bit pointer mode.<br>     Triple TheTriple(STI.getTargetTriple());<br>     IsPPC64 = (TheTriple.getArch() == Triple::ppc64 ||<br><br>Modified: llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp (original)<br>+++ llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp Thu Sep 12 05:28:05 2013<br>@@ -327,8 +327,9 @@ private:<br>                     StringRef Mnemonic);<br><br> public:<br>-  SystemZAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser)<br>-    : MCTargetAsmParser(), STI(sti), Parser(parser) {<br>+  SystemZAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser,<br>+                   const MCInstrInfo &MII)<br>+      : MCTargetAsmParser(), STI(sti), Parser(parser) {<br>     MCAsmParserExtension::Initialize(Parser);<br><br>     // Initialize the set of available features.<br><br>Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)<br>+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu Sep 12 05:28:05 2013<br>@@ -556,8 +556,9 @@ private:<br>   /// }<br><br> public:<br>-  X86AsmParser(MCSubtargetInfo &sti, MCAsmParser &parser)<br>-    : MCTargetAsmParser(), STI(sti), Parser(parser), InstInfo(0) {<br>+  X86AsmParser(MCSubtargetInfo &sti, MCAsmParser &parser,<br>+               const MCInstrInfo &MII)<br>+      : MCTargetAsmParser(), STI(sti), Parser(parser), InstInfo(0) {<br><br>     // Initialize the set of available features.<br>     setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));<br><br>Modified: llvm/trunk/test/MC/ARM/deprecated-v8.s<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/deprecated-v8.s?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/deprecated-v8.s?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/test/MC/ARM/deprecated-v8.s (original)<br>+++ llvm/trunk/test/MC/ARM/deprecated-v8.s Thu Sep 12 05:28:05 2013<br>@@ -1,3 +1,5 @@<br> @ RUN: llvm-mc -triple armv8 -show-encoding < %s 2>&1 | FileCheck %s<br> setend be<br>+@ CHECK: warning: deprecated<br>+mcr p8, #0, r5, c7, c5, #4<br> @ CHECK: warning: deprecated on armv8<br><br>Modified: llvm/trunk/tools/llvm-mc/llvm-mc.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/llvm-mc.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llvm-mc/llvm-mc.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/tools/llvm-mc/llvm-mc.cpp (original)<br>+++ llvm/trunk/tools/llvm-mc/llvm-mc.cpp Thu Sep 12 05:28:05 2013<br>@@ -319,10 +319,10 @@ static int AsLexInput(SourceMgr &SrcMgr,<br><br> static int AssembleInput(const char *ProgName, const Target *TheTarget,<br>                          SourceMgr &SrcMgr, MCContext &Ctx, MCStreamer &Str,<br>-                         MCAsmInfo &MAI, MCSubtargetInfo &STI) {<br>+                         MCAsmInfo &MAI, MCSubtargetInfo &STI, MCInstrInfo &MCII) {<br>   OwningPtr<MCAsmParser> Parser(createMCAsmParser(SrcMgr, Ctx,<br>                                                   Str, MAI));<br>-  OwningPtr<MCTargetAsmParser> TAP(TheTarget->createMCAsmParser(STI, *Parser));<br>+  OwningPtr<MCTargetAsmParser> TAP(TheTarget->createMCAsmParser(STI, *Parser, MCII));<br>   if (!TAP) {<br>     errs() << ProgName<br>            << ": error: this target does not support assembly parsing.\n";<br>@@ -459,7 +459,7 @@ int main(int argc, char **argv) {<br>     Res = AsLexInput(SrcMgr, *MAI, Out.get());<br>     break;<br>   case AC_Assemble:<br>-    Res = AssembleInput(ProgName, TheTarget, SrcMgr, Ctx, *Str, *MAI, *STI);<br>+    Res = AssembleInput(ProgName, TheTarget, SrcMgr, Ctx, *Str, *MAI, *STI, *MCII);<br>     break;<br>   case AC_MDisassemble:<br>     assert(IP && "Expected assembly output");<br><br>Modified: llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp (original)<br>+++ llvm/trunk/utils/TableGen/AsmMatcherEmitter.cpp Thu Sep 12 05:28:05 2013<br>@@ -430,6 +430,9 @@ struct MatchableInfo {<br>   /// function.<br>   std::string ConversionFnKind;<br><br>+  /// If this instruction is deprecated in some form.<br>+  bool HasDeprecation;<br>+<br>   MatchableInfo(const CodeGenInstruction &CGI)<br>     : AsmVariantID(0), TheDef(CGI.TheDef), DefRec(&CGI),<br>       AsmString(CGI.AsmString) {<br>@@ -779,6 +782,13 @@ void MatchableInfo::initialize(const Asm<br>     if (Record *Reg = AsmOperands[i].SingletonReg)<br>       SingletonRegisters.insert(Reg);<br>   }<br>+<br>+  const RecordVal *DepMask = TheDef->getValue("DeprecatedFeatureMask");<br>+  if (!DepMask)<br>+    DepMask = TheDef->getValue("ComplexDeprecationPredicate");<br>+<br>+  HasDeprecation =<br>+      DepMask ? !DepMask->getValue()->getAsUnquotedString().empty() : false;<br> }<br><br> /// tokenizeAsmString - Tokenize a simplified assembly string.<br>@@ -2743,11 +2753,13 @@ void AsmMatcherEmitter::run(raw_ostream<br><br>   size_t MaxNumOperands = 0;<br>   unsigned MaxMnemonicIndex = 0;<br>+  bool HasDeprecation = false;<br>   for (std::vector<MatchableInfo*>::const_iterator it =<br>          Info.Matchables.begin(), ie = Info.Matchables.end();<br>        it != ie; ++it) {<br>     MatchableInfo &II = **it;<br>     MaxNumOperands = std::max(MaxNumOperands, II.AsmOperands.size());<br>+    HasDeprecation |= II.HasDeprecation;<br><br>     // Store a pascal-style length byte in the mnemonic.<br>     std::string LenMnemonic = char(II.Mnemonic.size()) + II.Mnemonic.str();<br>@@ -3018,6 +3030,14 @@ void AsmMatcherEmitter::run(raw_ostream<br>   if (!InsnCleanupFn.empty())<br>     OS << "    " << InsnCleanupFn << "(Inst);\n";<br><br>+  if (HasDeprecation) {<br>+    OS << "    std::string Info;\n";<br>+    OS << "    if (MII.get(Inst.getOpcode()).getDeprecatedInfo(Inst, STI, Info)) {\n";<br>+    OS << "      SMLoc Loc = ((" << Target.getName() << "Operand*)Operands[0])->getStartLoc();\n";<br>+    OS << "      Parser.Warning(Loc, Info, None);\n";<br>+    OS << "    }\n";<br>+  }<br>+<br>   OS << "    return Match_Success;\n";<br>   OS << "  }\n\n";<br><br><br>Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/utils/TableGen/CodeGenInstruction.cpp (original)<br>+++ llvm/trunk/utils/TableGen/CodeGenInstruction.cpp Thu Sep 12 05:28:05 2013<br>@@ -337,6 +337,20 @@ CodeGenInstruction::CodeGenInstruction(R<br><br>   // Parse the DisableEncoding field.<br>   Operands.ProcessDisableEncoding(R->getValueAsString("DisableEncoding"));<br>+<br>+  // First check for a ComplexDeprecationPredicate.<br>+  if (R->getValue("ComplexDeprecationPredicate")) {<br>+    HasComplexDeprecationPredicate = true;<br>+    DeprecatedReason = R->getValueAsString("ComplexDeprecationPredicate");<br>+  } else if (RecordVal *Dep = R->getValue("DeprecatedFeatureMask")) {<br>+    // Check if we have a Subtarget feature mask.<br>+    HasComplexDeprecationPredicate = false;<br>+    DeprecatedReason = Dep->getValue()->getAsString();<br>+  } else {<br>+    // This instruction isn't deprecated.<br>+    HasComplexDeprecationPredicate = false;<br>+    DeprecatedReason = "";<br>+  }<br> }<br><br> /// HasOneImplicitDefWithKnownVT - If the instruction has at least one<br><br>Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original)<br>+++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Thu Sep 12 05:28:05 2013<br>@@ -248,6 +248,9 @@ namespace llvm {<br>     bool isCodeGenOnly;<br>     bool isPseudo;<br><br>+    std::string DeprecatedReason;<br>+    bool HasComplexDeprecationPredicate;<br>+<br>     /// Are there any undefined flags?<br>     bool hasUndefFlags() const {<br>       return mayLoad_Unset || mayStore_Unset || hasSideEffects_Unset;<br><br>Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp<br>URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=190598&r1=190597&r2=190598&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=190598&r1=190597&r2=190598&view=diff</a><br>==============================================================================<br>--- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original)<br>+++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Thu Sep 12 05:28:05 2013<br>@@ -514,6 +514,19 @@ void InstrInfoEmitter::emitRecord(const<br>   else<br>     OS << "OperandInfo" << OpInfo.find(OperandInfo)->second;<br><br>+  CodeGenTarget &Target = CDP.getTargetInfo();<br>+  if (Inst.HasComplexDeprecationPredicate)<br>+    // Emit a function pointer to the complex predicate method.<br>+    OS << ",0"<br>+       << ",&get" << Inst.DeprecatedReason << "DeprecationInfo";<br>+  else if (!Inst.DeprecatedReason.empty())<br>+    // Emit the Subtarget feature.<br>+    OS << "," << Target.getInstNamespace() << "::" << Inst.DeprecatedReason<br>+       << ",0";<br>+  else<br>+    // Instruction isn't deprecated.<br>+    OS << ",0,0";<br>+<br>   OS << " },  // Inst #" << Num << " = " << Inst.TheDef->getName() << "\n";<br> }<br><br><br><br>_______________________________________________<br>llvm-commits mailing list<o:p></o:p></p></div></div><p class=MsoNormal><a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank">llvm-commits@cs.uiuc.edu</a><mailto:<a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank">llvm-commits@cs.uiuc.edu</a>><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br><br><br>-- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium.  Thank you.<br><br>ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No:  2557590<br>ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No:  2548782<o:p></o:p></p><div><div><p class=MsoNormal><br><br>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank">llvm-commits@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><o:p></o:p></p></div></div></div><p class=MsoNormal><o:p> </o:p></p></div></body></html>