<div dir="ltr">I'm sorry to hear that this is making something upset. I'm afraid I do not have such hardware. The transform that this code does is pretty simple. A wild guess would be that the ARM backend is surprised by something and is lowering some code wrong.<div>
<br></div><div style>I'd be happy to help you with this, is there an easy way for me to get proper hardware?</div><div style><br></div><div style>Thanks</div><div style>-- </div><div style>David Majnemer</div></div><div class="gmail_extra">
<br><br><div class="gmail_quote">On Wed, Apr 17, 2013 at 2:39 AM, Renato Golin <span dir="ltr"><<a href="mailto:renato.golin@linaro.org" target="_blank">renato.golin@linaro.org</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div dir="ltr">Folks,<div><br></div><div>This patch is not agreeing with some Cortex-A9/15 specific optimization, as it fails only when I specify either on --mcpu the command line option. Before I start digging the huge code, can anyone of you spot any direct problem of this patch against A9/15 specific optimizations?</div>
<div><br></div><div>I'm trying to reduce the test into a manageable and reproducible source file, but this can take a while. If I don't hear from anyone until Friday, I'm afraid I'll have to revert the patch until we can figure out what's going on. We need a clean trunk to produce the LLVM ARM binaries for 3.3 release.</div>
<div><br></div><div>cheers,</div><div>--renato</div></div><div class="HOEnZb"><div class="h5"><div class="gmail_extra"><br><br><div class="gmail_quote">On 16 April 2013 14:01, Renato Golin <span dir="ltr"><<a href="mailto:renato.golin@linaro.org" target="_blank">renato.golin@linaro.org</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div dir="ltr">Hi David,<div><br></div><div>This patch broke one of out buildbots:</div><div><br></div><div><a href="http://lab.llvm.org:8011/builders/clang-native-arm-lnt/builds/532" target="_blank">http://lab.llvm.org:8011/builders/clang-native-arm-lnt/builds/532</a><br>
</div><div><br></div><div>I have reverted you patch locally and the test pass again, but it's not easy to spot what's wrong with it.</div><div><br></div><div>Do you have access to ARM hardware?</div>
<div><br></div><div>cheers,</div><div>--renato</div></div><div><div><div class="gmail_extra"><br><br><div class="gmail_quote">On 11 April 2013 21:05, David Majnemer <span dir="ltr"><<a href="mailto:david.majnemer@gmail.com" target="_blank">david.majnemer@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: majnemer<br>
Date: Thu Apr 11 15:05:46 2013<br>
New Revision: 179316<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=179316&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=179316&view=rev</a><br>
Log:<br>
Optimize icmp involving addition better<br>
<br>
Allows LLVM to optimize sequences like the following:<br>
<br>
%add = add nsw i32 %x, 1<br>
%cmp = icmp sgt i32 %add, %y<br>
<br>
into:<br>
<br>
%cmp = icmp sge i32 %x, %y<br>
<br>
as well as:<br>
<br>
%add1 = add nsw i32 %x, 20<br>
%add2 = add nsw i32 %y, 57<br>
%cmp = icmp sge i32 %add1, %add2<br>
<br>
into:<br>
<br>
%add = add nsw i32 %y, 37<br>
%cmp = icmp sle i32 %cmp, %x<br>
<br>
Modified:<br>
llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp<br>
llvm/trunk/test/Transforms/InstCombine/icmp.ll<br>
<br>
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=179316&r1=179315&r2=179316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp?rev=179316&r1=179315&r2=179316&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp (original)<br>
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineCompares.cpp Thu Apr 11 15:05:46 2013<br>
@@ -2487,6 +2487,55 @@ Instruction *InstCombiner::visitICmpInst<br>
return new ICmpInst(Pred, Y, Z);<br>
}<br>
<br>
+ // icmp slt (X + -1), Y -> icmp sle X, Y<br>
+ if (A && NoOp0WrapProblem && Pred == CmpInst::ICMP_SLT &&<br>
+ match(B, m_AllOnes()))<br>
+ return new ICmpInst(CmpInst::ICMP_SLE, A, Op1);<br>
+<br>
+ // icmp sge (X + -1), Y -> icmp sgt X, Y<br>
+ if (A && NoOp0WrapProblem && Pred == CmpInst::ICMP_SGE &&<br>
+ match(B, m_AllOnes()))<br>
+ return new ICmpInst(CmpInst::ICMP_SGT, A, Op1);<br>
+<br>
+ // icmp sle (X + 1), Y -> icmp slt X, Y<br>
+ if (A && NoOp0WrapProblem && Pred == CmpInst::ICMP_SLE &&<br>
+ match(B, m_One()))<br>
+ return new ICmpInst(CmpInst::ICMP_SLT, A, Op1);<br>
+<br>
+ // icmp sgt (X + 1), Y -> icmp sge X, Y<br>
+ if (A && NoOp0WrapProblem && Pred == CmpInst::ICMP_SGT &&<br>
+ match(B, m_One()))<br>
+ return new ICmpInst(CmpInst::ICMP_SGE, A, Op1);<br>
+<br>
+ // if C1 has greater magnitude than C2:<br>
+ // icmp (X + C1), (Y + C2) -> icmp (X + C3), Y<br>
+ // s.t. C3 = C1 - C2<br>
+ //<br>
+ // if C2 has greater magnitude than C1:<br>
+ // icmp (X + C1), (Y + C2) -> icmp X, (Y + C3)<br>
+ // s.t. C3 = C2 - C1<br>
+ if (A && C && NoOp0WrapProblem && NoOp1WrapProblem &&<br>
+ (BO0->hasOneUse() || BO1->hasOneUse()) && !I.isUnsigned())<br>
+ if (ConstantInt *C1 = dyn_cast<ConstantInt>(B))<br>
+ if (ConstantInt *C2 = dyn_cast<ConstantInt>(D)) {<br>
+ const APInt &AP1 = C1->getValue();<br>
+ const APInt &AP2 = C2->getValue();<br>
+ if (AP1.isNegative() == AP2.isNegative()) {<br>
+ APInt AP1Abs = C1->getValue().abs();<br>
+ APInt AP2Abs = C2->getValue().abs();<br>
+ if (AP1Abs.uge(AP2Abs)) {<br>
+ ConstantInt *C3 = Builder->getInt(AP1 - AP2);<br>
+ Value *NewAdd = Builder->CreateNSWAdd(A, C3);<br>
+ return new ICmpInst(Pred, NewAdd, C);<br>
+ } else {<br>
+ ConstantInt *C3 = Builder->getInt(AP2 - AP1);<br>
+ Value *NewAdd = Builder->CreateNSWAdd(C, C3);<br>
+ return new ICmpInst(Pred, A, NewAdd);<br>
+ }<br>
+ }<br>
+ }<br>
+<br>
+<br>
// Analyze the case when either Op0 or Op1 is a sub instruction.<br>
// Op0 = A - B (or A and B are null); Op1 = C - D (or C and D are null).<br>
A = 0; B = 0; C = 0; D = 0;<br>
<br>
Modified: llvm/trunk/test/Transforms/InstCombine/icmp.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp.ll?rev=179316&r1=179315&r2=179316&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/icmp.ll?rev=179316&r1=179315&r2=179316&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/Transforms/InstCombine/icmp.ll (original)<br>
+++ llvm/trunk/test/Transforms/InstCombine/icmp.ll Thu Apr 11 15:05:46 2013<br>
@@ -886,3 +886,55 @@ define i1 @icmp_mul0_ne0(i32 %x) {<br>
%cmp = icmp ne i32 %mul, 0<br>
ret i1 %cmp<br>
}<br>
+<br>
+; CHECK: @icmp_sub1_sge<br>
+; CHECK-NEXT: icmp sgt i32 %x, %y<br>
+define i1 @icmp_sub1_sge(i32 %x, i32 %y) {<br>
+ %sub = add nsw i32 %x, -1<br>
+ %cmp = icmp sge i32 %sub, %y<br>
+ ret i1 %cmp<br>
+}<br>
+<br>
+; CHECK: @icmp_add1_sgt<br>
+; CHECK-NEXT: icmp sge i32 %x, %y<br>
+define i1 @icmp_add1_sgt(i32 %x, i32 %y) {<br>
+ %add = add nsw i32 %x, 1<br>
+ %cmp = icmp sgt i32 %add, %y<br>
+ ret i1 %cmp<br>
+}<br>
+<br>
+; CHECK: @icmp_sub1_slt<br>
+; CHECK-NEXT: icmp sle i32 %x, %y<br>
+define i1 @icmp_sub1_slt(i32 %x, i32 %y) {<br>
+ %sub = add nsw i32 %x, -1<br>
+ %cmp = icmp slt i32 %sub, %y<br>
+ ret i1 %cmp<br>
+}<br>
+<br>
+; CHECK: @icmp_add1_sle<br>
+; CHECK-NEXT: icmp slt i32 %x, %y<br>
+define i1 @icmp_add1_sle(i32 %x, i32 %y) {<br>
+ %add = add nsw i32 %x, 1<br>
+ %cmp = icmp sle i32 %add, %y<br>
+ ret i1 %cmp<br>
+}<br>
+<br>
+; CHECK: @icmp_add20_sge_add57<br>
+; CHECK-NEXT: [[ADD:%[a-z0-9]+]] = add nsw i32 %y, 37<br>
+; CHECK-NEXT: icmp sle i32 [[ADD]], %x<br>
+define i1 @icmp_add20_sge_add57(i32 %x, i32 %y) {<br>
+ %1 = add nsw i32 %x, 20<br>
+ %2 = add nsw i32 %y, 57<br>
+ %cmp = icmp sge i32 %1, %2<br>
+ ret i1 %cmp<br>
+}<br>
+<br>
+; CHECK: @icmp_sub57_sge_sub20<br>
+; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = add nsw i32 %x, -37<br>
+; CHECK-NEXT: icmp sge i32 [[SUB]], %y<br>
+define i1 @icmp_sub57_sge_sub20(i32 %x, i32 %y) {<br>
+ %1 = add nsw i32 %x, -57<br>
+ %2 = add nsw i32 %y, -20<br>
+ %cmp = icmp sge i32 %1, %2<br>
+ ret i1 %cmp<br>
+}<br>
<br>
<br>
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</blockquote></div><br></div>
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