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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link="#0563C1" vlink="#954F72"><div class=WordSection1><p class=MsoNormal><span style='color:#1F497D'>ping<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><div><div style='border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal><b>From:</b> llvm-commits-bounces@cs.uiuc.edu [mailto:llvm-commits-bounces@cs.uiuc.edu] <b>On Behalf Of </b>Gordon Keiser<br><b>Sent:</b> Wednesday, March 27, 2013 8:25 PM<br><b>To:</b> llvm-commits@cs.uiuc.edu<br><b>Subject:</b> [PATCH] Fix encoding of unconditional Thumb2 branch (T4)<o:p></o:p></p></div></div><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Hi,<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>A little while back someone checked in a patch to disassemble this branch correctly, but the TableGen definition was still using incorrect information as if a 20 bit immediate was involved, and the encode function neglected to right shift the immediate first (the output becomes left shifted by #1). The former item was causing the S, J1, and J2 bits of the instruction to be set incorrectly (based on bits 19-17 of the immediate rather than the calculated version from the encode function), and the latter was causing all of the branches to go twice as far as specified. This was verified both by the output from LLVM’s disassembler which is correct in this case, IDA 6.4, and lots of bit checking vs. ARM’s docs.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>The patch also updates test cases, which were listing encoding results which didn’t match what they should have been. <o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>I don’t have commit access yet, so someone who does can feel free to commit if it looks good. <o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Cheers,<o:p></o:p></p><p class=MsoNormal><b><span style='font-size:9.0pt;font-family:"Verdana","sans-serif";color:navy'>Gordon Keiser<br></span></b><span style='font-size:8.0pt;font-family:"Verdana","sans-serif";color:navy'>Software Development Engineer<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:8.0pt;font-family:"Verdana","sans-serif";color:navy'>Arxan Technologies<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:8.0pt;font-family:"Verdana","sans-serif";color:navy'>w:+1.765.889.4756 m:+1.765.237.4833 <o:p></o:p></span></p><p class=MsoNormal><a href="mailto:gkeiser@arxan.com"><span style='font-size:8.0pt;font-family:"Verdana","sans-serif";color:blue'>gkeiser@arxan.com</span></a><span style='font-size:8.0pt;font-family:"Verdana","sans-serif";color:blue'> </span><a href="http://www.arxan.com/"><span style='font-size:8.0pt;font-family:"Verdana","sans-serif";color:#E46C0A'>www.arxan.com</span></a><span style='font-size:8.0pt;font-family:"Verdana","sans-serif";color:#1F497D'> <o:p></o:p></span></p><p class=MsoNormal><span style='font-size:8.0pt;font-family:"Verdana","sans-serif";color:#E46C0A'>Protecting the App Economy™</span><span style='font-size:8.0pt;color:#E46C0A'> </span><span style='color:#1F497D'><o:p></o:p></span></p><p class=MsoNormal><o:p> </o:p></p></div></body></html>