Isn't <span style="font-size:13px;color:rgb(34,34,34);font-family:arial,sans-serif;background-color:rgb(255,255,255)">_xgetbv only supported by MSVC 2010 SP1? Shouldn't this be checking that you're using at least that MSVC version?</span><br>
<br><div class="gmail_quote">On Wed, Apr 3, 2013 at 5:25 AM, Aaron Ballman <span dir="ltr"><<a href="mailto:aaron@aaronballman.com" target="_blank">aaron@aaronballman.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Author: aaronballman<br>
Date: Wed Apr 3 07:25:06 2013<br>
New Revision: 178636<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=178636&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=178636&view=rev</a><br>
Log:<br>
Second pass at addressing PR15351 by explicitly checking for AVX support<br>
when getting the host processor information. It emits a .byte sequence on GNUC compilers to work around lack of xgetbv support with older assemblers, and resolves a comment typo found in the previous patch.<br>
<br>
Modified:<br>
llvm/trunk/lib/Support/Host.cpp<br>
<br>
Modified: llvm/trunk/lib/Support/Host.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=178636&r1=178635&r2=178636&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/Host.cpp?rev=178636&r1=178635&r2=178636&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Support/Host.cpp (original)<br>
+++ llvm/trunk/lib/Support/Host.cpp Wed Apr 3 07:25:06 2013<br>
@@ -112,6 +112,21 @@ static bool GetX86CpuIDAndInfo(unsigned<br>
#endif<br>
}<br>
<br>
+static bool OSHasAVXSupport() {<br>
+#if defined( __GNUC__ )<br>
+ // Check xgetbv; this uses a .byte sequence instead of the instruction<br>
+ // directly because older assemblers do not include support for xgetbv and<br>
+ // there is no easy way to conditionally compile based on the assembler used.<br>
+ int rEAX, rEDX;<br>
+ __asm__ (".byte 0x0f, 0x01, 0xd0" : "=a" (rEAX), "=d" (rEDX) : "c" (0));<br>
+#elif defined(_MSC_VER)<br>
+ unsigned long long rEAX = _xgetbv(_XCR_XFEATURE_ENABLED_MASK);<br>
+#else<br>
+ int rEAX = 0; // Ensures we return false<br>
+#endif<br>
+ return (rEAX & 6) == 6;<br>
+}<br>
+<br>
static void DetectX86FamilyModel(unsigned EAX, unsigned &Family,<br>
unsigned &Model) {<br>
Family = (EAX >> 8) & 0xf; // Bits 8 - 11<br>
@@ -134,6 +149,10 @@ std::string sys::getHostCPUName() {<br>
DetectX86FamilyModel(EAX, Family, Model);<br>
<br>
bool HasSSE3 = (ECX & 0x1);<br>
+ // If CPUID indicates support for XSAVE, XRESTORE and AVX, and XGETBV<br>
+ // indicates that the AVX registers will be saved and restored on context<br>
+ // switch, then we have full AVX support.<br>
+ bool HasAVX = (ECX & ((1 << 28) | (1 << 27))) != 0 && OSHasAVXSupport();<br>
GetX86CpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX);<br>
bool Em64T = (EDX >> 29) & 0x1;<br>
<br>
@@ -243,11 +262,15 @@ std::string sys::getHostCPUName() {<br>
case 42: // Intel Core i7 processor. All processors are manufactured<br>
// using the 32 nm process.<br>
case 45:<br>
- return "corei7-avx";<br>
+ // Not all Sandy Bridge processors support AVX (such as the Pentium<br>
+ // versions instead of the i7 versions).<br>
+ return HasAVX ? "corei7-avx" : "corei7";<br>
<br>
// Ivy Bridge:<br>
case 58:<br>
- return "core-avx-i";<br>
+ // Not all Ivy Bridge processors support AVX (such as the Pentium<br>
+ // versions instead of the i7 versions).<br>
+ return HasAVX ? "core-avx-i" : "corei7";<br>
<br>
case 28: // Most 45 nm Intel Atom processors<br>
case 38: // 45 nm Atom Lincroft<br>
<br>
<br>
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</blockquote></div><br><br clear="all"><div><br></div>-- <br>~Craig