<div dir="ltr">Hi Weiming,<div><br></div><div style>Would be good to also have a test on Mans' original report (without the H construct):</div><div style><br></div><div style>"A common pattern where llvm still fails is code using the abbreviated</div>
<div>syntax for LDRD and friends supported by gas:</div><div><br></div><div>    __asm__ ("ldrd %0, [%1]" : "=r"(a) : "r"(b));</div><div><br></div><div>Here the second destination register is implicitly one higher than the</div>
<div>first.  Because of this, the %H0 construct is never used, so the forced</div><div>even/odd allocation is skipped."</div><div><br></div><div style>cheers,</div><div style>--renato</div><div style><br></div></div>
<div class="gmail_extra"><br><br><div class="gmail_quote">On 26 March 2013 19:03, Weiming Zhao <span dir="ltr"><<a href="mailto:weimingz@codeaurora.org" target="_blank">weimingz@codeaurora.org</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div lang="EN-US" link="blue" vlink="purple"><div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Hi Renato, Kristof,<u></u><u></u></span></p><p class="MsoNormal">
<span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">I added two test cases. One for ldrd, one for strd.<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Please help ot review them. <u></u><u></u></span></p><div class="im"><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Thanks,<u></u><u></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Weiming<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p><div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation</span><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u><u></u></span></p>
</div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p></div><div><div style="border:none;border-top:solid #b5c4df 1.0pt;padding:3.0pt 0in 0in 0in">
<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Kristof Beyls [mailto:<a href="mailto:kristof.beyls@arm.com" target="_blank">kristof.beyls@arm.com</a>] <br>
<b>Sent:</b> Tuesday, March 26, 2013 1:28 AM<br><b>To:</b> 'Renato Golin'; Zhao</span></p><div class="im"><br><b>Cc:</b> Eric Christopher; Måns Rullgård; Jim Grosbach; Jakob Stoklund Olesen; LLVM Commits<br></div>
<b>Subject:</b> RE: [LLVMdev] Problems with 64-bit register operands of inline asm on ARM<u></u><u></u><p></p></div></div><div class="im"><p class="MsoNormal"><u></u> <u></u></p><p class="MsoNormal"><span lang="EN-GB" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Hi Renato, Weiming,<u></u><u></u></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p><p class="MsoNormal"><span lang="EN-GB" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">I’m afraid I don’t know too much about inline assembly details, so can’t really do a good code review.<u></u><u></u></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">That being said, I agree with Renato that there should be regression tests added that test the changed functionality.<u></u><u></u></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Apart from ensuring the functionality doesn’t get broken by accident in the future, I find it also helps reviewers in<br>
understanding the exact behavioural changes that are intended.<u></u><u></u></span></p><p class="MsoNormal"><span lang="EN-GB" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Thanks,<u></u><u></u></span></p><p class="MsoNormal"><span lang="EN-GB" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><span lang="EN-GB" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Kristof<u></u><u></u></span></p><p class="MsoNormal"><span lang="EN-GB" style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p>
</div><div style="border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt"><div><div style="border:none;border-top:solid #b5c4df 1.0pt;padding:3.0pt 0in 0in 0in"><p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Renato Golin [<a href="mailto:renato.golin@linaro.org" target="_blank">mailto:renato.golin@linaro.org</a>] <br>
</span></p><div class="im"><b>Sent:</b> 25 March 2013 11:17<br><b>To:</b> Zhao<br><b>Cc:</b> Eric Christopher; Måns Rullgård; Jim Grosbach; Jakob Stoklund Olesen; LLVM Commits; Kristof Beyls<br></div><div class="im"><b>Subject:</b> Re: [LLVMdev] Problems with 64-bit register operands of inline asm on ARM<u></u><u></u></div>
<p></p></div></div><p class="MsoNormal"><span lang="EN-GB"><u></u> <u></u></span></p><div><p class="MsoNormal"><span lang="EN-GB">On 14 March 2013 23:15, Weiming Zhao <<a href="mailto:weimingz@codeaurora.org" target="_blank">weimingz@codeaurora.org</a>> wrote:<u></u><u></u></span></p>
<div><div class="h5"><div><div><blockquote style="border:none;border-left:solid #cccccc 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-top:5.0pt;margin-right:0in;margin-bottom:5.0pt"><div><div><p class="MsoNormal">
<span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Hi,</span><u></u><u></u></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"> </span><u></u><u></u></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Attached is the patch to enable GPRPair for all i64 operands for ARM mode.</span><u></u><u></u></p><p class="MsoNormal">
<span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">I let ASMPrinter to print subregs for ldm/stm and support ‘Q’ modifier.</span><u></u><u></u></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">I also extend SelectInlineAsm to support tied-def-use regs.</span><u></u><u></u></p>
</div></div></blockquote><div><p class="MsoNormal"><span lang="EN-GB"><u></u> <u></u></span></p></div><div><p class="MsoNormal"><span lang="EN-GB">Hi Weiming,<u></u><u></u></span></p></div><div><p class="MsoNormal"><span lang="EN-GB"><u></u> <u></u></span></p>
</div><div><p class="MsoNormal"><span lang="EN-GB">It looks reasonable to me, have you ran the test-suite with it? Would also be good to add some extra check-all tests, if possible.<u></u><u></u></span></p></div><div><p class="MsoNormal">
<span lang="EN-GB"><u></u> <u></u></span></p></div><div><p class="MsoNormal"><span lang="EN-GB">Kristof,<u></u><u></u></span></p></div><div><p class="MsoNormal"><span lang="EN-GB"><u></u> <u></u></span></p></div><div><p class="MsoNormal">
<span lang="EN-GB">Any issues on your side?<u></u><u></u></span></p></div><div><p class="MsoNormal"><span lang="EN-GB"><u></u> <u></u></span></p></div><div><p class="MsoNormal"><span lang="EN-GB">cheers,<u></u><u></u></span></p>
</div><div><p class="MsoNormal"><span lang="EN-GB">--renato<u></u><u></u></span></p></div></div></div></div></div></div></div></div></div></blockquote></div><br></div>