<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;">Hi Arnold,<div><br></div><div>Do you know why the target independent logic does not catch these cases ? Is 'select' lowered using custom code in the ARM backend ?</div><div><br></div><div>Thanks,</div><div>Nadav'<br><div><br></div><div><br><div><div>On Mar 14, 2013, at 12:17 PM, Arnold Schwaighofer <<a href="mailto:aschwaighofer@apple.com">aschwaighofer@apple.com</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div style="letter-spacing: normal; orphans: auto; text-align: start; text-indent: 0px; text-transform: none; white-space: normal; widows: auto; word-spacing: 0px; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px;">Author: arnolds<br>Date: Thu Mar 14 14:17:02 2013<br>New Revision: 177105<br><br>URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project?rev=177105&view=rev">http://llvm.org/viewvc/llvm-project?rev=177105&view=rev</a><br>Log:<br>ARM cost model: Increase cost of some vector selects we do terrible on<br><br>By terrible I mean we store/load from the stack.<br><br>This matters on PAQp8 in _Z5trainPsS_ii (which is inlined into Mixer::update)<br>where we decide to vectorize a loop with a VF of 8 resulting in a 25%<br>degradation on a cortex-a8.<br><br>LV: Found an estimated cost of 2 for VF 8 For instruction: icmp slt i32<br>LV: Found an estimated cost of 2 for VF 8 For instruction: select i1, i32, i32<br><br>The bug that tracks the CodeGen part is PR14868.<br><br><a href="radar://13403975">radar://13403975</a><br><br>Modified:<br> llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.cpp<br> llvm/trunk/test/Analysis/CostModel/ARM/select.ll<br> llvm/trunk/test/CodeGen/ARM/vselect_imax.ll<br><br>Modified: llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.cpp<br>URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.cpp?rev=177105&r1=177104&r2=177105&view=diff">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.cpp?rev=177105&r1=177104&r2=177105&view=diff</a><br>==============================================================================<br>--- llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.cpp (original)<br>+++ llvm/trunk/lib/Target/ARM/ARMTargetTransformInfo.cpp Thu Mar 14 14:17:02 2013<br>@@ -334,6 +334,30 @@ unsigned ARMTTI::getCmpSelInstrCost(unsi<br> int ISD = TLI->InstructionOpcodeToISD(Opcode);<br> // On NEON a a vector select gets lowered to vbsl.<br> if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT) {<br>+ // Lowering of some vector selects is currently far from perfect.<br>+ static const TypeConversionCostTblEntry<MVT> NEONVectorSelectTbl[] = {<br>+ { ISD::SELECT, MVT::v4i1, MVT::v4i8, 2*4 + 2*1 },<br>+ { ISD::SELECT, MVT::v8i1, MVT::v8i8, 2*8 + 1 },<br>+ { ISD::SELECT, MVT::v16i1, MVT::v16i8, 2*16 + 1 },<br>+ { ISD::SELECT, MVT::v4i1, MVT::v4i16, 2*4 + 1 },<br>+ { ISD::SELECT, MVT::v8i1, MVT::v8i16, 2*8 + 1 },<br>+ { ISD::SELECT, MVT::v16i1, MVT::v16i16, 2*16 + 1 + 3*1 + 4*1 },<br>+ { ISD::SELECT, MVT::v8i1, MVT::v8i32, 4*8 + 1*3 + 1*4 + 1*2 },<br>+ { ISD::SELECT, MVT::v16i1, MVT::v16i32, 4*16 + 1*6 + 1*8 + 1*4 },<br>+ { ISD::SELECT, MVT::v4i1, MVT::v4i64, 4*4 + 1*2 + 1 },<br>+ { ISD::SELECT, MVT::v8i1, MVT::v8i64, 50 },<br>+ { ISD::SELECT, MVT::v16i1, MVT::v16i64, 100 }<br>+ };<br>+<br>+ EVT SelCondTy = TLI->getValueType(CondTy);<br>+ EVT SelValTy = TLI->getValueType(ValTy);<br>+ int Idx = ConvertCostTableLookup<MVT>(NEONVectorSelectTbl,<br>+ array_lengthof(NEONVectorSelectTbl),<br>+ ISD, SelCondTy.getSimpleVT(),<br>+ SelValTy.getSimpleVT());<br>+ if (Idx != -1)<br>+ return NEONVectorSelectTbl[Idx].Cost;<br>+<br> std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(ValTy);<br> return LT.first;<br> }<br><br>Modified: llvm/trunk/test/Analysis/CostModel/ARM/select.ll<br>URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/CostModel/ARM/select.ll?rev=177105&r1=177104&r2=177105&view=diff">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/CostModel/ARM/select.ll?rev=177105&r1=177104&r2=177105&view=diff</a><br>==============================================================================<br>--- llvm/trunk/test/Analysis/CostModel/ARM/select.ll (original)<br>+++ llvm/trunk/test/Analysis/CostModel/ARM/select.ll Thu Mar 14 14:17:02 2013<br>@@ -21,26 +21,39 @@ define void @casts() {<br> ; Vector values<br> ; CHECK: cost of 1 {{.*}} select<br> %v7 = select <2 x i1> undef, <2 x i8> undef, <2 x i8> undef<br>- ; CHECK: cost of 1 {{.*}} select<br>+ ; CHECK: cost of 10 {{.*}} select<br> %v8 = select <4 x i1> undef, <4 x i8> undef, <4 x i8> undef<br>- ; CHECK: cost of 1 {{.*}} select<br>+ ; CHECK: cost of 17 {{.*}} select<br> %v9 = select <8 x i1> undef, <8 x i8> undef, <8 x i8> undef<br>- ; CHECK: cost of 1 {{.*}} select<br>+ ; CHECK: cost of 33 {{.*}} select<br> %v10 = select <16 x i1> undef, <16 x i8> undef, <16 x i8> undef<br><br> ; CHECK: cost of 1 {{.*}} select<br> %v11 = select <2 x i1> undef, <2 x i16> undef, <2 x i16> undef<br>- ; CHECK: cost of 1 {{.*}} select<br>+ ; CHECK: cost of 9 {{.*}} select<br> %v12 = select <4 x i1> undef, <4 x i16> undef, <4 x i16> undef<br>- ; CHECK: cost of 1 {{.*}} select<br>+ ; CHECK: cost of 17 {{.*}} select<br> %v13 = select <8 x i1> undef, <8 x i16> undef, <8 x i16> undef<br>+ ; CHECK: cost of 40 {{.*}} select<br>+ %v13b = select <16 x i1> undef, <16 x i16> undef, <16 x i16> undef<br><br> ; CHECK: cost of 1 {{.*}} select<br> %v14 = select <2 x i1> undef, <2 x i32> undef, <2 x i32> undef<br> ; CHECK: cost of 1 {{.*}} select<br> %v15 = select <4 x i1> undef, <4 x i32> undef, <4 x i32> undef<br>+ ; CHECK: cost of 41 {{.*}} select<br>+ %v15b = select <8 x i1> undef, <8 x i32> undef, <8 x i32> undef<br>+ ; CHECK: cost of 82 {{.*}} select<br>+ %v15c = select <16 x i1> undef, <16 x i32> undef, <16 x i32> undef<br>+<br> ; CHECK: cost of 1 {{.*}} select<br> %v16 = select <2 x i1> undef, <2 x i64> undef, <2 x i64> undef<br>+ ; CHECK: cost of 19 {{.*}} select<br>+ %v16a = select <4 x i1> undef, <4 x i64> undef, <4 x i64> undef<br>+ ; CHECK: cost of 50 {{.*}} select<br>+ %v16b = select <8 x i1> undef, <8 x i64> undef, <8 x i64> undef<br>+ ; CHECK: cost of 100 {{.*}} select<br>+ %v16c = select <16 x i1> undef, <16 x i64> undef, <16 x i64> undef<br><br> ; CHECK: cost of 1 {{.*}} select<br> %v17 = select <2 x i1> undef, <2 x float> undef, <2 x float> undef<br><br>Modified: llvm/trunk/test/CodeGen/ARM/vselect_imax.ll<br>URL:<span class="Apple-converted-space"> </span><a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vselect_imax.ll?rev=177105&r1=177104&r2=177105&view=diff">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vselect_imax.ll?rev=177105&r1=177104&r2=177105&view=diff</a><br>==============================================================================<br>--- llvm/trunk/test/CodeGen/ARM/vselect_imax.ll (original)<br>+++ llvm/trunk/test/CodeGen/ARM/vselect_imax.ll Thu Mar 14 14:17:02 2013<br>@@ -10,3 +10,210 @@ define void @vmax_v4i32(<4 x i32>* %m, <<br> ret void<br>}<br><br>+; We adjusted the cost model of the following selects. When we improve code<br>+; lowering we also need to adjust the cost.<br>+; RUN: opt < %s -cost-model -analyze -mtriple=thumbv7-apple-ios6.0.0 -march=arm -mcpu=cortex-a8 | FileCheck %s --check-prefix=COST<br>+%T0_3 = type <4 x i8><br>+%T1_3 = type <4 x i1><br>+; CHECK: func_blend3:<br>+define void @func_blend3(%T0_3* %loadaddr, %T0_3* %loadaddr2,<br>+ %T1_3* %blend, %T0_3* %storeaddr) {<br>+; CHECK: strh<br>+; CHECK: strh<br>+; CHECK: strh<br>+; CHECK: strh<br>+; CHECK: vldr<br>+ %v0 = load %T0_3* %loadaddr<br>+ %v1 = load %T0_3* %loadaddr2<br>+ %c = load %T1_3* %blend<br>+; COST: func_blend3<br>+; COST: cost of 10 {{.*}} select<br>+ %r = select %T1_3 %c, %T0_3 %v0, %T0_3 %v1<br>+ store %T0_3 %r, %T0_3* %storeaddr<br>+ ret void<br>+}<br>+%T0_4 = type <8 x i8><br>+%T1_4 = type <8 x i1><br>+; CHECK: func_blend4:<br>+define void @func_blend4(%T0_4* %loadaddr, %T0_4* %loadaddr2,<br>+ %T1_4* %blend, %T0_4* %storeaddr) {<br>+ %v0 = load %T0_4* %loadaddr<br>+ %v1 = load %T0_4* %loadaddr2<br>+ %c = load %T1_4* %blend<br>+; check: strb<br>+; check: strb<br>+; check: strb<br>+; check: strb<br>+; check: vldr<br>+; COST: func_blend4<br>+; COST: cost of 17 {{.*}} select<br>+ %r = select %T1_4 %c, %T0_4 %v0, %T0_4 %v1<br>+ store %T0_4 %r, %T0_4* %storeaddr<br>+ ret void<br>+}<br>+%T0_5 = type <16 x i8><br>+%T1_5 = type <16 x i1><br>+; CHECK: func_blend5:<br>+define void @func_blend5(%T0_5* %loadaddr, %T0_5* %loadaddr2,<br>+ %T1_5* %blend, %T0_5* %storeaddr) {<br>+ %v0 = load %T0_5* %loadaddr<br>+ %v1 = load %T0_5* %loadaddr2<br>+ %c = load %T1_5* %blend<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: vld<br>+; COST: func_blend5<br>+; COST: cost of 33 {{.*}} select<br>+ %r = select %T1_5 %c, %T0_5 %v0, %T0_5 %v1<br>+ store %T0_5 %r, %T0_5* %storeaddr<br>+ ret void<br>+}<br>+%T0_8 = type <4 x i16><br>+%T1_8 = type <4 x i1><br>+; CHECK: func_blend8:<br>+define void @func_blend8(%T0_8* %loadaddr, %T0_8* %loadaddr2,<br>+ %T1_8* %blend, %T0_8* %storeaddr) {<br>+ %v0 = load %T0_8* %loadaddr<br>+ %v1 = load %T0_8* %loadaddr2<br>+ %c = load %T1_8* %blend<br>+; CHECK: strh<br>+; CHECK: strh<br>+; CHECK: strh<br>+; CHECK: strh<br>+; CHECK: vld<br>+; COST: func_blend8<br>+; COST: cost of 9 {{.*}} select<br>+ %r = select %T1_8 %c, %T0_8 %v0, %T0_8 %v1<br>+ store %T0_8 %r, %T0_8* %storeaddr<br>+ ret void<br>+}<br>+%T0_9 = type <8 x i16><br>+%T1_9 = type <8 x i1><br>+; CHECK: func_blend9:<br>+define void @func_blend9(%T0_9* %loadaddr, %T0_9* %loadaddr2,<br>+ %T1_9* %blend, %T0_9* %storeaddr) {<br>+ %v0 = load %T0_9* %loadaddr<br>+ %v1 = load %T0_9* %loadaddr2<br>+ %c = load %T1_9* %blend<br>+; CHECK: strh<br>+; CHECK: strh<br>+; CHECK: strh<br>+; CHECK: strh<br>+; CHECK: vld<br>+; COST: func_blend9<br>+; COST: cost of 17 {{.*}} select<br>+ %r = select %T1_9 %c, %T0_9 %v0, %T0_9 %v1<br>+ store %T0_9 %r, %T0_9* %storeaddr<br>+ ret void<br>+}<br>+%T0_10 = type <16 x i16><br>+%T1_10 = type <16 x i1><br>+; CHECK: func_blend10:<br>+define void @func_blend10(%T0_10* %loadaddr, %T0_10* %loadaddr2,<br>+ %T1_10* %blend, %T0_10* %storeaddr) {<br>+ %v0 = load %T0_10* %loadaddr<br>+ %v1 = load %T0_10* %loadaddr2<br>+ %c = load %T1_10* %blend<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: vld<br>+; COST: func_blend10<br>+; COST: cost of 40 {{.*}} select<br>+ %r = select %T1_10 %c, %T0_10 %v0, %T0_10 %v1<br>+ store %T0_10 %r, %T0_10* %storeaddr<br>+ ret void<br>+}<br>+%T0_14 = type <8 x i32><br>+%T1_14 = type <8 x i1><br>+; CHECK: func_blend14:<br>+define void @func_blend14(%T0_14* %loadaddr, %T0_14* %loadaddr2,<br>+ %T1_14* %blend, %T0_14* %storeaddr) {<br>+ %v0 = load %T0_14* %loadaddr<br>+ %v1 = load %T0_14* %loadaddr2<br>+ %c = load %T1_14* %blend<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: strb<br>+; COST: func_blend14<br>+; COST: cost of 41 {{.*}} select<br>+ %r = select %T1_14 %c, %T0_14 %v0, %T0_14 %v1<br>+ store %T0_14 %r, %T0_14* %storeaddr<br>+ ret void<br>+}<br>+%T0_15 = type <16 x i32><br>+%T1_15 = type <16 x i1><br>+; CHECK: func_blend15:<br>+define void @func_blend15(%T0_15* %loadaddr, %T0_15* %loadaddr2,<br>+ %T1_15* %blend, %T0_15* %storeaddr) {<br>+ %v0 = load %T0_15* %loadaddr<br>+ %v1 = load %T0_15* %loadaddr2<br>+ %c = load %T1_15* %blend<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: strb<br>+; COST: func_blend15<br>+; COST: cost of 82 {{.*}} select<br>+ %r = select %T1_15 %c, %T0_15 %v0, %T0_15 %v1<br>+ store %T0_15 %r, %T0_15* %storeaddr<br>+ ret void<br>+}<br>+%T0_18 = type <4 x i64><br>+%T1_18 = type <4 x i1><br>+; CHECK: func_blend18:<br>+define void @func_blend18(%T0_18* %loadaddr, %T0_18* %loadaddr2,<br>+ %T1_18* %blend, %T0_18* %storeaddr) {<br>+ %v0 = load %T0_18* %loadaddr<br>+ %v1 = load %T0_18* %loadaddr2<br>+ %c = load %T1_18* %blend<br>+; CHECK: strh<br>+; CHECK: strh<br>+; CHECK: strh<br>+; CHECK: strh<br>+; COST: func_blend18<br>+; COST: cost of 19 {{.*}} select<br>+ %r = select %T1_18 %c, %T0_18 %v0, %T0_18 %v1<br>+ store %T0_18 %r, %T0_18* %storeaddr<br>+ ret void<br>+}<br>+%T0_19 = type <8 x i64><br>+%T1_19 = type <8 x i1><br>+; CHECK: func_blend19:<br>+define void @func_blend19(%T0_19* %loadaddr, %T0_19* %loadaddr2,<br>+ %T1_19* %blend, %T0_19* %storeaddr) {<br>+ %v0 = load %T0_19* %loadaddr<br>+ %v1 = load %T0_19* %loadaddr2<br>+ %c = load %T1_19* %blend<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: strb<br>+; COST: func_blend19<br>+; COST: cost of 50 {{.*}} select<br>+ %r = select %T1_19 %c, %T0_19 %v0, %T0_19 %v1<br>+ store %T0_19 %r, %T0_19* %storeaddr<br>+ ret void<br>+}<br>+%T0_20 = type <16 x i64><br>+%T1_20 = type <16 x i1><br>+; CHECK: func_blend20:<br>+define void @func_blend20(%T0_20* %loadaddr, %T0_20* %loadaddr2,<br>+ %T1_20* %blend, %T0_20* %storeaddr) {<br>+ %v0 = load %T0_20* %loadaddr<br>+ %v1 = load %T0_20* %loadaddr2<br>+ %c = load %T1_20* %blend<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: strb<br>+; CHECK: strb<br>+; COST: func_blend20<br>+; COST: cost of 100 {{.*}} select<br>+ %r = select %T1_20 %c, %T0_20 %v0, %T0_20 %v1<br>+ store %T0_20 %r, %T0_20* %storeaddr<br>+ ret void<br>+}<br><br><br>_______________________________________________<br>llvm-commits mailing list<br><a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a></div></blockquote></div><br></div></div></body></html>