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<br><div><div>On Dec 17, 2012, at 10:26 AM, Quentin Colombet <<a href="mailto:quentin.colombet@gmail.com">quentin.colombet@gmail.com</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite">Hi,<br><br>To not over constrain the scheduler for ARM in thumb mode, some optimizations for code size reduction, specific to ARM thumb, are blocked when they add a dependency (like write after read dependency).<br><br>This patch disables this check when code size is the priority, i.e., code is compiled with -Oz.<br><br>The patch also contains a test case.<br><br><a href="http://llvm-reviews.chandlerc.com/D219">http://llvm-reviews.chandlerc.com/D219</a><br><br>Files:<br> test/CodeGen/ARM/avoid-cpsr-rmw.ll<br> lib/Target/ARM/Thumb2SizeReduction.cpp<br><br>Index: test/CodeGen/ARM/avoid-cpsr-rmw.ll<br>===================================================================<br>--- test/CodeGen/ARM/avoid-cpsr-rmw.ll<br>+++ test/CodeGen/ARM/avoid-cpsr-rmw.ll<br>@@ -49,3 +49,37 @@<br> while.end:<br> ret void<br> }<br>+<br>+; Allow partial CPSR dependency when code size is the priority.<br>+; rdar://12878928<br>+define void @t3(i32* nocapture %ptr1, i32* %ptr2, i32 %c) nounwind minsize {<br>+entry:<br>+; CHECK: t3:<br>+ %tobool7 = icmp eq i32* %ptr2, null<br>+ br i1 %tobool7, label %while.end, label %while.body<br>+<br>+while.body:<br>+; CHECK: while.body<br>+; CHECK: mul r{{[0-9]+}}<br>+; CHECK: muls<br>+ %ptr1.addr.09 = phi i32* [ %add.ptr, %while.body ], [ %ptr1, %entry ]<br>+ %ptr2.addr.08 = phi i32* [ %incdec.ptr, %while.body ], [ %ptr2, %entry ]<br>+ %0 = load i32* %ptr1.addr.09, align 4<br>+ %arrayidx1 = getelementptr inbounds i32* %ptr1.addr.09, i32 1<br>+ %1 = load i32* %arrayidx1, align 4<br>+ %arrayidx3 = getelementptr inbounds i32* %ptr1.addr.09, i32 2<br>+ %2 = load i32* %arrayidx3, align 4<br>+ %arrayidx4 = getelementptr inbounds i32* %ptr1.addr.09, i32 3<br>+ %3 = load i32* %arrayidx4, align 4<br>+ %add.ptr = getelementptr inbounds i32* %ptr1.addr.09, i32 4<br>+ %mul = mul i32 %1, %0<br>+ %mul5 = mul i32 %mul, %2<br>+ %mul6 = mul i32 %mul5, %3<br>+ store i32 %mul6, i32* %ptr2.addr.08, align 4<br>+ %incdec.ptr = getelementptr inbounds i32* %ptr2.addr.08, i32 -1<br>+ %tobool = icmp eq i32* %incdec.ptr, null<br>+ br i1 %tobool, label %while.end, label %while.body<br>+<br>+while.end:<br>+ ret void<br>+}<br>Index: lib/Target/ARM/Thumb2SizeReduction.cpp<br>===================================================================<br>--- lib/Target/ARM/Thumb2SizeReduction.cpp<br>+++ lib/Target/ARM/Thumb2SizeReduction.cpp<br>@@ -22,6 +22,7 @@<br> #include "llvm/Support/CommandLine.h"<br> #include "llvm/Support/Debug.h"<br> #include "llvm/Support/raw_ostream.h"<br>+#include "llvm/Function.h" // To access Function attributes<br> using namespace llvm;<br><br> STATISTIC(NumNarrows, "Number of 32-bit instrs reduced to 16-bit ones");<br>@@ -216,8 +217,24 @@<br> bool<br> Thumb2SizeReduce::canAddPseudoFlagDep(MachineInstr *Def, MachineInstr *Use,<br> bool FirstInSelfLoop) {<br>- // FIXME: Disable check for -Oz (aka OptimizeForSizeHarder).<br>- if (!STI->avoidCPSRPartialUpdate())<br>+ // When -Oz is set, the function carries MinSize attribute.<br>+ bool MinimizeSize = false;<br>+<br>+ // Grab the function.<br>+ MachineInstr *LinkToFunction = Def;<br>+ if (!LinkToFunction)<br>+ LinkToFunction = Use;<br>+ <br>+ if (LinkToFunction) {<br>+ const MachineBasicBlock *MBB = LinkToFunction->getParent();<br>+ assert(MBB && "Optimizing an instruction that does not belong to anything?!");<br>+ const Function *Fn = MBB->getParent()->getFunction();<br>+ // Grab the attribute<br>+ MinimizeSize = Fn->getFnAttributes().hasAttribute(Attributes::MinSize);<br>+ }<br>+<br>+ // Disable the check for -Oz (aka OptimizeForSizeHarder).<br>+ if (!STI->avoidCPSRPartialUpdate() || MinimizeSize)<br> return false;<br><br> if (!Def)<br><span><D219.1.patch></span>_______________________________________________<br>llvm-commits mailing list<br>llvm-commits@cs.uiuc.edu<br>http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits<br></blockquote></div><br></div></body></html>