Thanks, Eli!<div><br></div><div>Could you or someone else commit it, since I have no commit access?</div><div class="gmail_extra"><br><br><div class="gmail_quote">On 6 December 2012 20:59, Eli Bendersky <span dir="ltr"><<a href="mailto:eliben@google.com" target="_blank">eliben@google.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">lgtm<br>
<div><div class="h5"><br>
On Thu, Dec 6, 2012 at 10:50 AM, Alexander Zinenko <<a href="mailto:ftynse@gmail.com">ftynse@gmail.com</a>> wrote:<br>
> Hello!<br>
><br>
> I caught a typo with misspelled CHECK: comment in a recent clang commit.<br>
> Having scanned LLVM repository I found out another couple of such typos.<br>
><br>
> Some of them looked intentional, so I fixed only those looking really like<br>
> typos: letters in different order and wrong last symbol.<br>
><br>
> Please, review this patch.<br>
><br>
> --<br>
> Alexander Zinenko<br>
><br>
> Index: test/Transforms/SROA/vector-promotion.ll<br>
> ===================================================================<br>
> --- test/Transforms/SROA/vector-promotion.ll (revision 169521)<br>
> +++ test/Transforms/SROA/vector-promotion.ll (working copy)<br>
> @@ -295,7 +295,7 @@<br>
> }<br>
><br>
> define <2 x i8> @PR14349.1(i32 %x) {<br>
> -; CEHCK: @PR14349.1<br>
> +; CHECK: @PR14349.1<br>
> ; The first testcase for broken SROA rewriting of split integer loads and<br>
> ; stores due to smaller vector loads and stores. This particular test<br>
> ensures<br>
> ; that we can rewrite a split store of an integer to a store of a vector.<br>
> @@ -317,7 +317,7 @@<br>
> }<br>
><br>
> define i32 @PR14349.2(<2 x i8> %x) {<br>
> -; CEHCK: @PR14349.2<br>
> +; CHECK: @PR14349.2<br>
> ; The first testcase for broken SROA rewriting of split integer loads and<br>
> ; stores due to smaller vector loads and stores. This particular test<br>
> ensures<br>
> ; that we can rewrite a split load of an integer to a load of a vector.<br>
> Index: test/Transforms/InstCombine/mul.ll<br>
> ===================================================================<br>
> --- test/Transforms/InstCombine/mul.ll (revision 169521)<br>
> +++ test/Transforms/InstCombine/mul.ll (working copy)<br>
> @@ -65,7 +65,7 @@<br>
> ; CHECK: @test9<br>
> %j = mul i32 %i, -1 ; <i32> [#uses=1]<br>
> ret i32 %j<br>
> -; CHECJ: sub i32 0, %i<br>
> +; CHECK: sub i32 0, %i<br>
> }<br>
><br>
> define i32 @test10(i32 %a, i32 %b) {<br>
> Index: test/CodeGen/X86/atom-bypass-slow-division.ll<br>
> ===================================================================<br>
> --- test/CodeGen/X86/atom-bypass-slow-division.ll (revision 169521)<br>
> +++ test/CodeGen/X86/atom-bypass-slow-division.ll (working copy)<br>
> @@ -35,7 +35,7 @@<br>
> ; CHECK: divb<br>
> ; CHECK: addl<br>
> ; CHECK: ret<br>
> -; CEECK-NOT: idivl<br>
> +; CHECK-NOT: idivl<br>
> ; CHECK-NOT: divb<br>
> %resultdiv = sdiv i32 %a, %b<br>
> %resultrem = srem i32 %a, %b<br>
> @@ -66,7 +66,7 @@<br>
><br>
> define i32 @test_use_div_reg_imm(i32 %a) nounwind {<br>
> ; CHECK: test_use_div_reg_imm<br>
> -; CEHCK-NOT: test<br>
> +; CHECK-NOT: test<br>
> ; CHECK-NOT: idiv<br>
> ; CHECK-NOT: divb<br>
> %resultdiv = sdiv i32 %a, 33<br>
> @@ -75,7 +75,7 @@<br>
><br>
> define i32 @test_use_rem_reg_imm(i32 %a) nounwind {<br>
> ; CHECK: test_use_rem_reg_imm<br>
> -; CEHCK-NOT: test<br>
> +; CHECK-NOT: test<br>
> ; CHECK-NOT: idiv<br>
> ; CHECK-NOT: divb<br>
> %resultrem = srem i32 %a, 33<br>
> @@ -84,7 +84,7 @@<br>
><br>
> define i32 @test_use_divrem_reg_imm(i32 %a) nounwind {<br>
> ; CHECK: test_use_divrem_reg_imm<br>
> -; CEHCK-NOT: test<br>
> +; CHECK-NOT: test<br>
> ; CHECK-NOT: idiv<br>
> ; CHECK-NOT: divb<br>
> %resultdiv = sdiv i32 %a, 33<br>
> Index: test/CodeGen/Thumb2/thumb2-mul.ll<br>
> ===================================================================<br>
> --- test/CodeGen/Thumb2/thumb2-mul.ll (revision 169521)<br>
> +++ test/CodeGen/Thumb2/thumb2-mul.ll (working copy)<br>
> @@ -15,7 +15,7 @@<br>
> ; CHECK: t1:<br>
> ; CHECK: mla r0, r2, r0, r1<br>
> ; CHECK: add.w r0, r0, r0, lsl #3<br>
> -; CHECL: add.w r0, r3, r0, lsl #2<br>
> +; CHECK: add.w r0, r3, r0, lsl #2<br>
> %mul = mul i32 %n, %i<br>
> %add = add i32 %mul, %j<br>
> %0 = ptrtoint %struct.CMPoint* %thePoints to i32<br>
> Index: test/CodeGen/ARM/domain-conv-vmovs.ll<br>
> ===================================================================<br>
> --- test/CodeGen/ARM/domain-conv-vmovs.ll (revision 169521)<br>
> +++ test/CodeGen/ARM/domain-conv-vmovs.ll (working copy)<br>
> @@ -78,7 +78,7 @@<br>
> ; use-def chains would be messed up. Primarily a compile-test (we used to<br>
> ; internal fault).<br>
> call void @bar()<br>
> -; CHECL: bl bar<br>
> +; CHECK: bl bar<br>
> ; CHECK: vext.32<br>
> ; CHECK: vext.32<br>
> ret float %val<br>
><br>
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><br>
</blockquote></div><br></div>