<div>Let me try a CMake build.</div><div>Maybe something like this patch would fix it?</div><div><br></div><div><br></div><div>diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt</div><div>index bc226ca..93101c0 100644</div>
<div>--- a/test/CMakeLists.txt</div><div>+++ b/test/CMakeLists.txt</div><div>@@ -18,7 +18,7 @@ add_lit_testsuite(check-llvm "Running the LLVM regression tests"</div><div> llvm_unit_site_config=${CMAKE_CURRENT_BINARY_DIR}/Unit/lit.site.cfg</div>
<div> DEPENDS UnitTests</div><div> BugpointPasses LLVMHello</div><div>- llc lli llvm-ar llvm-as</div><div>+ llc lli llvm-ar llvm-as llvm-bcanalyzer</div><div> llvm-diff</div><div> llvm-dis llvm-extract llvm-dwarfdump</div>
<div> llvm-link llvm-mc llvm-nm llvm-objdump llvm-readobj</div><div><br></div><div class="gmail_extra"><br><br><div class="gmail_quote">On Mon, Oct 15, 2012 at 1:14 PM, David Blaikie <span dir="ltr"><<a href="mailto:dblaikie@gmail.com" target="_blank">dblaikie@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="HOEnZb"><div class="h5">On Thu, Oct 11, 2012 at 1:20 PM, Jan Wen Voung <<a href="mailto:jvoung@google.com">jvoung@google.com</a>> wrote:<br>
> Author: jvoung<br>
> Date: Thu Oct 11 15:20:40 2012<br>
> New Revision: 165739<br>
><br>
> URL: <a href="http://llvm.org/viewvc/llvm-project?rev=165739&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=165739&view=rev</a><br>
> Log:<br>
> Change encoding of instruction operands in bitcode binaries to be relative<br>
> to the instruction position. The old encoding would give an absolute<br>
> ID which counts up within a function, and only resets at the next function.<br>
><br>
> I.e., Instead of having:<br>
><br>
> ... = icmp eq i32 n-1, n-2<br>
> br i1 ..., label %bb1, label %bb2<br>
><br>
> it will now be roughly:<br>
><br>
> ... = icmp eq i32 1, 2<br>
> br i1 1, label %bb1, label %bb2<br>
><br>
> This makes it so that ids remain relatively small and can be encoded<br>
> in fewer bits.<br>
><br>
> With this encoding, forward reference operands will be given<br>
> negative-valued IDs. Use signed VBRs for the most common case<br>
> of forward references, which is phi instructions.<br>
><br>
> To retain backward compatibility we bump the bitcode version<br>
> from 0 to 1 to distinguish between the different encodings.<br>
><br>
> Added:<br>
> llvm/trunk/test/Bitcode/function-encoding-rel-operands.ll<br>
> Modified:<br>
> llvm/trunk/include/llvm/Bitcode/BitstreamReader.h<br>
> llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp<br>
> llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h<br>
> llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp<br>
><br>
> Modified: llvm/trunk/include/llvm/Bitcode/BitstreamReader.h<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Bitcode/BitstreamReader.h?rev=165739&r1=165738&r2=165739&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Bitcode/BitstreamReader.h?rev=165739&r1=165738&r2=165739&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/include/llvm/Bitcode/BitstreamReader.h (original)<br>
> +++ llvm/trunk/include/llvm/Bitcode/BitstreamReader.h Thu Oct 11 15:20:40 2012<br>
> @@ -409,7 +409,7 @@<br>
> }<br>
><br>
> /// EnterSubBlock - Having read the ENTER_SUBBLOCK abbrevid, enter<br>
> - /// the block, and return true if the block is valid.<br>
> + /// the block, and return true if the block has an error.<br>
> bool EnterSubBlock(unsigned BlockID, unsigned *NumWordsP = 0) {<br>
> // Save the current block's state on BlockScope.<br>
> BlockScope.push_back(Block(CurCodeSize));<br>
><br>
> Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=165739&r1=165738&r2=165739&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp?rev=165739&r1=165738&r2=165739&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp (original)<br>
> +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.cpp Thu Oct 11 15:20:40 2012<br>
> @@ -891,9 +891,9 @@<br>
> }<br>
> }<br>
><br>
> -/// DecodeSignRotatedValue - Decode a signed value stored with the sign bit in<br>
> +/// decodeSignRotatedValue - Decode a signed value stored with the sign bit in<br>
> /// the LSB for dense VBR encoding.<br>
> -static uint64_t DecodeSignRotatedValue(uint64_t V) {<br>
> +uint64_t BitcodeReader::decodeSignRotatedValue(uint64_t V) {<br>
> if ((V & 1) == 0)<br>
> return V >> 1;<br>
> if (V != 1)<br>
> @@ -943,7 +943,7 @@<br>
> static APInt ReadWideAPInt(ArrayRef<uint64_t> Vals, unsigned TypeBits) {<br>
> SmallVector<uint64_t, 8> Words(Vals.size());<br>
> std::transform(Vals.begin(), Vals.end(), Words.begin(),<br>
> - DecodeSignRotatedValue);<br>
> + BitcodeReader::decodeSignRotatedValue);<br>
><br>
> return APInt(TypeBits, Words);<br>
> }<br>
> @@ -997,7 +997,7 @@<br>
> case bitc::CST_CODE_INTEGER: // INTEGER: [intval]<br>
> if (!CurTy->isIntegerTy() || Record.empty())<br>
> return Error("Invalid CST_INTEGER record");<br>
> - V = ConstantInt::get(CurTy, DecodeSignRotatedValue(Record[0]));<br>
> + V = ConstantInt::get(CurTy, decodeSignRotatedValue(Record[0]));<br>
> break;<br>
> case bitc::CST_CODE_WIDE_INTEGER: {// WIDE_INTEGER: [n x intval]<br>
> if (!CurTy->isIntegerTy() || Record.empty())<br>
> @@ -1524,13 +1524,22 @@<br>
> // Read a record.<br>
> switch (Stream.ReadRecord(Code, Record)) {<br>
> default: break; // Default behavior, ignore unknown content.<br>
> - case bitc::MODULE_CODE_VERSION: // VERSION: [version#]<br>
> + case bitc::MODULE_CODE_VERSION: { // VERSION: [version#]<br>
> if (Record.size() < 1)<br>
> return Error("Malformed MODULE_CODE_VERSION");<br>
> - // Only version #0 is supported so far.<br>
> - if (Record[0] != 0)<br>
> - return Error("Unknown bitstream version!");<br>
> + // Only version #0 and #1 are supported so far.<br>
> + unsigned module_version = Record[0];<br>
> + switch (module_version) {<br>
> + default: return Error("Unknown bitstream version!");<br>
> + case 0:<br>
> + UseRelativeIDs = false;<br>
> + break;<br>
> + case 1:<br>
> + UseRelativeIDs = true;<br>
> + break;<br>
> + }<br>
> break;<br>
> + }<br>
> case bitc::MODULE_CODE_TRIPLE: { // TRIPLE: [strchr x N]<br>
> std::string S;<br>
> if (ConvertToString(Record, 0, S))<br>
> @@ -1797,13 +1806,6 @@<br>
> // Read a record.<br>
> switch (Stream.ReadRecord(Code, Record)) {<br>
> default: break; // Default behavior, ignore unknown content.<br>
> - case bitc::MODULE_CODE_VERSION: // VERSION: [version#]<br>
> - if (Record.size() < 1)<br>
> - return Error("Malformed MODULE_CODE_VERSION");<br>
> - // Only version #0 is supported so far.<br>
> - if (Record[0] != 0)<br>
> - return Error("Unknown bitstream version!");<br>
> - break;<br>
> case bitc::MODULE_CODE_TRIPLE: { // TRIPLE: [strchr x N]<br>
> std::string S;<br>
> if (ConvertToString(Record, 0, S))<br>
> @@ -2016,7 +2018,7 @@<br>
> unsigned OpNum = 0;<br>
> Value *LHS, *RHS;<br>
> if (getValueTypePair(Record, OpNum, NextValueNo, LHS) ||<br>
> - getValue(Record, OpNum, LHS->getType(), RHS) ||<br>
> + popValue(Record, OpNum, NextValueNo, LHS->getType(), RHS) ||<br>
> OpNum+1 > Record.size())<br>
> return Error("Invalid BINOP record");<br>
><br>
> @@ -2131,8 +2133,8 @@<br>
> unsigned OpNum = 0;<br>
> Value *TrueVal, *FalseVal, *Cond;<br>
> if (getValueTypePair(Record, OpNum, NextValueNo, TrueVal) ||<br>
> - getValue(Record, OpNum, TrueVal->getType(), FalseVal) ||<br>
> - getValue(Record, OpNum, Type::getInt1Ty(Context), Cond))<br>
> + popValue(Record, OpNum, NextValueNo, TrueVal->getType(), FalseVal) ||<br>
> + popValue(Record, OpNum, NextValueNo, Type::getInt1Ty(Context), Cond))<br>
> return Error("Invalid SELECT record");<br>
><br>
> I = SelectInst::Create(Cond, TrueVal, FalseVal);<br>
> @@ -2146,7 +2148,7 @@<br>
> unsigned OpNum = 0;<br>
> Value *TrueVal, *FalseVal, *Cond;<br>
> if (getValueTypePair(Record, OpNum, NextValueNo, TrueVal) ||<br>
> - getValue(Record, OpNum, TrueVal->getType(), FalseVal) ||<br>
> + popValue(Record, OpNum, NextValueNo, TrueVal->getType(), FalseVal) ||<br>
> getValueTypePair(Record, OpNum, NextValueNo, Cond))<br>
> return Error("Invalid SELECT record");<br>
><br>
> @@ -2171,7 +2173,7 @@<br>
> unsigned OpNum = 0;<br>
> Value *Vec, *Idx;<br>
> if (getValueTypePair(Record, OpNum, NextValueNo, Vec) ||<br>
> - getValue(Record, OpNum, Type::getInt32Ty(Context), Idx))<br>
> + popValue(Record, OpNum, NextValueNo, Type::getInt32Ty(Context), Idx))<br>
> return Error("Invalid EXTRACTELT record");<br>
> I = ExtractElementInst::Create(Vec, Idx);<br>
> InstructionList.push_back(I);<br>
> @@ -2182,9 +2184,9 @@<br>
> unsigned OpNum = 0;<br>
> Value *Vec, *Elt, *Idx;<br>
> if (getValueTypePair(Record, OpNum, NextValueNo, Vec) ||<br>
> - getValue(Record, OpNum,<br>
> + popValue(Record, OpNum, NextValueNo,<br>
> cast<VectorType>(Vec->getType())->getElementType(), Elt) ||<br>
> - getValue(Record, OpNum, Type::getInt32Ty(Context), Idx))<br>
> + popValue(Record, OpNum, NextValueNo, Type::getInt32Ty(Context), Idx))<br>
> return Error("Invalid INSERTELT record");<br>
> I = InsertElementInst::Create(Vec, Elt, Idx);<br>
> InstructionList.push_back(I);<br>
> @@ -2195,7 +2197,7 @@<br>
> unsigned OpNum = 0;<br>
> Value *Vec1, *Vec2, *Mask;<br>
> if (getValueTypePair(Record, OpNum, NextValueNo, Vec1) ||<br>
> - getValue(Record, OpNum, Vec1->getType(), Vec2))<br>
> + popValue(Record, OpNum, NextValueNo, Vec1->getType(), Vec2))<br>
> return Error("Invalid SHUFFLEVEC record");<br>
><br>
> if (getValueTypePair(Record, OpNum, NextValueNo, Mask))<br>
> @@ -2215,7 +2217,7 @@<br>
> unsigned OpNum = 0;<br>
> Value *LHS, *RHS;<br>
> if (getValueTypePair(Record, OpNum, NextValueNo, LHS) ||<br>
> - getValue(Record, OpNum, LHS->getType(), RHS) ||<br>
> + popValue(Record, OpNum, NextValueNo, LHS->getType(), RHS) ||<br>
> OpNum+1 != Record.size())<br>
> return Error("Invalid CMP record");<br>
><br>
> @@ -2260,7 +2262,8 @@<br>
> }<br>
> else {<br>
> BasicBlock *FalseDest = getBasicBlock(Record[1]);<br>
> - Value *Cond = getFnValueByID(Record[2], Type::getInt1Ty(Context));<br>
> + Value *Cond = getValue(Record, 2, NextValueNo,<br>
> + Type::getInt1Ty(Context));<br>
> if (FalseDest == 0 || Cond == 0)<br>
> return Error("Invalid BR record");<br>
> I = BranchInst::Create(TrueDest, FalseDest, Cond);<br>
> @@ -2276,7 +2279,7 @@<br>
> Type *OpTy = getTypeByID(Record[1]);<br>
> unsigned ValueBitWidth = cast<IntegerType>(OpTy)->getBitWidth();<br>
><br>
> - Value *Cond = getFnValueByID(Record[2], OpTy);<br>
> + Value *Cond = getValue(Record, 2, NextValueNo, OpTy);<br>
> BasicBlock *Default = getBasicBlock(Record[3]);<br>
> if (OpTy == 0 || Cond == 0 || Default == 0)<br>
> return Error("Invalid SWITCH record");<br>
> @@ -2331,7 +2334,7 @@<br>
> if (Record.size() < 3 || (Record.size() & 1) == 0)<br>
> return Error("Invalid SWITCH record");<br>
> Type *OpTy = getTypeByID(Record[0]);<br>
> - Value *Cond = getFnValueByID(Record[1], OpTy);<br>
> + Value *Cond = getValue(Record, 1, NextValueNo, OpTy);<br>
> BasicBlock *Default = getBasicBlock(Record[2]);<br>
> if (OpTy == 0 || Cond == 0 || Default == 0)<br>
> return Error("Invalid SWITCH record");<br>
> @@ -2355,7 +2358,7 @@<br>
> if (Record.size() < 2)<br>
> return Error("Invalid INDIRECTBR record");<br>
> Type *OpTy = getTypeByID(Record[0]);<br>
> - Value *Address = getFnValueByID(Record[1], OpTy);<br>
> + Value *Address = getValue(Record, 1, NextValueNo, OpTy);<br>
> if (OpTy == 0 || Address == 0)<br>
> return Error("Invalid INDIRECTBR record");<br>
> unsigned NumDests = Record.size()-2;<br>
> @@ -2397,7 +2400,8 @@<br>
><br>
> SmallVector<Value*, 16> Ops;<br>
> for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i, ++OpNum) {<br>
> - Ops.push_back(getFnValueByID(Record[OpNum], FTy->getParamType(i)));<br>
> + Ops.push_back(getValue(Record, OpNum, NextValueNo,<br>
> + FTy->getParamType(i)));<br>
> if (Ops.back() == 0) return Error("Invalid INVOKE record");<br>
> }<br>
><br>
> @@ -2444,7 +2448,14 @@<br>
> InstructionList.push_back(PN);<br>
><br>
> for (unsigned i = 0, e = Record.size()-1; i != e; i += 2) {<br>
> - Value *V = getFnValueByID(Record[1+i], Ty);<br>
> + Value *V;<br>
> + // With the new function encoding, it is possible that operands have<br>
> + // negative IDs (for forward references). Use a signed VBR<br>
> + // representation to keep the encoding small.<br>
> + if (UseRelativeIDs)<br>
> + V = getValueSigned(Record, 1+i, NextValueNo, Ty);<br>
> + else<br>
> + V = getValue(Record, 1+i, NextValueNo, Ty);<br>
> BasicBlock *BB = getBasicBlock(Record[2+i]);<br>
> if (!V || !BB) return Error("Invalid PHI record");<br>
> PN->addIncoming(V, BB);<br>
> @@ -2542,7 +2553,7 @@<br>
> unsigned OpNum = 0;<br>
> Value *Val, *Ptr;<br>
> if (getValueTypePair(Record, OpNum, NextValueNo, Ptr) ||<br>
> - getValue(Record, OpNum,<br>
> + popValue(Record, OpNum, NextValueNo,<br>
> cast<PointerType>(Ptr->getType())->getElementType(), Val) ||<br>
> OpNum+2 != Record.size())<br>
> return Error("Invalid STORE record");<br>
> @@ -2556,7 +2567,7 @@<br>
> unsigned OpNum = 0;<br>
> Value *Val, *Ptr;<br>
> if (getValueTypePair(Record, OpNum, NextValueNo, Ptr) ||<br>
> - getValue(Record, OpNum,<br>
> + popValue(Record, OpNum, NextValueNo,<br>
> cast<PointerType>(Ptr->getType())->getElementType(), Val) ||<br>
> OpNum+4 != Record.size())<br>
> return Error("Invalid STOREATOMIC record");<br>
> @@ -2579,9 +2590,9 @@<br>
> unsigned OpNum = 0;<br>
> Value *Ptr, *Cmp, *New;<br>
> if (getValueTypePair(Record, OpNum, NextValueNo, Ptr) ||<br>
> - getValue(Record, OpNum,<br>
> + popValue(Record, OpNum, NextValueNo,<br>
> cast<PointerType>(Ptr->getType())->getElementType(), Cmp) ||<br>
> - getValue(Record, OpNum,<br>
> + popValue(Record, OpNum, NextValueNo,<br>
> cast<PointerType>(Ptr->getType())->getElementType(), New) ||<br>
> OpNum+3 != Record.size())<br>
> return Error("Invalid CMPXCHG record");<br>
> @@ -2599,7 +2610,7 @@<br>
> unsigned OpNum = 0;<br>
> Value *Ptr, *Val;<br>
> if (getValueTypePair(Record, OpNum, NextValueNo, Ptr) ||<br>
> - getValue(Record, OpNum,<br>
> + popValue(Record, OpNum, NextValueNo,<br>
> cast<PointerType>(Ptr->getType())->getElementType(), Val) ||<br>
> OpNum+4 != Record.size())<br>
> return Error("Invalid ATOMICRMW record");<br>
> @@ -2653,7 +2664,8 @@<br>
> if (FTy->getParamType(i)->isLabelTy())<br>
> Args.push_back(getBasicBlock(Record[OpNum]));<br>
> else<br>
> - Args.push_back(getFnValueByID(Record[OpNum], FTy->getParamType(i)));<br>
> + Args.push_back(getValue(Record, OpNum, NextValueNo,<br>
> + FTy->getParamType(i)));<br>
> if (Args.back() == 0) return Error("Invalid CALL record");<br>
> }<br>
><br>
> @@ -2682,7 +2694,7 @@<br>
> if (Record.size() < 3)<br>
> return Error("Invalid VAARG record");<br>
> Type *OpTy = getTypeByID(Record[0]);<br>
> - Value *Op = getFnValueByID(Record[1], OpTy);<br>
> + Value *Op = getValue(Record, 1, NextValueNo, OpTy);<br>
> Type *ResTy = getTypeByID(Record[2]);<br>
> if (!OpTy || !Op || !ResTy)<br>
> return Error("Invalid VAARG record");<br>
><br>
> Modified: llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h?rev=165739&r1=165738&r2=165739&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h?rev=165739&r1=165738&r2=165739&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h (original)<br>
> +++ llvm/trunk/lib/Bitcode/Reader/BitcodeReader.h Thu Oct 11 15:20:40 2012<br>
> @@ -179,18 +179,27 @@<br>
> typedef std::pair<unsigned, GlobalVariable*> BlockAddrRefTy;<br>
> DenseMap<Function*, std::vector<BlockAddrRefTy> > BlockAddrFwdRefs;<br>
><br>
> + /// UseRelativeIDs - Indicates that we are using a new encoding for<br>
> + /// instrunction operands where most operands in the current<br>
> + /// FUNCTION_BLOCK are encoded relative to the instruction number,<br>
> + /// for a more compact encoding. Some instruction operands are not<br>
> + /// relative to the instruction ID: basic block numbers, and types.<br>
> + /// Once the old style function blocks have been phased out, we would<br>
> + /// not need this flag.<br>
> + bool UseRelativeIDs;<br>
> +<br>
> public:<br>
> explicit BitcodeReader(MemoryBuffer *buffer, LLVMContext &C)<br>
> : Context(C), TheModule(0), Buffer(buffer), BufferOwned(false),<br>
> LazyStreamer(0), NextUnreadBit(0), SeenValueSymbolTable(false),<br>
> ErrorString(0), ValueList(C), MDValueList(C),<br>
> - SeenFirstFunctionBody(false) {<br>
> + SeenFirstFunctionBody(false), UseRelativeIDs(false) {<br>
> }<br>
> explicit BitcodeReader(DataStreamer *streamer, LLVMContext &C)<br>
> : Context(C), TheModule(0), Buffer(0), BufferOwned(false),<br>
> LazyStreamer(streamer), NextUnreadBit(0), SeenValueSymbolTable(false),<br>
> ErrorString(0), ValueList(C), MDValueList(C),<br>
> - SeenFirstFunctionBody(false) {<br>
> + SeenFirstFunctionBody(false), UseRelativeIDs(false) {<br>
> }<br>
> ~BitcodeReader() {<br>
> FreeState();<br>
> @@ -223,6 +232,9 @@<br>
> /// @brief Cheap mechanism to just extract module triple<br>
> /// @returns true if an error occurred.<br>
> bool ParseTriple(std::string &Triple);<br>
> +<br>
> + static uint64_t decodeSignRotatedValue(uint64_t V);<br>
> +<br>
> private:<br>
> Type *getTypeByID(unsigned ID);<br>
> Value *getFnValueByID(unsigned ID, Type *Ty) {<br>
> @@ -247,6 +259,9 @@<br>
> unsigned InstNum, Value *&ResVal) {<br>
> if (Slot == Record.size()) return true;<br>
> unsigned ValNo = (unsigned)Record[Slot++];<br>
> + // Adjust the ValNo, if it was encoded relative to the InstNum.<br>
> + if (UseRelativeIDs)<br>
> + ValNo = InstNum - ValNo;<br>
> if (ValNo < InstNum) {<br>
> // If this is not a forward reference, just return the value we already<br>
> // have.<br>
> @@ -255,20 +270,54 @@<br>
> } else if (Slot == Record.size()) {<br>
> return true;<br>
> }<br>
> -<br>
> +<br>
> unsigned TypeNo = (unsigned)Record[Slot++];<br>
> ResVal = getFnValueByID(ValNo, getTypeByID(TypeNo));<br>
> return ResVal == 0;<br>
> }<br>
> - bool getValue(SmallVector<uint64_t, 64> &Record, unsigned &Slot,<br>
> - Type *Ty, Value *&ResVal) {<br>
> - if (Slot == Record.size()) return true;<br>
> - unsigned ValNo = (unsigned)Record[Slot++];<br>
> - ResVal = getFnValueByID(ValNo, Ty);<br>
> +<br>
> + /// popValue - Read a value out of the specified record from slot 'Slot'.<br>
> + /// Increment Slot past the number of slots used by the value in the record.<br>
> + /// Return true if there is an error.<br>
> + bool popValue(SmallVector<uint64_t, 64> &Record, unsigned &Slot,<br>
> + unsigned InstNum, Type *Ty, Value *&ResVal) {<br>
> + if (getValue(Record, Slot, InstNum, Ty, ResVal))<br>
> + return true;<br>
> + // All values currently take a single record slot.<br>
> + ++Slot;<br>
> + return false;<br>
> + }<br>
> +<br>
> + /// getValue -- Like popValue, but does not increment the Slot number.<br>
> + bool getValue(SmallVector<uint64_t, 64> &Record, unsigned Slot,<br>
> + unsigned InstNum, Type *Ty, Value *&ResVal) {<br>
> + ResVal = getValue(Record, Slot, InstNum, Ty);<br>
> return ResVal == 0;<br>
> }<br>
><br>
> -<br>
> + /// getValue -- Version of getValue that returns ResVal directly,<br>
> + /// or 0 if there is an error.<br>
> + Value *getValue(SmallVector<uint64_t, 64> &Record, unsigned Slot,<br>
> + unsigned InstNum, Type *Ty) {<br>
> + if (Slot == Record.size()) return 0;<br>
> + unsigned ValNo = (unsigned)Record[Slot];<br>
> + // Adjust the ValNo, if it was encoded relative to the InstNum.<br>
> + if (UseRelativeIDs)<br>
> + ValNo = InstNum - ValNo;<br>
> + return getFnValueByID(ValNo, Ty);<br>
> + }<br>
> +<br>
> + /// getValueSigned -- Like getValue, but decodes signed VBRs.<br>
> + Value *getValueSigned(SmallVector<uint64_t, 64> &Record, unsigned Slot,<br>
> + unsigned InstNum, Type *Ty) {<br>
> + if (Slot == Record.size()) return 0;<br>
> + unsigned ValNo = (unsigned)decodeSignRotatedValue(Record[Slot]);<br>
> + // Adjust the ValNo, if it was encoded relative to the InstNum.<br>
> + if (UseRelativeIDs)<br>
> + ValNo = InstNum - ValNo;<br>
> + return getFnValueByID(ValNo, Ty);<br>
> + }<br>
> +<br>
> bool ParseModule(bool Resume);<br>
> bool ParseAttributeBlock();<br>
> bool ParseTypeTable();<br>
><br>
> Modified: llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=165739&r1=165738&r2=165739&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp?rev=165739&r1=165738&r2=165739&view=diff</a><br>
> ==============================================================================<br>
> --- llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp (original)<br>
> +++ llvm/trunk/lib/Bitcode/Writer/BitcodeWriter.cpp Thu Oct 11 15:20:40 2012<br>
> @@ -41,8 +41,6 @@<br>
> /// These are manifest constants used by the bitcode writer. They do not need to<br>
> /// be kept in sync with the reader, but need to be consistent within this file.<br>
> enum {<br>
> - CurVersion = 0,<br>
> -<br>
> // VALUE_SYMTAB_BLOCK abbrev id's.<br>
> VST_ENTRY_8_ABBREV = bitc::FIRST_APPLICATION_ABBREV,<br>
> VST_ENTRY_7_ABBREV,<br>
> @@ -722,16 +720,20 @@<br>
> Stream.ExitBlock();<br>
> }<br>
><br>
> +static void emitSignedInt64(SmallVectorImpl<uint64_t> &Vals, uint64_t V) {<br>
> + if ((int64_t)V >= 0)<br>
> + Vals.push_back(V << 1);<br>
> + else<br>
> + Vals.push_back((-V << 1) | 1);<br>
> +}<br>
> +<br>
> static void EmitAPInt(SmallVectorImpl<uint64_t> &Vals,<br>
> unsigned &Code, unsigned &AbbrevToUse, const APInt &Val,<br>
> bool EmitSizeForWideNumbers = false<br>
> ) {<br>
> if (Val.getBitWidth() <= 64) {<br>
> uint64_t V = Val.getSExtValue();<br>
> - if ((int64_t)V >= 0)<br>
> - Vals.push_back(V << 1);<br>
> - else<br>
> - Vals.push_back((-V << 1) | 1);<br>
> + emitSignedInt64(Vals, V);<br>
> Code = bitc::CST_CODE_INTEGER;<br>
> AbbrevToUse = CONSTANTS_INTEGER_ABBREV;<br>
> } else {<br>
> @@ -747,11 +749,7 @@<br>
><br>
> const uint64_t *RawWords = Val.getRawData();<br>
> for (unsigned i = 0; i != NWords; ++i) {<br>
> - int64_t V = RawWords[i];<br>
> - if (V >= 0)<br>
> - Vals.push_back(V << 1);<br>
> - else<br>
> - Vals.push_back((-V << 1) | 1);<br>
> + emitSignedInt64(Vals, RawWords[i]);<br>
> }<br>
> Code = bitc::CST_CODE_WIDE_INTEGER;<br>
> }<br>
> @@ -1025,12 +1023,13 @@<br>
> ///<br>
> /// This function adds V's value ID to Vals. If the value ID is higher than the<br>
> /// instruction ID, then it is a forward reference, and it also includes the<br>
> -/// type ID.<br>
> +/// type ID. The value ID that is written is encoded relative to the InstID.<br>
> static bool PushValueAndType(const Value *V, unsigned InstID,<br>
> SmallVector<unsigned, 64> &Vals,<br>
> ValueEnumerator &VE) {<br>
> unsigned ValID = VE.getValueID(V);<br>
> - Vals.push_back(ValID);<br>
> + // Make encoding relative to the InstID.<br>
> + Vals.push_back(InstID - ValID);<br>
> if (ValID >= InstID) {<br>
> Vals.push_back(VE.getTypeID(V->getType()));<br>
> return true;<br>
> @@ -1038,6 +1037,30 @@<br>
> return false;<br>
> }<br>
><br>
> +/// pushValue - Like PushValueAndType, but where the type of the value is<br>
> +/// omitted (perhaps it was already encoded in an earlier operand).<br>
> +static void pushValue(const Value *V, unsigned InstID,<br>
> + SmallVector<unsigned, 64> &Vals,<br>
> + ValueEnumerator &VE) {<br>
> + unsigned ValID = VE.getValueID(V);<br>
> + Vals.push_back(InstID - ValID);<br>
> +}<br>
> +<br>
> +static void pushValue64(const Value *V, unsigned InstID,<br>
> + SmallVector<uint64_t, 128> &Vals,<br>
> + ValueEnumerator &VE) {<br>
> + uint64_t ValID = VE.getValueID(V);<br>
> + Vals.push_back(InstID - ValID);<br>
> +}<br>
> +<br>
> +static void pushValueSigned(const Value *V, unsigned InstID,<br>
> + SmallVector<uint64_t, 128> &Vals,<br>
> + ValueEnumerator &VE) {<br>
> + unsigned ValID = VE.getValueID(V);<br>
> + int64_t diff = ((int32_t)InstID - (int32_t)ValID);<br>
> + emitSignedInt64(Vals, diff);<br>
> +}<br>
> +<br>
> /// WriteInstruction - Emit an instruction to the specified stream.<br>
> static void WriteInstruction(const Instruction &I, unsigned InstID,<br>
> ValueEnumerator &VE, BitstreamWriter &Stream,<br>
> @@ -1058,7 +1081,7 @@<br>
> Code = bitc::FUNC_CODE_INST_BINOP;<br>
> if (!PushValueAndType(I.getOperand(0), InstID, Vals, VE))<br>
> AbbrevToUse = FUNCTION_INST_BINOP_ABBREV;<br>
> - Vals.push_back(VE.getValueID(I.getOperand(1)));<br>
> + pushValue(I.getOperand(1), InstID, Vals, VE);<br>
> Vals.push_back(GetEncodedBinaryOpcode(I.getOpcode()));<br>
> uint64_t Flags = GetOptimizationFlags(&I);<br>
> if (Flags != 0) {<br>
> @@ -1096,32 +1119,32 @@<br>
> case Instruction::Select:<br>
> Code = bitc::FUNC_CODE_INST_VSELECT;<br>
> PushValueAndType(I.getOperand(1), InstID, Vals, VE);<br>
> - Vals.push_back(VE.getValueID(I.getOperand(2)));<br>
> + pushValue(I.getOperand(2), InstID, Vals, VE);<br>
> PushValueAndType(I.getOperand(0), InstID, Vals, VE);<br>
> break;<br>
> case Instruction::ExtractElement:<br>
> Code = bitc::FUNC_CODE_INST_EXTRACTELT;<br>
> PushValueAndType(I.getOperand(0), InstID, Vals, VE);<br>
> - Vals.push_back(VE.getValueID(I.getOperand(1)));<br>
> + pushValue(I.getOperand(1), InstID, Vals, VE);<br>
> break;<br>
> case Instruction::InsertElement:<br>
> Code = bitc::FUNC_CODE_INST_INSERTELT;<br>
> PushValueAndType(I.getOperand(0), InstID, Vals, VE);<br>
> - Vals.push_back(VE.getValueID(I.getOperand(1)));<br>
> - Vals.push_back(VE.getValueID(I.getOperand(2)));<br>
> + pushValue(I.getOperand(1), InstID, Vals, VE);<br>
> + pushValue(I.getOperand(2), InstID, Vals, VE);<br>
> break;<br>
> case Instruction::ShuffleVector:<br>
> Code = bitc::FUNC_CODE_INST_SHUFFLEVEC;<br>
> PushValueAndType(I.getOperand(0), InstID, Vals, VE);<br>
> - Vals.push_back(VE.getValueID(I.getOperand(1)));<br>
> - Vals.push_back(VE.getValueID(I.getOperand(2)));<br>
> + pushValue(I.getOperand(1), InstID, Vals, VE);<br>
> + pushValue(I.getOperand(2), InstID, Vals, VE);<br>
> break;<br>
> case Instruction::ICmp:<br>
> case Instruction::FCmp:<br>
> // compare returning Int1Ty or vector of Int1Ty<br>
> Code = bitc::FUNC_CODE_INST_CMP2;<br>
> PushValueAndType(I.getOperand(0), InstID, Vals, VE);<br>
> - Vals.push_back(VE.getValueID(I.getOperand(1)));<br>
> + pushValue(I.getOperand(1), InstID, Vals, VE);<br>
> Vals.push_back(cast<CmpInst>(I).getPredicate());<br>
> break;<br>
><br>
> @@ -1147,7 +1170,7 @@<br>
> Vals.push_back(VE.getValueID(II.getSuccessor(0)));<br>
> if (II.isConditional()) {<br>
> Vals.push_back(VE.getValueID(II.getSuccessor(1)));<br>
> - Vals.push_back(VE.getValueID(II.getCondition()));<br>
> + pushValue(II.getCondition(), InstID, Vals, VE);<br>
> }<br>
> }<br>
> break;<br>
> @@ -1164,7 +1187,7 @@<br>
> Vals64.push_back(SwitchRecordHeader);<br>
><br>
> Vals64.push_back(VE.getTypeID(SI.getCondition()->getType()));<br>
> - Vals64.push_back(VE.getValueID(SI.getCondition()));<br>
> + pushValue64(SI.getCondition(), InstID, Vals64, VE);<br>
> Vals64.push_back(VE.getValueID(SI.getDefaultDest()));<br>
> Vals64.push_back(SI.getNumCases());<br>
> for (SwitchInst::CaseIt i = SI.case_begin(), e = SI.case_end();<br>
> @@ -1215,7 +1238,9 @@<br>
> case Instruction::IndirectBr:<br>
> Code = bitc::FUNC_CODE_INST_INDIRECTBR;<br>
> Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));<br>
> - for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i)<br>
> + // Encode the address operand as relative, but not the basic blocks.<br>
> + pushValue(I.getOperand(0), InstID, Vals, VE);<br>
> + for (unsigned i = 1, e = I.getNumOperands(); i != e; ++i)<br>
> Vals.push_back(VE.getValueID(I.getOperand(i)));<br>
> break;<br>
><br>
> @@ -1234,7 +1259,7 @@<br>
><br>
> // Emit value #'s for the fixed parameters.<br>
> for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i)<br>
> - Vals.push_back(VE.getValueID(I.getOperand(i))); // fixed param.<br>
> + pushValue(I.getOperand(i), InstID, Vals, VE); // fixed param.<br>
><br>
> // Emit type/value pairs for varargs params.<br>
> if (FTy->isVarArg()) {<br>
> @@ -1256,12 +1281,19 @@<br>
> case Instruction::PHI: {<br>
> const PHINode &PN = cast<PHINode>(I);<br>
> Code = bitc::FUNC_CODE_INST_PHI;<br>
> - Vals.push_back(VE.getTypeID(PN.getType()));<br>
> + // With the newer instruction encoding, forward references could give<br>
> + // negative valued IDs. This is most common for PHIs, so we use<br>
> + // signed VBRs.<br>
> + SmallVector<uint64_t, 128> Vals64;<br>
> + Vals64.push_back(VE.getTypeID(PN.getType()));<br>
> for (unsigned i = 0, e = PN.getNumIncomingValues(); i != e; ++i) {<br>
> - Vals.push_back(VE.getValueID(PN.getIncomingValue(i)));<br>
> - Vals.push_back(VE.getValueID(PN.getIncomingBlock(i)));<br>
> + pushValueSigned(PN.getIncomingValue(i), InstID, Vals64, VE);<br>
> + Vals64.push_back(VE.getValueID(PN.getIncomingBlock(i)));<br>
> }<br>
> - break;<br>
> + // Emit a Vals64 vector and exit.<br>
> + Stream.EmitRecord(Code, Vals64, AbbrevToUse);<br>
> + Vals64.clear();<br>
> + return;<br>
> }<br>
><br>
> case Instruction::LandingPad: {<br>
> @@ -1311,7 +1343,7 @@<br>
> else<br>
> Code = bitc::FUNC_CODE_INST_STORE;<br>
> PushValueAndType(I.getOperand(1), InstID, Vals, VE); // ptrty + ptr<br>
> - Vals.push_back(VE.getValueID(I.getOperand(0))); // val.<br>
> + pushValue(I.getOperand(0), InstID, Vals, VE); // val.<br>
> Vals.push_back(Log2_32(cast<StoreInst>(I).getAlignment())+1);<br>
> Vals.push_back(cast<StoreInst>(I).isVolatile());<br>
> if (cast<StoreInst>(I).isAtomic()) {<br>
> @@ -1322,8 +1354,8 @@<br>
> case Instruction::AtomicCmpXchg:<br>
> Code = bitc::FUNC_CODE_INST_CMPXCHG;<br>
> PushValueAndType(I.getOperand(0), InstID, Vals, VE); // ptrty + ptr<br>
> - Vals.push_back(VE.getValueID(I.getOperand(1))); // cmp.<br>
> - Vals.push_back(VE.getValueID(I.getOperand(2))); // newval.<br>
> + pushValue(I.getOperand(1), InstID, Vals, VE); // cmp.<br>
> + pushValue(I.getOperand(2), InstID, Vals, VE); // newval.<br>
> Vals.push_back(cast<AtomicCmpXchgInst>(I).isVolatile());<br>
> Vals.push_back(GetEncodedOrdering(<br>
> cast<AtomicCmpXchgInst>(I).getOrdering()));<br>
> @@ -1333,7 +1365,7 @@<br>
> case Instruction::AtomicRMW:<br>
> Code = bitc::FUNC_CODE_INST_ATOMICRMW;<br>
> PushValueAndType(I.getOperand(0), InstID, Vals, VE); // ptrty + ptr<br>
> - Vals.push_back(VE.getValueID(I.getOperand(1))); // val.<br>
> + pushValue(I.getOperand(1), InstID, Vals, VE); // val.<br>
> Vals.push_back(GetEncodedRMWOperation(<br>
> cast<AtomicRMWInst>(I).getOperation()));<br>
> Vals.push_back(cast<AtomicRMWInst>(I).isVolatile());<br>
> @@ -1358,8 +1390,13 @@<br>
> PushValueAndType(CI.getCalledValue(), InstID, Vals, VE); // Callee<br>
><br>
> // Emit value #'s for the fixed parameters.<br>
> - for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i)<br>
> - Vals.push_back(VE.getValueID(CI.getArgOperand(i))); // fixed param.<br>
> + for (unsigned i = 0, e = FTy->getNumParams(); i != e; ++i) {<br>
> + // Check for labels (can happen with asm labels).<br>
> + if (FTy->getParamType(i)->isLabelTy())<br>
> + Vals.push_back(VE.getValueID(CI.getArgOperand(i)));<br>
> + else<br>
> + pushValue(CI.getArgOperand(i), InstID, Vals, VE); // fixed param.<br>
> + }<br>
><br>
> // Emit type/value pairs for varargs params.<br>
> if (FTy->isVarArg()) {<br>
> @@ -1372,7 +1409,7 @@<br>
> case Instruction::VAArg:<br>
> Code = bitc::FUNC_CODE_INST_VAARG;<br>
> Vals.push_back(VE.getTypeID(I.getOperand(0)->getType())); // valistty<br>
> - Vals.push_back(VE.getValueID(I.getOperand(0))); // valist.<br>
> + pushValue(I.getOperand(0), InstID, Vals, VE); // valist.<br>
> Vals.push_back(VE.getTypeID(I.getType())); // restype.<br>
> break;<br>
> }<br>
> @@ -1514,8 +1551,8 @@<br>
> // Emit blockinfo, which defines the standard abbreviations etc.<br>
> static void WriteBlockInfo(const ValueEnumerator &VE, BitstreamWriter &Stream) {<br>
> // We only want to emit block info records for blocks that have multiple<br>
> - // instances: CONSTANTS_BLOCK, FUNCTION_BLOCK and VALUE_SYMTAB_BLOCK. Other<br>
> - // blocks can defined their abbrevs inline.<br>
> + // instances: CONSTANTS_BLOCK, FUNCTION_BLOCK and VALUE_SYMTAB_BLOCK.<br>
> + // Other blocks can defined their abbrevs inline.<br>
> Stream.EnterBlockInfoBlock(2);<br>
><br>
> { // 8-bit fixed-width VST_ENTRY/VST_BBENTRY strings.<br>
> @@ -1773,12 +1810,10 @@<br>
> static void WriteModule(const Module *M, BitstreamWriter &Stream) {<br>
> Stream.EnterSubblock(bitc::MODULE_BLOCK_ID, 3);<br>
><br>
> - // Emit the version number if it is non-zero.<br>
> - if (CurVersion) {<br>
> - SmallVector<unsigned, 1> Vals;<br>
> - Vals.push_back(CurVersion);<br>
> - Stream.EmitRecord(bitc::MODULE_CODE_VERSION, Vals);<br>
> - }<br>
> + SmallVector<unsigned, 1> Vals;<br>
> + unsigned CurVersion = 1;<br>
> + Vals.push_back(CurVersion);<br>
> + Stream.EmitRecord(bitc::MODULE_CODE_VERSION, Vals);<br>
><br>
> // Analyze the module, enumerating globals, functions, etc.<br>
> ValueEnumerator VE(M);<br>
><br>
> Added: llvm/trunk/test/Bitcode/function-encoding-rel-operands.ll<br>
> URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bitcode/function-encoding-rel-operands.ll?rev=165739&view=auto" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Bitcode/function-encoding-rel-operands.ll?rev=165739&view=auto</a><br>
> ==============================================================================<br>
> --- llvm/trunk/test/Bitcode/function-encoding-rel-operands.ll (added)<br>
> +++ llvm/trunk/test/Bitcode/function-encoding-rel-operands.ll Thu Oct 11 15:20:40 2012<br>
> @@ -0,0 +1,49 @@<br>
> +; Basic sanity test to check that instruction operands are encoded with<br>
> +; relative IDs.<br>
> +; RUN: llvm-as < %s | llvm-bcanalyzer -dump | FileCheck %s<br>
<br>
</div></div>I'm not sure if this is just me, but this test case is breaking my<br>
CMake build because the test case cannot find llvm-bcanalyzer to run<br>
unless I explicitly build llvm-bcanalyzer before runinng the tests.<br>
<br>
Any idea what missing dependency might need to be tweaked to make this work?<br>
<span class="HOEnZb"><font color="#888888"><br>
- David<br>
</font></span><div class="HOEnZb"><div class="h5"><br>
> +<br>
> +; CHECK: FUNCTION_BLOCK<br>
> +; CHECK: INST_BINOP {{.*}}op0=1 op1=1<br>
> +; CHECK: INST_BINOP {{.*}}op0=1 op1=1<br>
> +; CHECK: INST_BINOP {{.*}}op0=1 op1=1<br>
> +; CHECK: INST_RET {{.*}}op0=1<br>
> +define i32 @test_int_binops(i32 %a) nounwind {<br>
> +entry:<br>
> + %0 = add i32 %a, %a<br>
> + %1 = sub i32 %0, %0<br>
> + %2 = mul i32 %1, %1<br>
> + ret i32 %2<br>
> +}<br>
> +<br>
> +<br>
> +; CHECK: FUNCTION_BLOCK<br>
> +; CHECK: INST_CAST {{.*}}op0=1<br>
> +; CHECK: INST_BINOP {{.*}}op0=1 op1=1<br>
> +; CHECK: INST_BINOP {{.*}}op0=1 op1=1<br>
> +; CHECK: INST_BINOP {{.*}}op0=1 op1=1<br>
> +; CHECK: INST_BINOP {{.*}}op0=1 op1=1<br>
> +; CHECK: INST_RET {{.*}}op0=1<br>
> +define double @test_float_binops(i32 %a) nounwind {<br>
> + %1 = sitofp i32 %a to double<br>
> + %2 = fadd double %1, %1<br>
> + %3 = fsub double %2, %2<br>
> + %4 = fmul double %3, %3<br>
> + %5 = fdiv double %4, %4<br>
> + ret double %5<br>
> +}<br>
> +<br>
> +<br>
> +; CHECK: FUNCTION_BLOCK<br>
> +; skip checking operands of INST_INBOUNDS_GEP since that depends on ordering<br>
> +; between literals and the formal parameters.<br>
> +; CHECK: INST_INBOUNDS_GEP {{.*}}<br>
> +; CHECK: INST_LOAD {{.*}}op0=1 {{.*}}<br>
> +; CHECK: INST_CMP2 op0=1 {{.*}}<br>
> +; CHECK: INST_RET {{.*}}op0=1<br>
> +define i1 @test_load(i32 %a, {i32, i32}* %ptr) nounwind {<br>
> +entry:<br>
> + %0 = getelementptr inbounds {i32, i32}* %ptr, i32 %a, i32 0<br>
> + %1 = load i32* %0<br>
> + %2 = icmp eq i32 %1, %a<br>
> + ret i1 %2<br>
> +}<br>
><br>
><br>
> _______________________________________________<br>
> llvm-commits mailing list<br>
> <a href="mailto:llvm-commits@cs.uiuc.edu">llvm-commits@cs.uiuc.edu</a><br>
> <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits</a><br>
</div></div></blockquote></div><br></div>