<html><head></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; ">Hi Alexey,<div>Yes, this change is definitely the problem. I used EBX as the base pointer because it appeared to work with all the calling conventions, but it can be changed in X86RegisterInfo.cpp. If there is callee-saved register that isn't used by any ABI, then that would be the ideal choice. Otherwise, I think the solution would be to probe the subtarget and ask for the base pointer register. If that sounds reasonable I'll start working on a patch.</div><div><br></div><div> Chad</div><div><br><div><div>On Jul 31, 2012, at 7:41 AM, Alexey Samsonov wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite">Hi Chad,<div><br></div><div>I'm not quite sure in the source of problem, and currently don't have a small reproducer, but would share my concerns here for now.</div><div><br></div><div>I've encountered problems while testing 32-bit code, where Global Offset Table (GOT) was overwritten with garbage, which lead to</div>
<div>segfaults when trying to run functions from PLT. I think this may be connected with this patch, as there is a comment in X86ISelLowering.cpp:</div><div><div> // ELF / PIC requires GOT in the EBX register before function calls via PLT</div>
<div> // GOT pointer.</div><div><br></div><div>Here are extracts from function that spoils global offset table contents (there is a stack realignment, and dynamic allocas there,</div><div>so we would use %ebx to reference stack variables):</div>
<div><br></div> 0xde635aa0 <+0>: push %ebp<br> 0xde635aa1 <+1>: mov %esp,%ebp<br> 0xde635aa3 <+3>: push %ebx<br><...><br> 0xde635aa6 <+6>: and $0xffffffe0,%esp<br>
0xde635aac <+12>: sub $0x2e0,%esp<br> 0xde635ab2 <+18>: mov %esp,%ebx <------ stack pointer is saved to %ebx<br><br>On the other hand, %ebx is still used to reference GOT for "function@plt" functions, and the address of GOT<br>
is explicitly copied to %ebx from %esi before "function@plt" calls:<br><br><...><br> 0xde635e06 <+870>: mov %esi,%ebx <--------------- %ebx is overwritten here<br> 0xde635e08 <+872>: call 0xde60f7d0 <_ZSt3minIiERKT_S2_S2_@plt><br>
<br>After that, if we use %ebx to reference local variables, we're in trouble, as we're overwriting GOT with garbage:<br><...><br> 0xde635e3a <+922>: mov %edi,%eax<br> 0xde635e3c <+924>: shr $0x3,%eax<br>
0xde635e3f <+927>: mov %eax,0x24(%ebx) <--------- GOT is filled with garbage.</div><div><br></div><div><br></div><div>On Tue, Jul 10, 2012 at 9:45 PM, Chad Rosier <span dir="ltr"><<a href="mailto:mcrosier@apple.com" target="_blank">mcrosier@apple.com</a>></span> wrote:</div>
<div><div class="gmail_quote"><blockquote class="gmail_quote" style="margin-top: 0px; margin-right: 0px; margin-bottom: 0px; margin-left: 0.8ex; border-left-width: 1px; border-left-color: rgb(204, 204, 204); border-left-style: solid; padding-left: 1ex; position: static; z-index: auto; ">Author: mcrosier<br>
Date: Tue Jul 10 12:45:53 2012<br>
New Revision: 160002<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=160002&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=160002&view=rev</a><br>
Log:<br>
Add support for dynamic stack realignment in the presence of dynamic allocas on<br>
X86. Basically, this is a reapplication of r158087 with a few fixes.<br>
<br>
Specifically, (1) the stack pointer is restored from the base pointer before<br>
popping callee-saved registers and (2) in obscure cases (see comments in patch)<br>
we must cache the value of the original stack adjustment in the prologue and<br>
apply it in the epilogue.<br>
<br>
<a href="rdar://11496434">rdar://11496434</a><br>
<br>
Modified:<br>
llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h<br>
llvm/trunk/lib/Target/X86/X86FrameLowering.cpp<br>
llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp<br>
llvm/trunk/lib/Target/X86/X86RegisterInfo.h<br>
llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll<br>
llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll<br>
llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll<br>
<br>
Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original)<br>
+++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Tue Jul 10 12:45:53 2012<br>
@@ -215,6 +215,10 @@<br>
/// just allocate them normally.<br>
bool UseLocalStackAllocationBlock;<br>
<br>
+ /// After the stack pointer has been restore from the base pointer we<br>
+ /// use a cached adjusment. Currently only used for x86.<br>
+ int64_t BPAdj;<br>
+<br>
public:<br>
explicit MachineFrameInfo(const TargetFrameLowering &tfi) : TFI(tfi) {<br>
StackSize = NumFixedObjects = OffsetAdjustment = MaxAlignment = 0;<br>
@@ -230,6 +234,7 @@<br>
LocalFrameSize = 0;<br>
LocalFrameMaxAlign = 0;<br>
UseLocalStackAllocationBlock = false;<br>
+ BPAdj = 0;<br>
}<br>
<br>
/// hasStackObjects - Return true if there are any stack objects in this<br>
@@ -538,6 +543,16 @@<br>
<br>
void setCalleeSavedInfoValid(bool v) { CSIValid = v; }<br>
<br>
+ /// setBasePtrStackAdjustment - If we're restoring the stack pointer from the<br>
+ /// base pointer, due to dynamic stack realignment + VLAs, we cache the<br>
+ /// number of bytes initially allocated for the stack frame. In obscure<br>
+ /// cases (e.g., tail calls with byval argument and no stack protector), the<br>
+ /// stack gets adjusted outside of the prolog, but these shouldn't be<br>
+ /// considered when restoring from the base pointer. Currently, this is only<br>
+ /// needed for x86.<br>
+ void setBasePtrStackAdjustment(int64_t adj) { BPAdj = adj; }<br>
+ int64_t getBasePtrStackAdjustment() const { return BPAdj; }<br>
+<br>
/// getPristineRegs - Return a set of physical registers that are pristine on<br>
/// entry to the MBB.<br>
///<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86FrameLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FrameLowering.cpp?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FrameLowering.cpp?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86FrameLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86FrameLowering.cpp Tue Jul 10 12:45:53 2012<br>
@@ -650,6 +650,7 @@<br>
unsigned SlotSize = RegInfo->getSlotSize();<br>
unsigned FramePtr = RegInfo->getFrameRegister(MF);<br>
unsigned StackPtr = RegInfo->getStackRegister();<br>
+ unsigned BasePtr = RegInfo->getBaseRegister();<br>
DebugLoc DL;<br>
<br>
// If we're forcing a stack realignment we can't rely on just the frame<br>
@@ -913,6 +914,20 @@<br>
emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit,<br>
UseLEA, TII, *RegInfo);<br>
<br>
+ // If we need a base pointer, set it up here. It's whatever the value<br>
+ // of the stack pointer is at this point. Any variable size objects<br>
+ // will be allocated after this, so we can still use the base pointer<br>
+ // to reference locals.<br>
+ if (RegInfo->hasBasePointer(MF)) {<br>
+ // Update the frame pointer with the current stack pointer.<br>
+ unsigned Opc = Is64Bit ? X86::MOV64rr : X86::MOV32rr;<br>
+ BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)<br>
+ .addReg(StackPtr)<br>
+ .setMIFlag(MachineInstr::FrameSetup);<br>
+<br>
+ MFI->setBasePtrStackAdjustment(NumBytes);<br>
+ }<br>
+<br>
if (( (!HasFP && NumBytes) || PushedRegs) && needsFrameMoves) {<br>
// Mark end of stack pointer adjustment.<br>
MCSymbol *Label = MMI.getContext().CreateTempSymbol();<br>
@@ -960,6 +975,7 @@<br>
unsigned SlotSize = RegInfo->getSlotSize();<br>
unsigned FramePtr = RegInfo->getFrameRegister(MF);<br>
unsigned StackPtr = RegInfo->getStackRegister();<br>
+ unsigned BasePtr = RegInfo->getBaseRegister();<br>
<br>
switch (RetOpcode) {<br>
default:<br>
@@ -1029,6 +1045,15 @@<br>
if (NumBytes || MFI->hasVarSizedObjects())<br>
mergeSPUpdatesUp(MBB, MBBI, StackPtr, &NumBytes);<br>
<br>
+ // Restore the SP from the BP, if necessary.<br>
+ if (RegInfo->hasBasePointer(MF)) {<br>
+ BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),<br>
+ StackPtr).addReg(BasePtr);<br>
+<br>
+ // When restoring from the BP we must use a cached SP adjustment.<br>
+ NumBytes = MFI->getBasePtrStackAdjustment();<br>
+ }<br>
+<br>
// If dynamic alloca is used, then reset esp to point to the last callee-saved<br>
// slot before popping them off! Same applies for the case, when stack was<br>
// realigned.<br>
@@ -1147,7 +1172,16 @@<br>
int Offset = MFI->getObjectOffset(FI) - getOffsetOfLocalArea();<br>
uint64_t StackSize = MFI->getStackSize();<br>
<br>
- if (RegInfo->needsStackRealignment(MF)) {<br>
+ if (RegInfo->hasBasePointer(MF)) {<br>
+ assert (hasFP(MF) && "VLAs and dynamic stack realign, but no FP?!");<br>
+ if (FI < 0) {<br>
+ // Skip the saved EBP.<br>
+ return Offset + RegInfo->getSlotSize();<br>
+ } else {<br>
+ assert((-(Offset + StackSize)) % MFI->getObjectAlignment(FI) == 0);<br>
+ return Offset + StackSize;<br>
+ }<br>
+ } else if (RegInfo->needsStackRealignment(MF)) {<br>
if (FI < 0) {<br>
// Skip the saved EBP.<br>
return Offset + RegInfo->getSlotSize();<br>
@@ -1178,9 +1212,14 @@<br>
const X86RegisterInfo *RegInfo =<br>
static_cast<const X86RegisterInfo*>(MF.getTarget().getRegisterInfo());<br>
// We can't calculate offset from frame pointer if the stack is realigned,<br>
- // so enforce usage of stack pointer.<br>
- FrameReg = (RegInfo->needsStackRealignment(MF)) ?<br>
- RegInfo->getStackRegister() : RegInfo->getFrameRegister(MF);<br>
+ // so enforce usage of stack/base pointer. The base pointer is used when we<br>
+ // have dynamic allocas in addition to dynamic realignment.<br>
+ if (RegInfo->hasBasePointer(MF))<br>
+ FrameReg = RegInfo->getBaseRegister();<br>
+ else if (RegInfo->needsStackRealignment(MF))<br>
+ FrameReg = RegInfo->getStackRegister();<br>
+ else<br>
+ FrameReg = RegInfo->getFrameRegister(MF);<br>
return getFrameIndexOffset(MF, FI);<br>
}<br>
<br>
@@ -1317,6 +1356,10 @@<br>
"Slot for EBP register must be last in order to be found!");<br>
(void)FrameIdx;<br>
}<br>
+<br>
+ // Spill the BasePtr if it's used.<br>
+ if (RegInfo->hasBasePointer(MF))<br>
+ MF.getRegInfo().setPhysRegUsed(RegInfo->getBaseRegister());<br>
}<br>
<br>
static bool<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Tue Jul 10 12:45:53 2012<br>
@@ -50,6 +50,10 @@<br>
" needed for the function."),<br>
cl::init(false), cl::Hidden);<br>
<br>
+cl::opt<bool><br>
+EnableBasePointer("x86-use-base-pointer", cl::Hidden, cl::init(true),<br>
+ cl::desc("Enable use of a base pointer for complex stack frames"));<br>
+<br>
X86RegisterInfo::X86RegisterInfo(X86TargetMachine &tm,<br>
const TargetInstrInfo &tii)<br>
: X86GenRegisterInfo(tm.getSubtarget<X86Subtarget>().is64Bit()<br>
@@ -68,10 +72,12 @@<br>
SlotSize = 8;<br>
StackPtr = X86::RSP;<br>
FramePtr = X86::RBP;<br>
+ BasePtr = X86::RBX;<br>
} else {<br>
SlotSize = 4;<br>
StackPtr = X86::ESP;<br>
FramePtr = X86::EBP;<br>
+ BasePtr = X86::EBX;<br>
}<br>
}<br>
<br>
@@ -290,6 +296,20 @@<br>
Reserved.set(*I);<br>
}<br>
<br>
+ // Set the base-pointer register and its aliases as reserved if needed.<br>
+ if (hasBasePointer(MF)) {<br>
+ CallingConv::ID CC = MF.getFunction()->getCallingConv();<br>
+ const uint32_t* RegMask = getCallPreservedMask(CC);<br>
+ if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister()))<br>
+ report_fatal_error(<br>
+ "Stack realignment in presence of dynamic allocas is not supported with"<br>
+ "this calling convention.");<br>
+<br>
+ Reserved.set(getBaseRegister());<br>
+ for (MCSubRegIterator I(getBaseRegister(), this); I.isValid(); ++I)<br>
+ Reserved.set(*I);<br>
+ }<br>
+<br>
// Mark the segment registers as reserved.<br>
Reserved.set(X86::CS);<br>
Reserved.set(X86::SS);<br>
@@ -340,10 +360,36 @@<br>
// Stack Frame Processing methods<br>
//===----------------------------------------------------------------------===//<br>
<br>
+bool X86RegisterInfo::hasBasePointer(const MachineFunction &MF) const {<br>
+ const MachineFrameInfo *MFI = MF.getFrameInfo();<br>
+<br>
+ if (!EnableBasePointer)<br>
+ return false;<br>
+<br>
+ // When we need stack realignment and there are dynamic allocas, we can't<br>
+ // reference off of the stack pointer, so we reserve a base pointer.<br>
+ if (needsStackRealignment(MF) && MFI->hasVarSizedObjects())<br>
+ return true;<br>
+<br>
+ return false;<br>
+}<br>
+<br>
bool X86RegisterInfo::canRealignStack(const MachineFunction &MF) const {<br>
const MachineFrameInfo *MFI = MF.getFrameInfo();<br>
- return (MF.getTarget().Options.RealignStack &&<br>
- !MFI->hasVarSizedObjects());<br>
+ const MachineRegisterInfo *MRI = &MF.getRegInfo();<br>
+ if (!MF.getTarget().Options.RealignStack)<br>
+ return false;<br>
+<br>
+ // Stack realignment requires a frame pointer. If we already started<br>
+ // register allocation with frame pointer elimination, it is too late now.<br>
+ if (!MRI->canReserveReg(FramePtr))<br>
+ return false;<br>
+<br>
+ // If a base pointer is necessary. Check that it isn't too late to reserve<br>
+ // it.<br>
+ if (MFI->hasVarSizedObjects())<br>
+ return MRI->canReserveReg(BasePtr);<br>
+ return true;<br>
}<br>
<br>
bool X86RegisterInfo::needsStackRealignment(const MachineFunction &MF) const {<br>
@@ -353,13 +399,6 @@<br>
bool requiresRealignment = ((MFI->getMaxAlignment() > StackAlign) ||<br>
F->hasFnAttr(Attribute::StackAlignment));<br>
<br>
- // FIXME: Currently we don't support stack realignment for functions with<br>
- // variable-sized allocas.<br>
- // FIXME: It's more complicated than this...<br>
- if (0 && requiresRealignment && MFI->hasVarSizedObjects())<br>
- report_fatal_error(<br>
- "Stack realignment in presence of dynamic allocas is not supported");<br>
-<br>
// If we've requested that we force align the stack do so now.<br>
if (ForceStackAlign)<br>
return canRealignStack(MF);<br>
@@ -499,7 +538,9 @@<br>
<br>
unsigned Opc = MI.getOpcode();<br>
bool AfterFPPop = Opc == X86::TAILJMPm64 || Opc == X86::TAILJMPm;<br>
- if (needsStackRealignment(MF))<br>
+ if (hasBasePointer(MF))<br>
+ BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister());<br>
+ else if (needsStackRealignment(MF))<br>
BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr);<br>
else if (AfterFPPop)<br>
BasePtr = StackPtr;<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.h?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.h?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.h (original)<br>
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.h Tue Jul 10 12:45:53 2012<br>
@@ -50,6 +50,11 @@<br>
///<br>
unsigned FramePtr;<br>
<br>
+ /// BasePtr - X86 physical register used as a base ptr in complex stack<br>
+ /// frames. I.e., when we need a 3rd base, not just SP and FP, due to<br>
+ /// variable size stack objects.<br>
+ unsigned BasePtr;<br>
+<br>
public:<br>
X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);<br>
<br>
@@ -106,6 +111,8 @@<br>
/// register scavenger to determine what registers are free.<br>
BitVector getReservedRegs(const MachineFunction &MF) const;<br>
<br>
+ bool hasBasePointer(const MachineFunction &MF) const;<br>
+<br>
bool canRealignStack(const MachineFunction &MF) const;<br>
<br>
bool needsStackRealignment(const MachineFunction &MF) const;<br>
@@ -123,6 +130,7 @@<br>
// Debug information queries.<br>
unsigned getFrameRegister(const MachineFunction &MF) const;<br>
unsigned getStackRegister() const { return StackPtr; }<br>
+ unsigned getBaseRegister() const { return BasePtr; }<br>
// FIXME: Move to FrameInfok<br>
unsigned getSlotSize() const { return SlotSize; }<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll Tue Jul 10 12:45:53 2012<br>
@@ -15,5 +15,6 @@<br>
call void @bar(<2 x i64>* %p)<br>
ret void<br>
; CHECK: foo2<br>
+; CHECK: andl $-32, %esp<br>
; CHECK: andl $-32, %eax<br>
}<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll Tue Jul 10 12:45:53 2012<br>
@@ -15,5 +15,6 @@<br>
call void @bar(<2 x i64>* %p)<br>
ret void<br>
; CHECK: foo2<br>
+; CHECK: andq $-32, %rsp<br>
; CHECK: andq $-32, %rax<br>
}<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll Tue Jul 10 12:45:53 2012<br>
@@ -17,10 +17,15 @@<br>
<br>
define i64 @g(i32 %i) nounwind {<br>
; CHECK: g:<br>
-; CHECK: pushl<br>
+; CHECK: pushl %ebp<br>
; CHECK-NEXT: movl %esp, %ebp<br>
+; CHECK-NEXT: andl $-32, %esp<br>
; CHECK-NEXT: pushl<br>
-; CHECK-NEXT: subl $20, %esp<br>
+; CHECK-NEXT: pushl<br>
+; CHECK-NEXT: subl $24, %esp<br>
+;<br>
+; Now setup the base pointer (%ebx).<br>
+; CHECK-NEXT: movl %esp, %ebx<br>
; CHECK-NOT: {{[^ ,]*}}, %esp<br>
;<br>
; The next adjustment of the stack is due to the alloca.<br>
@@ -41,12 +46,18 @@<br>
; CHECK-NEXT: addl $32, %esp<br>
; CHECK-NOT: {{[^ ,]*}}, %esp<br>
;<br>
-; Finally we nede to restore %esp from %ebp, the alloca prevents us from<br>
-; restoring it directly.<br>
+; Restore %esp from %ebx (base pointer) so we can pop the callee-saved<br>
+; registers. This is the state prior to the allocation of VLAs.<br>
; CHECK-NOT: popl<br>
-; CHECK: leal -4(%ebp), %esp<br>
+; CHECK: movl %ebx, %esp<br>
+; CHECK-NEXT: addl $24, %esp<br>
; CHECK-NEXT: popl<br>
; CHECK-NEXT: popl<br>
+;<br>
+; Finally we need to restore %esp from %ebp due to dynamic stack<br>
+; realignment.<br>
+; CHECK-NEXT: movl %ebp, %esp<br>
+; CHECK-NEXT: popl %ebp<br>
; CHECK-NEXT: ret<br>
<br>
entry:<br>
<br>
<br>
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</blockquote></div><br><br clear="all"><div><br></div>-- <br><div>Alexey Samsonov, MSK</div><br>
</div>
</blockquote></div><br></div></body></html>