<br><br><div class="gmail_quote">On Thu, Jul 12, 2012 at 12:54 AM, Chad Rosier <span dir="ltr"><<a href="mailto:mcrosier@apple.com" target="_blank">mcrosier@apple.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div style="word-wrap:break-word">Hi Alexey,<div>Comments inline.</div><div><br><div><div><div class="h5"><div>On Jul 11, 2012, at 7:47 AM, Alexey Samsonov wrote:</div><br><blockquote type="cite"><div>Hello, Chad!</div><div>
<br></div><div>Thanks for working on this! I hope this could help with <a href="http://llvm.org/bugs/show_bug.cgi?id=11468" target="_blank">http://llvm.org/bugs/show_bug.cgi?id=11468</a>,</div><div>that is, the issue that LLVM incorrectly handles exceptions if stack gets realigned. While you're at it,</div>
<div>could you help me with some advice?</div><div><br></div><div>Simple reproducer is:</div><div><div>$ cat t2.cc </div><div>void Throw(const char& arg) {</div><div> volatile int __attribute__((aligned(32))) n = 0; // aligned stack variable</div>
<div> asm volatile ("nop" : : : "r14"); // force to save %r14 on stack</div><div> throw arg;</div><div>}</div></div><div>$ clang++ -O2 -c t2.cc</div><div><div>$ objdump -d t2.o</div><div><...></div>
<div>0000000000000000 <_Z5ThrowRKc>:</div><div> 0:<span style="white-space:pre-wrap"> </span>55 <span style="white-space:pre-wrap"> </span>push %rbp</div><div>
1:<span style="white-space:pre-wrap"> </span>48 89 e5 <span style="white-space:pre-wrap"> </span>mov %rsp,%rbp</div><div> 4:<span style="white-space:pre-wrap"> </span>48 81 e4 e0 ff ff ff <span style="white-space:pre-wrap"> </span>and $0xffffffffffffffe0,%rsp <--- stack gets realigned here</div>
<div> b:<span style="white-space:pre-wrap"> </span>41 57 <span style="white-space:pre-wrap"> </span>push %r15</div><div> d:<span style="white-space:pre-wrap"> </span>41 56 <span style="white-space:pre-wrap"> </span>push %r14</div>
<div> f:<span style="white-space:pre-wrap"> </span>53 <span style="white-space:pre-wrap"> </span>push %rbx</div><div> 10:<span style="white-space:pre-wrap"> </span>48 83 ec 28 <span style="white-space:pre-wrap"> </span>sub $0x28,%rsp</div>
<div> 14:<span style="white-space:pre-wrap"> </span>48 89 e3 <span style="white-space:pre-wrap"> </span>mov %rsp,%rbx</div><div> 17:<span style="white-space:pre-wrap"> </span>49 89 ff <span style="white-space:pre-wrap"> </span>mov %rdi,%r15</div>
<div><...></div></div><div><div>$ readelf -wF t2.o</div><div>Contents of the .eh_frame section:</div><div><....></div><div>00000018 0000001c 0000001c FDE cie=00000000 pc=00000000..0000003f</div><div> LOC CFA rbx rbp r14 r15 ra </div>
<div>0000000000000000 rsp+8 u u u u c-8 </div><div>0000000000000001 rsp+16 u c-16 u u c-8 </div><div>0000000000000004 rbp+16 u c-16 u u c-8 </div><div>0000000000000017 rbp+16 c-40 c-16 c-32 c-24 c-8</div>
</div><div><br></div><div>The last line means that the location of "r15" is "c-24" = "CFA-24" = "rbp+16-24" = "rbp - 8".</div><div>In the same way, location of "r14" is assumed to be "rbp - 16", etc.</div>
<div><br></div><div>The problem is that X86FrameLowering::emitCalleeSavedFrameMoves emits DWARF for .eh_frame</div><div>that defines the locations of all registers by setting offset from frame pointer (%rbp). It is just wrong if</div>
<div>stack gets realigned (see the marked line in objdump). For example, gcc emits DWARF arithmetical</div><div>expressions to calculate the correct locations of saved registers if stack is realigned.</div></blockquote><div>
<br></div></div></div><div>Yes, this is very wrong.</div><div class="im"><br><blockquote type="cite">
<div>I wonder if we can solve this issue using the base pointer (%rbx) introduced by your change. </div></blockquote><div><br></div></div><div>Yes, I think so.</div><div class="im"><br><blockquote type="cite"><div>Here's what can be done:</div>
<div>1) make X86RegisterInfo::hasBasePointer() always return "true" if stack needs realignment (even if there are no dynamic allocas).</div></blockquote><div><br></div></div><div>How about just when we have stack realignment and we need frame moves (i.e., when we have debug info or need unwind table entries)?</div>
<div class="im"><div><div><br></div></div><blockquote type="cite">
<div>2) after we calculate the base pointer (mov %rsp, %rbx), emit the locations of all saved registers for .eh_frame DWARF section</div><div>as "%rbx + offset" (instead of "%rbp + offset").</div></blockquote>
<div><br></div></div><div>That makes sense.</div><div class="im"><br><blockquote type="cite"><div>
3) the only exception is the "old" value of %rbp. (which is pushed to stack before it is realigned). But, assuming that the function prologue</div><div>always starts with "push %rbp; mov %rsp, %rpb", we may state that the address of "old" %rsp value can be loaded from address currently</div>
<div>stored in "%rbp". This means emitting "DW_CFA_register" register rule instruction. It is not currently implemented in LLVM, but I think it's not</div><div>that hard to support this.</div></blockquote>
<div><br></div></div><div>I believe you're making a correct assumption (but keep in mind this is my first massive hack at the x86 frame lowering code, so I could be wrong).</div><div class="im"><br><blockquote type="cite">
<div>Does all this looks reasonable to you?</div></blockquote><div><br></div></div><div>It does indeed. I don't have time to attack this now, but feel free to CC me on patches.</div></div></div></div></blockquote><div>
<br></div><div>Cool, I hope to start implementing this soon.</div><div> </div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div style="word-wrap:break-word"><div><div>
<div><br></div><div> Regards,</div><div> Chad</div><div><div class="h5"><br><blockquote type="cite"><br><div class="gmail_quote">On Tue, Jul 10, 2012 at 9:45 PM, Chad Rosier <span dir="ltr"><<a href="mailto:mcrosier@apple.com" target="_blank">mcrosier@apple.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Author: mcrosier<br>
Date: Tue Jul 10 12:45:53 2012<br>
New Revision: 160002<br>
<br>
URL: <a href="http://llvm.org/viewvc/llvm-project?rev=160002&view=rev" target="_blank">http://llvm.org/viewvc/llvm-project?rev=160002&view=rev</a><br>
Log:<br>
Add support for dynamic stack realignment in the presence of dynamic allocas on<br>
X86. Basically, this is a reapplication of r158087 with a few fixes.<br>
<br>
Specifically, (1) the stack pointer is restored from the base pointer before<br>
popping callee-saved registers and (2) in obscure cases (see comments in patch)<br>
we must cache the value of the original stack adjustment in the prologue and<br>
apply it in the epilogue.<br>
<br>
<a>rdar://11496434</a><br>
<br>
Modified:<br>
llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h<br>
llvm/trunk/lib/Target/X86/X86FrameLowering.cpp<br>
llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp<br>
llvm/trunk/lib/Target/X86/X86RegisterInfo.h<br>
llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll<br>
llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll<br>
llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll<br>
<br>
Modified: llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h (original)<br>
+++ llvm/trunk/include/llvm/CodeGen/MachineFrameInfo.h Tue Jul 10 12:45:53 2012<br>
@@ -215,6 +215,10 @@<br>
/// just allocate them normally.<br>
bool UseLocalStackAllocationBlock;<br>
<br>
+ /// After the stack pointer has been restore from the base pointer we<br>
+ /// use a cached adjusment. Currently only used for x86.<br>
+ int64_t BPAdj;<br>
+<br>
public:<br>
explicit MachineFrameInfo(const TargetFrameLowering &tfi) : TFI(tfi) {<br>
StackSize = NumFixedObjects = OffsetAdjustment = MaxAlignment = 0;<br>
@@ -230,6 +234,7 @@<br>
LocalFrameSize = 0;<br>
LocalFrameMaxAlign = 0;<br>
UseLocalStackAllocationBlock = false;<br>
+ BPAdj = 0;<br>
}<br>
<br>
/// hasStackObjects - Return true if there are any stack objects in this<br>
@@ -538,6 +543,16 @@<br>
<br>
void setCalleeSavedInfoValid(bool v) { CSIValid = v; }<br>
<br>
+ /// setBasePtrStackAdjustment - If we're restoring the stack pointer from the<br>
+ /// base pointer, due to dynamic stack realignment + VLAs, we cache the<br>
+ /// number of bytes initially allocated for the stack frame. In obscure<br>
+ /// cases (e.g., tail calls with byval argument and no stack protector), the<br>
+ /// stack gets adjusted outside of the prolog, but these shouldn't be<br>
+ /// considered when restoring from the base pointer. Currently, this is only<br>
+ /// needed for x86.<br>
+ void setBasePtrStackAdjustment(int64_t adj) { BPAdj = adj; }<br>
+ int64_t getBasePtrStackAdjustment() const { return BPAdj; }<br>
+<br>
/// getPristineRegs - Return a set of physical registers that are pristine on<br>
/// entry to the MBB.<br>
///<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86FrameLowering.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FrameLowering.cpp?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86FrameLowering.cpp?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86FrameLowering.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86FrameLowering.cpp Tue Jul 10 12:45:53 2012<br>
@@ -650,6 +650,7 @@<br>
unsigned SlotSize = RegInfo->getSlotSize();<br>
unsigned FramePtr = RegInfo->getFrameRegister(MF);<br>
unsigned StackPtr = RegInfo->getStackRegister();<br>
+ unsigned BasePtr = RegInfo->getBaseRegister();<br>
DebugLoc DL;<br>
<br>
// If we're forcing a stack realignment we can't rely on just the frame<br>
@@ -913,6 +914,20 @@<br>
emitSPUpdate(MBB, MBBI, StackPtr, -(int64_t)NumBytes, Is64Bit,<br>
UseLEA, TII, *RegInfo);<br>
<br>
+ // If we need a base pointer, set it up here. It's whatever the value<br>
+ // of the stack pointer is at this point. Any variable size objects<br>
+ // will be allocated after this, so we can still use the base pointer<br>
+ // to reference locals.<br>
+ if (RegInfo->hasBasePointer(MF)) {<br>
+ // Update the frame pointer with the current stack pointer.<br>
+ unsigned Opc = Is64Bit ? X86::MOV64rr : X86::MOV32rr;<br>
+ BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)<br>
+ .addReg(StackPtr)<br>
+ .setMIFlag(MachineInstr::FrameSetup);<br>
+<br>
+ MFI->setBasePtrStackAdjustment(NumBytes);<br>
+ }<br>
+<br>
if (( (!HasFP && NumBytes) || PushedRegs) && needsFrameMoves) {<br>
// Mark end of stack pointer adjustment.<br>
MCSymbol *Label = MMI.getContext().CreateTempSymbol();<br>
@@ -960,6 +975,7 @@<br>
unsigned SlotSize = RegInfo->getSlotSize();<br>
unsigned FramePtr = RegInfo->getFrameRegister(MF);<br>
unsigned StackPtr = RegInfo->getStackRegister();<br>
+ unsigned BasePtr = RegInfo->getBaseRegister();<br>
<br>
switch (RetOpcode) {<br>
default:<br>
@@ -1029,6 +1045,15 @@<br>
if (NumBytes || MFI->hasVarSizedObjects())<br>
mergeSPUpdatesUp(MBB, MBBI, StackPtr, &NumBytes);<br>
<br>
+ // Restore the SP from the BP, if necessary.<br>
+ if (RegInfo->hasBasePointer(MF)) {<br>
+ BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr),<br>
+ StackPtr).addReg(BasePtr);<br>
+<br>
+ // When restoring from the BP we must use a cached SP adjustment.<br>
+ NumBytes = MFI->getBasePtrStackAdjustment();<br>
+ }<br>
+<br>
// If dynamic alloca is used, then reset esp to point to the last callee-saved<br>
// slot before popping them off! Same applies for the case, when stack was<br>
// realigned.<br>
@@ -1147,7 +1172,16 @@<br>
int Offset = MFI->getObjectOffset(FI) - getOffsetOfLocalArea();<br>
uint64_t StackSize = MFI->getStackSize();<br>
<br>
- if (RegInfo->needsStackRealignment(MF)) {<br>
+ if (RegInfo->hasBasePointer(MF)) {<br>
+ assert (hasFP(MF) && "VLAs and dynamic stack realign, but no FP?!");<br>
+ if (FI < 0) {<br>
+ // Skip the saved EBP.<br>
+ return Offset + RegInfo->getSlotSize();<br>
+ } else {<br>
+ assert((-(Offset + StackSize)) % MFI->getObjectAlignment(FI) == 0);<br>
+ return Offset + StackSize;<br>
+ }<br>
+ } else if (RegInfo->needsStackRealignment(MF)) {<br>
if (FI < 0) {<br>
// Skip the saved EBP.<br>
return Offset + RegInfo->getSlotSize();<br>
@@ -1178,9 +1212,14 @@<br>
const X86RegisterInfo *RegInfo =<br>
static_cast<const X86RegisterInfo*>(MF.getTarget().getRegisterInfo());<br>
// We can't calculate offset from frame pointer if the stack is realigned,<br>
- // so enforce usage of stack pointer.<br>
- FrameReg = (RegInfo->needsStackRealignment(MF)) ?<br>
- RegInfo->getStackRegister() : RegInfo->getFrameRegister(MF);<br>
+ // so enforce usage of stack/base pointer. The base pointer is used when we<br>
+ // have dynamic allocas in addition to dynamic realignment.<br>
+ if (RegInfo->hasBasePointer(MF))<br>
+ FrameReg = RegInfo->getBaseRegister();<br>
+ else if (RegInfo->needsStackRealignment(MF))<br>
+ FrameReg = RegInfo->getStackRegister();<br>
+ else<br>
+ FrameReg = RegInfo->getFrameRegister(MF);<br>
return getFrameIndexOffset(MF, FI);<br>
}<br>
<br>
@@ -1317,6 +1356,10 @@<br>
"Slot for EBP register must be last in order to be found!");<br>
(void)FrameIdx;<br>
}<br>
+<br>
+ // Spill the BasePtr if it's used.<br>
+ if (RegInfo->hasBasePointer(MF))<br>
+ MF.getRegInfo().setPhysRegUsed(RegInfo->getBaseRegister());<br>
}<br>
<br>
static bool<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)<br>
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Tue Jul 10 12:45:53 2012<br>
@@ -50,6 +50,10 @@<br>
" needed for the function."),<br>
cl::init(false), cl::Hidden);<br>
<br>
+cl::opt<bool><br>
+EnableBasePointer("x86-use-base-pointer", cl::Hidden, cl::init(true),<br>
+ cl::desc("Enable use of a base pointer for complex stack frames"));<br>
+<br>
X86RegisterInfo::X86RegisterInfo(X86TargetMachine &tm,<br>
const TargetInstrInfo &tii)<br>
: X86GenRegisterInfo(tm.getSubtarget<X86Subtarget>().is64Bit()<br>
@@ -68,10 +72,12 @@<br>
SlotSize = 8;<br>
StackPtr = X86::RSP;<br>
FramePtr = X86::RBP;<br>
+ BasePtr = X86::RBX;<br>
} else {<br>
SlotSize = 4;<br>
StackPtr = X86::ESP;<br>
FramePtr = X86::EBP;<br>
+ BasePtr = X86::EBX;<br>
}<br>
}<br>
<br>
@@ -290,6 +296,20 @@<br>
Reserved.set(*I);<br>
}<br>
<br>
+ // Set the base-pointer register and its aliases as reserved if needed.<br>
+ if (hasBasePointer(MF)) {<br>
+ CallingConv::ID CC = MF.getFunction()->getCallingConv();<br>
+ const uint32_t* RegMask = getCallPreservedMask(CC);<br>
+ if (MachineOperand::clobbersPhysReg(RegMask, getBaseRegister()))<br>
+ report_fatal_error(<br>
+ "Stack realignment in presence of dynamic allocas is not supported with"<br>
+ "this calling convention.");<br>
+<br>
+ Reserved.set(getBaseRegister());<br>
+ for (MCSubRegIterator I(getBaseRegister(), this); I.isValid(); ++I)<br>
+ Reserved.set(*I);<br>
+ }<br>
+<br>
// Mark the segment registers as reserved.<br>
Reserved.set(X86::CS);<br>
Reserved.set(X86::SS);<br>
@@ -340,10 +360,36 @@<br>
// Stack Frame Processing methods<br>
//===----------------------------------------------------------------------===//<br>
<br>
+bool X86RegisterInfo::hasBasePointer(const MachineFunction &MF) const {<br>
+ const MachineFrameInfo *MFI = MF.getFrameInfo();<br>
+<br>
+ if (!EnableBasePointer)<br>
+ return false;<br>
+<br>
+ // When we need stack realignment and there are dynamic allocas, we can't<br>
+ // reference off of the stack pointer, so we reserve a base pointer.<br>
+ if (needsStackRealignment(MF) && MFI->hasVarSizedObjects())<br>
+ return true;<br>
+<br>
+ return false;<br>
+}<br>
+<br>
bool X86RegisterInfo::canRealignStack(const MachineFunction &MF) const {<br>
const MachineFrameInfo *MFI = MF.getFrameInfo();<br>
- return (MF.getTarget().Options.RealignStack &&<br>
- !MFI->hasVarSizedObjects());<br>
+ const MachineRegisterInfo *MRI = &MF.getRegInfo();<br>
+ if (!MF.getTarget().Options.RealignStack)<br>
+ return false;<br>
+<br>
+ // Stack realignment requires a frame pointer. If we already started<br>
+ // register allocation with frame pointer elimination, it is too late now.<br>
+ if (!MRI->canReserveReg(FramePtr))<br>
+ return false;<br>
+<br>
+ // If a base pointer is necessary. Check that it isn't too late to reserve<br>
+ // it.<br>
+ if (MFI->hasVarSizedObjects())<br>
+ return MRI->canReserveReg(BasePtr);<br>
+ return true;<br>
}<br>
<br>
bool X86RegisterInfo::needsStackRealignment(const MachineFunction &MF) const {<br>
@@ -353,13 +399,6 @@<br>
bool requiresRealignment = ((MFI->getMaxAlignment() > StackAlign) ||<br>
F->hasFnAttr(Attribute::StackAlignment));<br>
<br>
- // FIXME: Currently we don't support stack realignment for functions with<br>
- // variable-sized allocas.<br>
- // FIXME: It's more complicated than this...<br>
- if (0 && requiresRealignment && MFI->hasVarSizedObjects())<br>
- report_fatal_error(<br>
- "Stack realignment in presence of dynamic allocas is not supported");<br>
-<br>
// If we've requested that we force align the stack do so now.<br>
if (ForceStackAlign)<br>
return canRealignStack(MF);<br>
@@ -499,7 +538,9 @@<br>
<br>
unsigned Opc = MI.getOpcode();<br>
bool AfterFPPop = Opc == X86::TAILJMPm64 || Opc == X86::TAILJMPm;<br>
- if (needsStackRealignment(MF))<br>
+ if (hasBasePointer(MF))<br>
+ BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister());<br>
+ else if (needsStackRealignment(MF))<br>
BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr);<br>
else if (AfterFPPop)<br>
BasePtr = StackPtr;<br>
<br>
Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.h<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.h?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.h?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.h (original)<br>
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.h Tue Jul 10 12:45:53 2012<br>
@@ -50,6 +50,11 @@<br>
///<br>
unsigned FramePtr;<br>
<br>
+ /// BasePtr - X86 physical register used as a base ptr in complex stack<br>
+ /// frames. I.e., when we need a 3rd base, not just SP and FP, due to<br>
+ /// variable size stack objects.<br>
+ unsigned BasePtr;<br>
+<br>
public:<br>
X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii);<br>
<br>
@@ -106,6 +111,8 @@<br>
/// register scavenger to determine what registers are free.<br>
BitVector getReservedRegs(const MachineFunction &MF) const;<br>
<br>
+ bool hasBasePointer(const MachineFunction &MF) const;<br>
+<br>
bool canRealignStack(const MachineFunction &MF) const;<br>
<br>
bool needsStackRealignment(const MachineFunction &MF) const;<br>
@@ -123,6 +130,7 @@<br>
// Debug information queries.<br>
unsigned getFrameRegister(const MachineFunction &MF) const;<br>
unsigned getStackRegister() const { return StackPtr; }<br>
+ unsigned getBaseRegister() const { return BasePtr; }<br>
// FIXME: Move to FrameInfok<br>
unsigned getSlotSize() const { return SlotSize; }<br>
<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/alloca-align-rounding-32.ll Tue Jul 10 12:45:53 2012<br>
@@ -15,5 +15,6 @@<br>
call void @bar(<2 x i64>* %p)<br>
ret void<br>
; CHECK: foo2<br>
+; CHECK: andl $-32, %esp<br>
; CHECK: andl $-32, %eax<br>
}<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/alloca-align-rounding.ll Tue Jul 10 12:45:53 2012<br>
@@ -15,5 +15,6 @@<br>
call void @bar(<2 x i64>* %p)<br>
ret void<br>
; CHECK: foo2<br>
+; CHECK: andq $-32, %rsp<br>
; CHECK: andq $-32, %rax<br>
}<br>
<br>
Modified: llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll<br>
URL: <a href="http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll?rev=160002&r1=160001&r2=160002&view=diff" target="_blank">http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll?rev=160002&r1=160001&r2=160002&view=diff</a><br>
==============================================================================<br>
--- llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll (original)<br>
+++ llvm/trunk/test/CodeGen/X86/force-align-stack-alloca.ll Tue Jul 10 12:45:53 2012<br>
@@ -17,10 +17,15 @@<br>
<br>
define i64 @g(i32 %i) nounwind {<br>
; CHECK: g:<br>
-; CHECK: pushl<br>
+; CHECK: pushl %ebp<br>
; CHECK-NEXT: movl %esp, %ebp<br>
+; CHECK-NEXT: andl $-32, %esp<br>
; CHECK-NEXT: pushl<br>
-; CHECK-NEXT: subl $20, %esp<br>
+; CHECK-NEXT: pushl<br>
+; CHECK-NEXT: subl $24, %esp<br>
+;<br>
+; Now setup the base pointer (%ebx).<br>
+; CHECK-NEXT: movl %esp, %ebx<br>
; CHECK-NOT: {{[^ ,]*}}, %esp<br>
;<br>
; The next adjustment of the stack is due to the alloca.<br>
@@ -41,12 +46,18 @@<br>
; CHECK-NEXT: addl $32, %esp<br>
; CHECK-NOT: {{[^ ,]*}}, %esp<br>
;<br>
-; Finally we nede to restore %esp from %ebp, the alloca prevents us from<br>
-; restoring it directly.<br>
+; Restore %esp from %ebx (base pointer) so we can pop the callee-saved<br>
+; registers. This is the state prior to the allocation of VLAs.<br>
; CHECK-NOT: popl<br>
-; CHECK: leal -4(%ebp), %esp<br>
+; CHECK: movl %ebx, %esp<br>
+; CHECK-NEXT: addl $24, %esp<br>
; CHECK-NEXT: popl<br>
; CHECK-NEXT: popl<br>
+;<br>
+; Finally we need to restore %esp from %ebp due to dynamic stack<br>
+; realignment.<br>
+; CHECK-NEXT: movl %ebp, %esp<br>
+; CHECK-NEXT: popl %ebp<br>
; CHECK-NEXT: ret<br>
<br>
entry:<br>
<br>
<br>
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</blockquote></div><br><br clear="all"><div><br></div>-- <br><div>Alexey Samsonov, MSK</div><br>
</blockquote></div></div></div><br></div></div>
</blockquote></div><br><br clear="all"><div><br></div>-- <br><div>Alexey Samsonov, MSK</div><br>