+static <br>+SDValue Compact8x32ShuffleNode(ShuffleVectorSDNode *SVOp,<br>+ SelectionDAG &DAG) {<br><br>Please align the second line with the parentheses on the first. Also remove trailing space after static.<br>
<br>+ if (VT == MVT::v8i32 || VT == MVT::v8f32) {<br><br>Probably better to reverse the condition and early out instead of making almost the entire function be inside of an if statement.<br><br>Other than those things. LGTM.<br>
<br><br><div class="gmail_quote">On Mon, Jun 25, 2012 at 2:32 AM, Demikhovsky, Elena <span dir="ltr"><<a href="mailto:elena.demikhovsky@intel.com" target="_blank">elena.demikhovsky@intel.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div link="blue" vlink="purple" lang="EN-US">
<div>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">This is the new patch. All my comments/answers bellow.<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">Thank you for the review.<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p>
<p class="MsoNormal"><b><i><span style="color:teal">- Elena</span></i></b><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u><u></u></span></p>
<div style="border:none;border-top:solid #b5c4df 1.0pt;padding:3.0pt 0in 0in 0in">
<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Craig Topper [mailto:<a href="mailto:craig.topper@gmail.com" target="_blank">craig.topper@gmail.com</a>]
<br>
<b>Sent:</b> Monday, June 25, 2012 00:24<br>
<b>To:</b> Rotem, Nadav<br>
<b>Cc:</b> Demikhovsky, Elena; <a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank">llvm-commits@cs.uiuc.edu</a><br>
<b>Subject:</b> Re: [llvm-commits] Please review - One more shuffle optimization for AVX<u></u><u></u></span></p>
</div>
<p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal" style="margin-bottom:12.0pt"><u></u> <u></u></p>
<div><div class="im">
<p class="MsoNormal">On Sun, Jun 24, 2012 at 7:10 AM, Rotem, Nadav <<a href="mailto:nadav.rotem@intel.com" target="_blank">nadav.rotem@intel.com</a>> wrote:<u></u><u></u></p>
<p class="MsoNormal">CHECK: test18<br>
+; CHECK: vshufps<br>
+; CHECK: vshufps<br>
+; CHECK: vunpcklps<br>
<br>
Check for 'ret' at the end of the test.<span style="color:#1f497d"><u></u><u></u></span></p>
</div><p class="MsoNormal"><b><i><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">[Demikhovsky, Elena] Done<u></u><u></u></span></i></b></p><div class="im">
<p class="MsoNormal"><br>
<br>
DebugLoc dl) {<br>
- SDValue V = Insert128BitVector(DAG.getUNDEF(VT), V1, 0, DAG, dl);<br>
- return Insert128BitVector(V, V2, NumElems/2, DAG, dl);<br>
+ SDValue V = DAG.getNode(ISD::UNDEF, dl, VT);<br>
+<br>
+ if (V1.getOpcode() != ISD::UNDEF)<br>
+ V = Insert128BitVector(V, V1, 0, DAG, dl);<br>
+<br>
+ if (V2.getOpcode() != ISD::UNDEF)<br>
+ V = Insert128BitVector(V, V2, NumElems/2, DAG, dl);<br>
+<br>
+ return V;<br>
}<br>
<br>
No need to do this. Craig changed Insert128BitVector so that it checks for undef values.<br>
<br>
<span style="color:#1f497d"><u></u><u></u></span></p>
</div><p class="MsoNormal"><b><i><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">[Demikhovsky, Elena] Done<u></u><u></u></span></i></b></p><div class="im">
<p class="MsoNormal"><br>
+//<br>
+// Some special combinations that can be optimized<br>
+//<br>
<br>
What is special about these combinations ? <span style="color:#1f497d"><u></u><u></u></span></p>
</div><p class="MsoNormal"><b><i><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">[Demikhovsky, Elena] These combinations are frequently seen in many benchmarks. This optimization gives 10-20% on many WOLF benchmarks.<u></u><u></u></span></i></b></p>
<div class="im">
<p class="MsoNormal">Period at the end of the sentence. <span style="color:#1f497d"><u></u><u></u></span></p>
</div><p class="MsoNormal"><b><i><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">[Demikhovsky, Elena] Done<u></u><u></u></span></i></b></p><div class="im">
<p class="MsoNormal">Why is this function called Compact8x32ShuffleNode ?<span style="color:#1f497d"><u></u><u></u></span></p>
</div><p class="MsoNormal"><b><i><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">[Demikhovsky, Elena] You can suggest another name.<u></u><u></u></span></i></b></p><div class="im">
<p class="MsoNormal"><br>
<br>
+ if (VT.is256BitVector() && (NumElts == 8)) {<br>
<br>
You can check that VT = v8i32;<span style="color:#1f497d"><u></u><u></u></span></p>
</div><p class="MsoNormal"><b><i><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">[Demikhovsky, Elena] I changed to (VT==v8i32 || VT==v8f32)<u></u><u></u></span></i></b></p>
<div class="im">
<p class="MsoNormal"><br>
<br>
+ ArrayRef<int> Mask = SVOp->getMask();<br>
+ if (isUndefOrEqual(Mask[0], 0) &&<br>
+ isUndefOrEqual(Mask[1], 8) &&<br>
+ isUndefOrEqual(Mask[2], 2) &&<br>
+ isUndefOrEqual(Mask[3], 10) &&<br>
+ isUndefOrEqual(Mask[4], 4) &&<br>
+ isUndefOrEqual(Mask[5], 12) &&<br>
+ isUndefOrEqual(Mask[6], 6) &&<br>
+ isUndefOrEqual(Mask[7], 14)) {<br>
<br>
Please create a local array and iterate over it in a loop. Calling a function 16 times bloats the code.<span style="color:#1f497d"><u></u><u></u></span></p>
</div><p class="MsoNormal"><b><i><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">[Demikhovsky, Elena] Done<u></u><u></u></span></i></b></p><div class="im">
<p class="MsoNormal"><br>
<br>
+ int CompactionMask[] = {0, 2, -1, -1, 4, 6, -1, -1};<br>
+ SDValue Op0 = DAG.getVectorShuffle(VT, dl, SVOp->getOperand(0),<br>
+ DAG.getNode(ISD::UNDEF, dl, VT), CompactionMask);<br>
+ SDValue Op1 = DAG.getVectorShuffle(VT, dl, SVOp->getOperand(1),<br>
+ DAG.getNode(ISD::UNDEF, dl, VT), CompactionMask);<br>
+ int UnpackMask[] = {0, 8, 1, 9, 4, 12, 5, 13};<br>
<br>
Undef can be created once, not 4 times.<u></u><u></u></p>
</div><p class="MsoNormal"><b><i><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">[Demikhovsky, Elena] Done</span></i></b><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u><u></u></span></p>
<div><div class="im">
<p class="MsoNormal"><br>
Also mark those arrays as static const.<span style="color:#1f497d"><u></u><u></u></span></p>
</div><p class="MsoNormal"><b><i><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">[Demikhovsky, Elena] Done<u></u><u></u></span></i></b></p>
<p class="MsoNormal"><br>
<u></u><u></u></p>
</div>
<blockquote style="border:none;border-left:solid #cccccc 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-right:0in"><div class="im">
<p class="MsoNormal"><br>
<br>
+}<br>
+<br>
+<br>
<br>
Remove the extra line breaks.<u></u><u></u></p>
</div><p class="MsoNormal"><b><i><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">[Demikhovsky, Elena] Done</span></i></b><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u><u></u></span></p>
<div><div class="h5">
<div>
<div>
<p class="MsoNormal" style="margin-bottom:12.0pt"><br>
-----Original Message-----<br>
From: <a href="mailto:llvm-commits-bounces@cs.uiuc.edu" target="_blank">llvm-commits-bounces@cs.uiuc.edu</a> [mailto:<a href="mailto:llvm-commits-bounces@cs.uiuc.edu" target="_blank">llvm-commits-bounces@cs.uiuc.edu</a>] On Behalf Of Demikhovsky, Elena<br>
Sent: Sunday, June 24, 2012 15:30<br>
To: <a href="mailto:llvm-commits@cs.uiuc.edu" target="_blank">llvm-commits@cs.uiuc.edu</a><br>
Subject: [llvm-commits] Please review - One more shuffle optimization for AVX<br>
<br>
Hi,<br>
<br>
I have a bunch of optimizations for AVX and AVX2 code that I recently did. Most of them show significant performance speedup on real workloads.<br>
I'll send it to review one by one accompanied with appropriate tests.<br>
<br>
The current patch optimizes frequently used shuffle patterns and gives these instruction sequence reduction.<br>
Before:<br>
vshufps $-35, %xmm1, %xmm0, %xmm2 ## xmm2 = xmm0[1,3],xmm1[1,3]<br>
vpermilps $-40, %xmm2, %xmm2 ## xmm2 = xmm2[0,2,1,3]<br>
vextractf128 $1, %ymm1, %xmm1<br>
vextractf128 $1, %ymm0, %xmm0<br>
vshufps $-35, %xmm1, %xmm0, %xmm0 ## xmm0 = xmm0[1,3],xmm1[1,3]<br>
vpermilps $-40, %xmm0, %xmm0 ## xmm0 = xmm0[0,2,1,3]<br>
vinsertf128 $1, %xmm0, %ymm2, %ymm0<br>
After:<br>
vshufps $13, %ymm0, %ymm1, %ymm1 ## ymm1 = ymm1[1,3],ymm0[0,0],ymm1[5,7],ymm0[4,4]<br>
vshufps $13, %ymm0, %ymm0, %ymm0 ## ymm0 = ymm0[1,3,0,0,5,7,4,4]<br>
vunpcklps %ymm1, %ymm0, %ymm0 ## ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[4],ymm1[4],ymm0[5],ymm1[5]<br>
<br>
Thank you<br>
<br>
- Elena<br>
<br>
<br>
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<p class="MsoNormal">_______________________________________________<br>
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</font></span></div><span class="HOEnZb"><font color="#888888">
<p class="MsoNormal"><br>
<br clear="all">
<br>
-- <br>
~Craig<u></u><u></u></p>
</font></span></div><div><div class="h5">
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This e-mail and any attachments may contain confidential material for<br>
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</blockquote></div><br><br clear="all"><br>-- <br>~Craig<br>